From 98cc7dad7d5ff8c34e670383b3c520877f98b87c Mon Sep 17 00:00:00 2001 From: AndreiGrozav Date: Tue, 15 Mar 2016 15:26:05 +0200 Subject: [PATCH] fmcadc2: Updated common design to 2015.4 --- projects/fmcadc2/common/fmcadc2_bd.tcl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/projects/fmcadc2/common/fmcadc2_bd.tcl b/projects/fmcadc2/common/fmcadc2_bd.tcl index fb1242f1a..7d684044d 100644 --- a/projects/fmcadc2/common/fmcadc2_bd.tcl +++ b/projects/fmcadc2/common/fmcadc2_bd.tcl @@ -11,7 +11,7 @@ create_bd_port -dir I -from 7 -to 0 rx_data_n set axi_ad9625_core [create_bd_cell -type ip -vlnv analog.com:user:axi_ad9625:1.0 axi_ad9625_core] -set axi_ad9625_jesd [create_bd_cell -type ip -vlnv xilinx.com:ip:jesd204:6.1 axi_ad9625_jesd] +set axi_ad9625_jesd [create_bd_cell -type ip -vlnv xilinx.com:ip:jesd204:6.2 axi_ad9625_jesd] set_property -dict [list CONFIG.C_NODE_IS_TRANSMIT {0}] $axi_ad9625_jesd set_property -dict [list CONFIG.C_LANES {8}] $axi_ad9625_jesd