diff --git a/library/axi_ad7616/axi_ad7616_control.v b/library/axi_ad7616/axi_ad7616_control.v
index bc40f101d..af013aa96 100644
--- a/library/axi_ad7616/axi_ad7616_control.v
+++ b/library/axi_ad7616/axi_ad7616_control.v
@@ -150,6 +150,7 @@ module axi_ad7616_control (
       up_cnvst_en <= 1'b0;
       up_conv_rate <= 32'b0;
       up_burst_length <= 5'h0;
+      up_write_data <= 16'h0;
     end else begin
       up_wack <= up_wreq_s;
       if ((up_wreq_s == 1'b1) && (up_waddr[7:0] == 8'h02)) begin
diff --git a/library/axi_ad9162/axi_ad9162_core.v b/library/axi_ad9162/axi_ad9162_core.v
index 7bfbbdcd7..8f8555716 100644
--- a/library/axi_ad9162/axi_ad9162_core.v
+++ b/library/axi_ad9162/axi_ad9162_core.v
@@ -166,6 +166,7 @@ module axi_ad9162_core (
       .dac_rst (dac_rst),
       .dac_sync (dac_sync_s),
       .dac_frame (),
+      .dac_clksel (),
       .dac_par_type (),
       .dac_par_enb (),
       .dac_r1_mode (),
diff --git a/library/axi_ad9361/axi_ad9361.v b/library/axi_ad9361/axi_ad9361.v
index af6ea017b..7324d28d6 100644
--- a/library/axi_ad9361/axi_ad9361.v
+++ b/library/axi_ad9361/axi_ad9361.v
@@ -272,7 +272,14 @@ module axi_ad9361 #(
   wire            tdd_rx_rf_en_s;
   wire            tdd_tx_rf_en_s;
   wire    [ 7:0]  tdd_status_s;
-    
+  wire            up_drp_sel;
+  wire            up_drp_wr;
+  wire    [11:0]  up_drp_addr;
+  wire    [31:0]  up_drp_wdata;
+  wire    [31:0]  up_drp_rdata;
+  wire            up_drp_ready;
+  wire            up_drp_locked;
+
   // signal name changes
 
   assign up_clk = s_axi_aclk;
diff --git a/library/axi_dmac/axi_dmac.v b/library/axi_dmac/axi_dmac.v
index ac698bd36..f5332bcfc 100644
--- a/library/axi_dmac/axi_dmac.v
+++ b/library/axi_dmac/axi_dmac.v
@@ -42,7 +42,7 @@ module axi_dmac (
   input s_axi_aresetn,
 
   input         s_axi_awvalid,
-  input  [13:0] s_axi_awaddr,
+  input  [31:0] s_axi_awaddr,
   output        s_axi_awready,
   input   [2:0] s_axi_awprot,
   input         s_axi_wvalid,
@@ -53,7 +53,7 @@ module axi_dmac (
   output [ 1:0] s_axi_bresp,
   input         s_axi_bready,
   input         s_axi_arvalid,
-  input  [13:0] s_axi_araddr,
+  input  [31:0] s_axi_araddr,
   output        s_axi_arready,
   input   [2:0] s_axi_arprot,
   output        s_axi_rvalid,
diff --git a/library/axi_mc_controller/control_registers.v b/library/axi_mc_controller/control_registers.v
index 589234e97..ed72e73dc 100644
--- a/library/axi_mc_controller/control_registers.v
+++ b/library/axi_mc_controller/control_registers.v
@@ -130,6 +130,7 @@ always @(negedge up_rstn or posedge up_clk)
 begin
    if (up_rstn == 0)
    begin
+       reserved_r1          <= 'd0;
        up_wack              <= 1'b0;
        control_r            <= 'h0;
        reference_speed_r    <= 'd1000;
diff --git a/library/xilinx/util_adxcvr/util_adxcvr_xch.v b/library/xilinx/util_adxcvr/util_adxcvr_xch.v
index 01624a725..08066de4b 100644
--- a/library/xilinx/util_adxcvr/util_adxcvr_xch.v
+++ b/library/xilinx/util_adxcvr/util_adxcvr_xch.v
@@ -526,6 +526,41 @@ module util_adxcvr_xch #(
     .TX_XCLK_SEL ("TXOUT"),
     .UCODEER_CLR (1'b0))
   i_gtxe2_channel (
+    .RXOUTCLKPCS (),
+    .RXPHSLIPMONITOR (),
+    .PHYSTATUS (),
+    .RXCDRLOCK (),
+    .RXCHANBONDSEQ (),
+    .RXCHANISALIGNED (),
+    .RXCHANREALIGN (),
+    .RXCOMINITDET (),
+    .RXCOMSASDET (),
+    .RXCOMWAKEDET (),
+    .RXDATAVALID (),
+    .RXDLYSRESETDONE (),
+    .RXELECIDLE (),
+    .RXHEADERVALID (),
+    .RXPHALIGNDONE (),
+    .RXQPISENN (),
+    .RXQPISENP (),
+    .RXRATEDONE (),
+    .RXSTARTOFSEQ (),
+    .RXVALID (),
+    .TXCOMFINISH (),
+    .TXDLYSRESETDONE (),
+    .TXGEARBOXREADY (),
+    .TXPHALIGNDONE (),
+    .TXPHINITDONE (),
+    .TXQPISENN (),
+    .TXQPISENP (),
+    .TXRATEDONE (),
+    .PCSRSVDOUT (),
+    .RXCLKCORCNT (),
+    .RXHEADER (),
+    .RXCHBONDO (),
+    .RXPHMONITOR (),
+    .TSTOUT (),
+    .GTREFCLKMONITOR (),
     .CFGRESET (1'h0),
     .CLKRSVD (4'h0),
     .CPLLFBCLKLOST (),
diff --git a/library/xilinx/util_adxcvr/util_adxcvr_xcm.v b/library/xilinx/util_adxcvr/util_adxcvr_xcm.v
index a13956ab7..75128cb50 100644
--- a/library/xilinx/util_adxcvr/util_adxcvr_xcm.v
+++ b/library/xilinx/util_adxcvr/util_adxcvr_xcm.v
@@ -142,6 +142,9 @@ module util_adxcvr_xcm #(
     .SIM_RESET_SPEEDUP ("TRUE"),
     .SIM_VERSION ("4.0"))
   i_gtxe2_common (
+    .QPLLDMONITOR (),
+    .QPLLFBCLKLOST (),
+    .REFCLKOUTMONITOR (),
     .BGBYPASSB (1'h1),
     .BGMONITORENB (1'h1),
     .BGPDB (1'h1),