jesd204: Handle sysref events in the register map
There are currently two sysref related events. One the sysref captured event which is generated when an external sysref edge has been observed. The other is the sysref alignment error event which is generated when a sysref edge is observed that has a different alignment from previously observed sysref edges. Capture those events in the register map. This is useful for error diagnostic. The events are sticky and write-1-to-clear. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>main
parent
d3b44906c3
commit
9e50f5afa8
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@ -61,12 +61,37 @@ module jesd204_up_sysref (
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output reg [7:0] up_cfg_lmfc_offset,
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output reg up_cfg_sysref_disable,
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input core_event_sysref_alignment_error
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input core_event_sysref_alignment_error,
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input core_event_sysref_edge
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);
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reg up_status_sysref_alignment_error = 1'b0;
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wire up_status_sysref_captured;
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reg [1:0] up_sysref_status;
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reg [1:0] up_sysref_status_clear;
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wire [1:0] up_sysref_event;
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sync_event #(
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.NUM_OF_EVENTS(2)
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) i_sysref_event_sync (
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.in_clk(core_clk),
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.in_event({
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core_event_sysref_alignment_error,
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core_event_sysref_edge
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}),
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.out_clk(up_clk),
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.out_event(up_sysref_event)
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);
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always @(posedge up_clk) begin
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if (up_reset == 1'b1) begin
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up_sysref_status <= 2'b00;
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end else begin
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up_sysref_status <= (up_sysref_status & ~up_sysref_status_clear) | up_sysref_event;
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end
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end
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always @(*) begin
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case (up_raddr)
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/* JESD SYSREF configuraton */
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@ -80,6 +105,10 @@ always @(*) begin
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/* 02-09 */ up_cfg_lmfc_offset,
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/* 00-01 */ 2'b00 /* data path alignment for cfg_lmfc_offset */
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};
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12'h042: up_rdata <= {
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/* 02-31 */ 30'h00,
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/* 00-01 */ up_sysref_status
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};
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default: up_rdata <= 32'h00000000;
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endcase
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end
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@ -104,4 +133,12 @@ always @(posedge up_clk) begin
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end
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end
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always @(*) begin
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if (up_wreq == 1'b1 && up_waddr == 12'h042) begin
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up_sysref_status_clear <= up_wdata[1:0];
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end else begin
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up_sysref_status_clear <= 2'b00;
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end
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end
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endmodule
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@ -215,7 +215,8 @@ jesd204_up_sysref i_up_sysref (
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.up_reset(up_reset),
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.core_clk(core_clk),
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.core_event_sysref_alignment_error(),
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.core_event_sysref_edge(core_event_sysref_edge),
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.core_event_sysref_alignment_error(core_event_sysref_alignment_error),
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.up_raddr(up_raddr),
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.up_rdata(up_rdata_sysref),
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@ -63,6 +63,18 @@ set_false_path \
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-from [get_pins {i_up_rx/i_sync_status/out_toggle_d1_reg/C}] \
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-to [get_pins {i_up_rx/i_sync_status/i_sync_in/cdc_sync_stage1_reg[0]/D}]
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set_false_path \
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-from [get_pins {i_up_sysref/i_sysref_event_sync/in_toggle_d1_reg/C}] \
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-to [get_pins {i_up_sysref/i_sysref_event_sync/i_sync_out/cdc_sync_stage1_reg[0]/D}]
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set_false_path \
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-from [get_pins {i_up_sysref/i_sysref_event_sync/out_toggle_d1_reg/C}] \
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-to [get_pins {i_up_sysref/i_sysref_event_sync/i_sync_in/cdc_sync_stage1_reg[0]/D}]
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set_false_path \
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-from [get_pins {i_up_sysref/i_sysref_event_sync/cdc_hold_reg*/C}] \
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-to [get_pins {i_up_sysref/i_sysref_event_sync/out_event_reg*/D}]
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# Don't place them too far appart
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set_max_delay -datapath_only \
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-from [get_pins {i_up_rx/i_sync_status/cdc_hold_reg[*]/C}] \
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@ -240,7 +240,8 @@ jesd204_up_sysref i_up_sysref (
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.up_reset(up_reset),
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.core_clk(core_clk),
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.core_event_sysref_alignment_error(1'b0), // FIXME
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.core_event_sysref_alignment_error(core_event_sysref_alignment_error),
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.core_event_sysref_edge(core_event_sysref_edge),
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.up_cfg_lmfc_offset(up_cfg_lmfc_offset),
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.up_cfg_sysref_oneshot(up_cfg_sysref_oneshot),
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@ -63,6 +63,18 @@ set_false_path \
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-from [get_pins {i_up_tx/i_sync_state/in_toggle_d1_reg/C}] \
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-to [get_pins {i_up_tx/i_sync_state/i_sync_out/cdc_sync_stage1_reg[0]/D}]
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set_false_path \
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-from [get_pins {i_up_sysref/i_sysref_event_sync/in_toggle_d1_reg/C}] \
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-to [get_pins {i_up_sysref/i_sysref_event_sync/i_sync_out/cdc_sync_stage1_reg[0]/D}]
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set_false_path \
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-from [get_pins {i_up_sysref/i_sysref_event_sync/out_toggle_d1_reg/C}] \
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-to [get_pins {i_up_sysref/i_sysref_event_sync/i_sync_in/cdc_sync_stage1_reg[0]/D}]
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set_false_path \
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-from [get_pins {i_up_sysref/i_sysref_event_sync/cdc_hold_reg*/C}] \
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-to [get_pins {i_up_sysref/i_sysref_event_sync/out_event_reg*/D}]
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# Don't place them too far appart
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set_max_delay -datapath_only \
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-from [get_pins {i_up_tx/i_sync_state/cdc_hold_reg[*]/C}] \
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@ -51,14 +51,12 @@ module jesd204_lmfc (
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input [7:0] cfg_beats_per_multiframe,
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input [7:0] cfg_lmfc_offset,
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input cfg_sysref_oneshot,
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input clear_sysref_captured,
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input cfg_sysref_disable,
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output reg lmfc_edge,
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output reg lmfc_clk,
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output reg [7:0] lmfc_counter,
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output reg sysref_captured,
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output reg sysref_edge,
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output reg sysref_alignment_error
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);
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@ -68,6 +66,8 @@ reg sysref_d1 = 1'b0;
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reg sysref_d2 = 1'b0;
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reg sysref_d3 = 1'b0;
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reg sysref_captured;
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/* lmfc_octet_counter = lmfc_counter * (char_clock_rate / device_clock_rate) */
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reg [7:0] lmfc_counter_next = 'h00;
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@ -104,8 +104,6 @@ always @(posedge clk) begin
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sysref_captured <= 1'b0;
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end else if (sysref_edge == 1'b1) begin
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sysref_captured <= 1'b1;
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end else if (clear_sysref_captured == 1'b1) begin
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sysref_captured <= 1'b0;
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end
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end
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@ -221,10 +221,7 @@ jesd204_lmfc i_lmfc (
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.lmfc_counter(lmfc_counter),
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.sysref_edge(event_sysref_edge),
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.sysref_alignment_error(event_sysref_alignment_error),
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.sysref_captured(),
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.clear_sysref_captured(1'b0)
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.sysref_alignment_error(event_sysref_alignment_error)
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);
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jesd204_rx_ctrl #(
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@ -127,8 +127,6 @@ jesd204_lmfc i_lmfc (
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.sysref(sysref),
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.clear_sysref_captured(1'b0),
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.sysref_captured(),
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.sysref_edge(event_sysref_edge),
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.sysref_alignment_error(event_sysref_alignment_error),
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