docs/projects/ad7616_sdz: Add ad7616_sdz project documentation
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@ -20,6 +20,7 @@ HDL Reference Designs
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:caption: Projects
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:caption: Projects
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:hidden:
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:hidden:
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projects/ad7616_sdz/index
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projects/ad9081_fmca_ebz/index
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projects/ad9081_fmca_ebz/index
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projects/ad9783_ebz/index
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projects/ad9783_ebz/index
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@ -0,0 +1,416 @@
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.. _ad7616_sdz:
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AD7616-SDZ HDL project
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===============================================================================
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Overview
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-------------------------------------------------------------------------------
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The :part:`AD7616` is a 16-bit, data acquisition system (DAS) that supports
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dual simultaneous sampling of 16 channels. The :part:`AD7616` operates from a
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single 5 V supply and can accommodate ±10 V, ±5 V, and ±2.5 V true bipolar
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input signals while sampling at throughput rates up to 1 MSPS per channel pair
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with 90 dB SNR. Higher SNR performance can be achieved with the on-chip
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oversampling mode; 92 dB for an oversampling ratio of 2.
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The input clamp protection circuitry can tolerate voltages up to ±20 V.
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The :part:`AD7616` has 1 MΩ analog input impedance regardless of sampling
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frequency. The single supply operation, on-chip filtering, and high input
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impedance eliminate the need for driver op-amps and external bipolar supplies.
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Each device contains analog input clamp protection, a dual, 16-bit charge
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redistribution successive approximation analog-to-digital converter (ADC),
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a flexible digital filter, a 2.5 V reference and reference buffer, and
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high-speed serial and parallel interfaces.
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Supported boards
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-------------------------------------------------------------------------------
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- :part:`EVAL-AD7616 <EVAL-AD7616>`
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Supported devices
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-------------------------------------------------------------------------------
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- :part:`AD7616`
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Supported carriers
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-------------------------------------------------------------------------------
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- :xilinx:`ZedBoard` on FMC slot
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- :xilinx:`ZC706` on FMC LPC slot
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Other required hardware
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-------------------------------------------------------------------------------
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- :part:`SDP-I-FMC <EVAL-SDP-I-FMC>`
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Block design
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-------------------------------------------------------------------------------
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The data path of the HDL design is simple as follows:
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- the parallel interface is controlled by the axi_ad7616 IP core
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- the serial interface is controlled by the SPI Engine Framework
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- data is written into memory by a DMA (axi_dmac core)
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- all the control pins of the device are driven by GPIOs
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Block diagram
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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AD7616_SDZ serial interface
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. image:: ../images/ad7616_sdz/ad7616_serial_hdl.svg
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:width: 800
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:align: center
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:alt: AD7616_SDZ using the serial interface block diagram
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AD7616_SDZ parallel interface
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. image:: ../images/ad7616_sdz/ad7616_parallel_hdl.svg
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:width: 800
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:align: center
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:alt: AD7616_SDZ using the parallel interface block diagram
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Configuration modes
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The SER_PAR_N configuration parameter defines the interface type (Serial or
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Parallel). By default it is set to 1. Depending on the required interface mode,
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some hardware modifications need to be done on the board and/or make command:
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In case of the **PARALLEL** interface:
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.. code-block::
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make SER_PAR_N=0
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In case of the **SERIAL** interface:
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.. code-block::
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make SER_PAR_N=1
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.. note::
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This switch is a *hardware* switch. Please rebuild the design if the
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variable has been changed.
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- SL5 - unmounted - Parallel interface
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- SL5 - mounted - Serial interface
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Jumper setup
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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================== ========= ====================================
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Jumper/Solder link Position Description
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================== ========= ====================================
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SL1 Unmounted Channel Sequencer Enable
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SL2 Unmounted RC Enable Input
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SL3 Mounted Selects 2 MISO mode
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SL4 Unmounted Oversampling Ratio Selection OS2
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SL5 Mounted If mounted, selects serial interface
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SL6 Unmounted Oversampling Ratio Selection OS1
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SL7 Unmounted Oversampling Ratio Selection OS0
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LK40 A Onboard 5v0 power supply selected
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LK41 A Onboard 3v3 power supply selected
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================== ========= ====================================
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IP list
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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- :git-hdl:`AD_EDGE_DETECT <main:library/common/ad_edge_detect.v>`
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- :git-hdl:`AXI_AD7616 <main:library/axi_ad7616>` *
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- :git-hdl:`AXI_CLKGEN <main:library/axi_clkgen>`
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- :git-hdl:`AXI_DMAC <main:library/axi_dmac>`
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- :git-hdl:`AXI_HDMI_TX <main:library/axi_hdmi_tx>`
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- :git-hdl:`AXI_I2S_ADI <main:library/axi_i2s_adi>`
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- :git-hdl:`AXI_PWM_GEN <main:library/axi_pwm_gen>`
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- :git-hdl:`AXI_SPDIF_TX <main:library/axi_spdif_tx>`
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- :git-hdl:`AXI_SPI_ENGINE <main:library/spi_engine/axi_spi_engine>` **
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- :git-hdl:`AXI_SYSID <main:library/axi_sysid>`
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- :git-hdl:`SPI_ENGINE_EXECUTION <main:library/spi_engine/spi_engine_execution>` **
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- :git-hdl:`SPI_ENGINE_INTERCONNECT <main:library/spi_engine/spi_engine_interconnect>` **
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- :git-hdl:`SPI_ENGINE_OFFLOAD <main:library/spi_engine/spi_engine_offload>` **
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- :git-hdl:`SYNC_BITS <main:library/util_cdc/sync_bits.v>`
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- :git-hdl:`SYSID_ROM <main:library/sysid_rom>`
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.. admonition:: Legend
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:class: note
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- ``*`` instantiated only for SER_PAR_N=0 (parallel interface)
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- ``**`` instantiated only for SER_PAR_N=1 (serial interface)
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CPU/Memory interconnects addresses
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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======================== ==========
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Instance Address
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======================== ==========
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axi_ad7616_dma 0x44a30000
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spi_clkgen 0x44a70000
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ad7616_pwm_gen 0x44b00000
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spi_ad7616_axi_regmap ** 0x44a00000
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axi_ad7616 * 0x44a80000
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======================== ==========
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.. admonition:: Legend
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:class: note
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- ``*`` instantiated only for SER_PAR_N=0 (parallel interface)
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- ``**`` instantiated only for SER_PAR_N=1 (serial interface)
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I2C connections
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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.. list-table::
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:widths: 20 20 20 20 20
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:header-rows: 1
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* - I2C type
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- I2C manager instance
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- Alias
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- Address
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- I2C subordinate
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* - PL
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- iic_fmc
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- axi_iic_fmc
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- 0x4162_0000
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- \-
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* - PL
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- iic_main
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- axi_iic_main
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- 0x4160_0000
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- \-
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SPI connections
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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.. list-table::
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:widths: 25 25 25 25
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:header-rows: 1
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* - SPI type
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- SPI manager instance
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- SPI subordinate
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- CS
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* - PL
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- axi_spi_engine
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- AD7616
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- 0
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GPIOs
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The Software GPIO number is calculated as follows:
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- Zynq-7000: if PS7 is used, then offset is 54
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.. list-table::
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:widths: 25 25 25 25
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:header-rows: 2
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* - GPIO signal
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- Direction
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- HDL GPIO EMIO
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- Software GPIO
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* -
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- (from FPGA view)
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-
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- Zynq-7000
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* - adc_reset_n
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- OUT
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- 43
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- 97
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* - adc_hw_rngsel
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- OUT
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- 42:41
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- 96:95
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* - adc_os **
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- OUT
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- 40:38
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- 94:92
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* - adc_seq_en
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- OUT
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- 37
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- 91
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* - adc_burst **
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- OUT
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- 36
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- 90
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* - adc_chsel
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- OUT
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- 35:33
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- 89:87
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* - adc_crcen **
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- OUT
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- 32
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- 86
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.. admonition:: Legend
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:class: note
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- ``**`` instantiated only for SER_PAR_N=1 (serial interface)
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Interrupts
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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Below are the Programmable Logic interrupts used in this project.
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=============== === ========== ===========
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Instance name HDL Linux Zynq Actual Zynq
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=============== === ========== ===========
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axi_ad7616_dma 13 57 89
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spi_ad7616 ** 12 56 88
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axi_ad7616 * 10 54 87
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=============== === ========== ===========
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.. admonition:: Legend
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:class: note
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- ``*`` instantiated only for SER_PAR_N=0 (parallel interface)
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- ``**`` instantiated only for SER_PAR_N=1 (serial interface)
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Building the HDL project
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-------------------------------------------------------------------------------
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The design is built upon ADI's generic HDL reference design framework.
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ADI does not distribute the bit/elf files of these projects so they
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must be built from the sources available :git-hdl:`here <main:/>`. To get
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the source you must
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`clone <https://git-scm.com/book/en/v2/Git-Basics-Getting-a-Git-Repository>`__
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the HDL repository, and then build the project as follows:.
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**Linux/Cygwin/WSL**
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.. code-block::
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:linenos:
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user@analog:~$ cd hdl/projects/ad7616_sdz/zed
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user@analog:~/hdl/projects/ad7616_sdz/zed$ make SER_PAR_N=0
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The result of the build, if parameters were used, will be in a folder named
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by the configuration used:
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if the following command was run
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``make SER_PAR_N=0``
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then the folder name will be:
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``SERPARN0``
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A more comprehensive build guide can be found in the :ref:`build_hdl` user guide.
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Connections and hardware changes
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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.. warning::
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**The following hardware changes are required:**
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(**Please note:** Because of the **SDP-I-FMC** the level of the **VADJ** in
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the carrier board needs to be set to **3.3V**.
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Depending on the required interface mode, some hardware modifications need to
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be done.
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- **SL5** - unmounted - Parallel interface
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- **SL5** - mounted - Serial interface
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Resources
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-------------------------------------------------------------------------------
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Systems related
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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- :dokuwiki:`AD7616 User guide <resources/eval/user-guides/ad7616-sdz>`
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- :dokuwiki:`How to build No-OS <resources/no-os/build>`
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Hardware related
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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- Product datasheet: :part:`AD7616`
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- `UG-1012, Evaluation Board User Guide <https://www.analog.com/media/en/technical-documentation/user-guides/EVAL-AD7616SDZ-7616-PSDZ-UG-1012.pdf>`__
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HDL related
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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- :git-hdl:`ad7616_sdz HDL project <main:projects/ad7616_sdz>`
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.. list-table::
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:widths: 30 35 35
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:header-rows: 1
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* - IP name
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- Source code link
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- Documentation link
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* - AD_EDGE_DETECT
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- :git-hdl:`library/common/ad_edge_detect.v <main:library/common/ad_edge_detect.v>`
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-
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* - AXI_AD7616
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- :git-hdl:`library/axi_ad7616 <main:library/axi_ad7616>` *
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- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_ad7616>`
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* - AXI_CLKGEN
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- :git-hdl:`library/axi_dmac <main:library/axi_clkgen>`
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- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_clkgen>`
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* - AXI_DMAC
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- :git-hdl:`library/axi_dmac <master:library/axi_dmac>`
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- :ref:`here <axi_dmac>`
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* - AXI_HDMI_TX
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- :git-hdl:`library/axi_hdmi_tx <main:library/axi_hdmi_tx>`
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- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_hdmi_tx>`
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* - AXI_I2S_ADI
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- :git-hdl:`library/axi_i2s_adi <main:library/axi_i2s_adi>`
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-
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* - AXI_PWM_GEN
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- :git-hdl:`library/axi_pwm_gen <main:library/axi_pwm_gen>`
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- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_pwm_gen>`
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* - AXI_SPDIF_TX
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- :git-hdl:`library/axi_spdif_tx <main:library/axi_spdif_tx>`
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-
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* - AXI_SPI_ENGINE
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- :git-hdl:`library/spi_engine/axi_spi_engine <main:library/spi_engine/axi_spi_engine>` **
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- :ref:`here <spi_engine axi>`
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* - AXI_SYSID
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- :git-hdl:`library/axi_sysid <main:library/axi_sysid>`
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- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_sysid>`
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* - AXI_SPI_ENGINE
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- :git-hdl:`library/spi_engine/axi_spi_engine <main:library/spi_engine/axi_spi_engine>` **
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- :ref:`here <spi_engine axi>`
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||||||
|
* - SPI_ENGINE_EXECUTION
|
||||||
|
- :git-hdl:`library/spi_engine/spi_engine_execution <main:library/spi_engine/spi_engine_execution>` **
|
||||||
|
- :ref:`here <spi_engine execution>`
|
||||||
|
* - SPI_ENGINE_INTERCONNECT
|
||||||
|
- :git-hdl:`library/spi_engine/spi_engine_interconnect <main:library/spi_engine/spi_engine_interconnect>` **
|
||||||
|
- :ref:`here <spi_engine interconnect>`
|
||||||
|
* - SPI_ENGINE_OFFLOAD
|
||||||
|
- :git-hdl:`library/spi_engine/spi_engine_offload <main:library/spi_engine/spi_engine_offload>` **
|
||||||
|
- :ref:`here <spi_engine offload>`
|
||||||
|
* - SYNC_BITS
|
||||||
|
- :git-hdl:`library/util_cdc/sync_bits.v <main:library/util_cdc/sync_bits.v>`
|
||||||
|
-
|
||||||
|
* - SYSID_ROM
|
||||||
|
- :git-hdl:`library/sysid_rom <main:library/sysid_rom>`
|
||||||
|
-
|
||||||
|
|
||||||
|
.. admonition:: Legend
|
||||||
|
:class: note
|
||||||
|
|
||||||
|
- ``*`` instantiated only for SER_PAR_N=0 (parallel interface)
|
||||||
|
- ``**`` instantiated only for SER_PAR_N=1 (serial interface)
|
||||||
|
|
||||||
|
- :ref:`SPI_ENGINE <spi_engine>`
|
||||||
|
|
||||||
|
Software related
|
||||||
|
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||||
|
|
||||||
|
- :git-no-os:`No-OS project <main:projects/ad7616-sdz>`
|
||||||
|
|
||||||
|
- :dokuwiki:`How to build No-OS <resources/no-os/build>`
|
||||||
|
|
||||||
|
.. include:: ../common/more_information.rst
|
||||||
|
|
||||||
|
.. include:: ../common/support.rst
|
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Reference in New Issue