imageon: Initial commit
Initial commit of the IMAGEON project for ZC706. NOT tested.main
Istvan Csomortani
parent
14df46c193
commit
a170ebfb82
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# adv7511
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set fmc_hdmi_rx_clk [create_bd_port -dir I fmc_hdmi_rx_clk]
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set fmc_hdmi_rx_data [create_bd_port -dir I -from 15 -to 0 fmc_hdmi_rx_data]
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# adv7611
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set fmc_hdmi_tx_clk [create_bd_port -dir O fmc_hdmi_tx_clk]
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set fmc_hdmi_tx_spdif [create_bd_port -dir O fmc_hdmi_tx_spdif]
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set fmc_hdmi_tx_data [create_bd_port -dir O -from 15 -to 0 fmc_hdmi_tx_data]
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# hdmi interrupt
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set fmc_hdmi_tx_dma_intr [create_bd_port -dir O fmc_hdmi_tx_dma_intr]
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set fmc_hdmi_rx_dma_intr [create_bd_port -dir O fmc_hdmi_rx_dma_intr]
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set fmc_hdmi_iic_intr [create_bd_port -dir O fmc_hdmi_iic_intr]
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# iic interface
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set IIC_FMC [create_bd_intf_port -mode Master -vlnv xilinx.com:interface:iic_rtl:1.0 IIC_FMC]
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set fmc_iic_rstn [create_bd_port -dir O fmc_iic_rstn]
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# fmc hdmi peripherals
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set fmc_hdmi_tx_core [create_bd_cell -type ip -vlnv analog.com:user:axi_hdmi_tx:1.0 fmc_hdmi_tx_core]
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set fmc_hdmi_rx_core [create_bd_cell -type ip -vlnv analog.com:user:axi_hdmi_rx:1.0 fmc_hdmi_rx_core]
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set fmc_hdmi_tx_dma [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_vdma:6.2 fmc_hdmi_tx_dma]
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set_property -dict [list CONFIG.c_m_axis_mm2s_tdata_width {64}] $fmc_hdmi_tx_dma
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set_property -dict [list CONFIG.c_use_mm2s_fsync {1}] $fmc_hdmi_tx_dma
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set_property -dict [list CONFIG.c_include_s2mm {0}] $fmc_hdmi_tx_dma
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set fmc_hdmi_rx_dma [create_bd_cell -type ip -vlnv analog.com:user:axi_dmac:1.0 fmc_hdmi_rx_dma]
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set_property -dict [list CONFIG.C_DMA_TYPE_SRC {2}] $fmc_hdmi_rx_dma
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set_property -dict [list CONFIG.C_DMA_TYPE_DEST {0}] $fmc_hdmi_rx_dma
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set_property -dict [list CONFIG.C_CYCLIC {0}] $fmc_hdmi_rx_dma
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set_property -dict [list CONFIG.C_SYNC_TRANSFER_START {0}] $fmc_hdmi_rx_dma
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set_property -dict [list CONFIG.C_AXI_SLICE_SRC {1}] $fmc_hdmi_rx_dma
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set_property -dict [list CONFIG.C_AXI_SLICE_DEST {0}] $fmc_hdmi_rx_dma
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set_property -dict [list CONFIG.C_CLKS_ASYNC_DEST_REQ {0}] $fmc_hdmi_rx_dma
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set_property -dict [list CONFIG.C_CLKS_ASYNC_SRC_DEST {1}] $fmc_hdmi_rx_dma
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set_property -dict [list CONFIG.C_CLKS_ASYNC_REQ_SRC {1}] $fmc_hdmi_rx_dma
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set_property -dict [list CONFIG.C_2D_TRANSFER {1}] $fmc_hdmi_rx_dma
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set_property -dict [list CONFIG.C_SYNC_TRANSFER_START {1}] $fmc_hdmi_rx_dma
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set_property -dict [list CONFIG.C_DMA_LENGTH_WIDTH {14}] $fmc_hdmi_rx_dma
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set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_SRC {64}] $fmc_hdmi_rx_dma
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set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_DEST {64}] $fmc_hdmi_rx_dma
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set fmc_hdmi_tx_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 fmc_hdmi_tx_interconnect]
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set_property -dict [list CONFIG.NUM_MI {1}] $fmc_hdmi_tx_interconnect
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set fmc_hdmi_rx_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 fmc_hdmi_rx_interconnect]
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set_property -dict [list CONFIG.NUM_MI {1}] $fmc_hdmi_rx_interconnect
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set fmc_spdif_tx_core [create_bd_cell -type ip -vlnv analog.com:user:axi_spdif_tx:1.0 fmc_spdif_tx_core]
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set_property -dict [list CONFIG.C_DMA_TYPE {1}] $fmc_spdif_tx_core
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set_property -dict [list CONFIG.C_S_AXI_ADDR_WIDTH {16}] $fmc_spdif_tx_core
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set axi_iic_fmc [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_iic:2.0 axi_iic_fmc]
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set_property -dict [list CONFIG.USE_BOARD_FLOW {true} CONFIG.IIC_BOARD_INTERFACE {IIC_FMC}] $axi_iic_fmc
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# additions to default configurations
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set_property -dict [list CONFIG.NUM_MI {13}] $axi_cpu_interconnect
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set_property -dict [list CONFIG.PCW_USE_S_AXI_HP1 {1}] $sys_ps7
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set_property -dict [list CONFIG.PCW_USE_S_AXI_HP2 {1}] $sys_ps7
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set_property -dict [list CONFIG.PCW_USE_DMA1 {1}] $sys_ps7
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# up axi interface connections
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connect_bd_intf_net -intf_net axi_cpu_interconnect_m07 [get_bd_intf_pins axi_cpu_interconnect/M07_AXI] [get_bd_intf_pins fmc_hdmi_tx_core/s_axi]
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connect_bd_intf_net -intf_net axi_cpu_interconnect_m08 [get_bd_intf_pins axi_cpu_interconnect/M08_AXI] [get_bd_intf_pins fmc_hdmi_rx_core/s_axi]
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connect_bd_intf_net -intf_net axi_cpu_interconnect_m09 [get_bd_intf_pins axi_cpu_interconnect/M09_AXI] [get_bd_intf_pins fmc_hdmi_tx_dma/S_AXI_LITE]
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connect_bd_intf_net -intf_net axi_cpu_interconnect_m10 [get_bd_intf_pins axi_cpu_interconnect/M10_AXI] [get_bd_intf_pins fmc_hdmi_rx_dma/s_axi]
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connect_bd_intf_net -intf_net axi_cpu_interconnect_m11 [get_bd_intf_pins axi_cpu_interconnect/M11_AXI] [get_bd_intf_pins fmc_spdif_tx_core/s_axi]
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connect_bd_intf_net -intf_net axi_cpu_interconnect_m12 [get_bd_intf_pins axi_cpu_interconnect/M12_AXI] [get_bd_intf_pins axi_iic_fmc/s_axi]
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connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M07_ACLK] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M08_ACLK] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M09_ACLK] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M10_ACLK] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M11_ACLK] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M12_ACLK] $sys_100m_clk_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M07_ARESETN] $sys_100m_resetn_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M08_ARESETN] $sys_100m_resetn_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M09_ARESETN] $sys_100m_resetn_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M10_ARESETN] $sys_100m_resetn_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M11_ARESETN] $sys_100m_resetn_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M12_ARESETN] $sys_100m_resetn_source
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# fmc hdmi tx data path
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connect_bd_intf_net -intf fmc_hdmi_tx_interconnect_s00 [get_bd_intf_pins fmc_hdmi_tx_interconnect/S00_AXI] [get_bd_intf_pins fmc_hdmi_tx_dma/M_AXI_MM2S]
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connect_bd_intf_net -intf fmc_hdmi_tx_interconnect_m00 [get_bd_intf_pins fmc_hdmi_tx_interconnect/M00_AXI] [get_bd_intf_pins sys_ps7/S_AXI_HP1]
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connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_tx_interconnect/ACLK] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_tx_interconnect/S00_ACLK] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_tx_interconnect/M00_ACLK] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins sys_ps7/S_AXI_HP1_ACLK] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_tx_dma/s_axi_lite_aclk] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_tx_dma/m_axi_mm2s_aclk] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_tx_dma/m_axis_mm2s_aclk] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_tx_core/m_axis_mm2s_clk] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_tx_core/s_axi_aclk] $sys_100m_clk_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_hdmi_tx_interconnect/ARESETN] $sys_100m_resetn_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_hdmi_tx_interconnect/S00_ARESETN] $sys_100m_resetn_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_hdmi_tx_interconnect/M00_ARESETN] $sys_100m_resetn_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_hdmi_tx_dma/axi_resetn] $sys_100m_resetn_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_hdmi_tx_core/s_axi_aresetn] $sys_100m_resetn_source
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connect_bd_net -net axi_hdmi_tx_core_hdmi_clk [get_bd_pins fmc_hdmi_tx_core/hdmi_clk] [get_bd_pins axi_hdmi_clkgen/clk_0]
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connect_bd_net -net fmc_hdmi_tx_core_hdmi_out_clk [get_bd_pins fmc_hdmi_tx_core/hdmi_out_clk] [get_bd_ports fmc_hdmi_tx_clk]
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connect_bd_net -net fmc_hdmi_tx_core_hdmi_data [get_bd_pins fmc_hdmi_tx_core/hdmi_16_es_data] [get_bd_ports fmc_hdmi_tx_data]
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connect_bd_net -net fmc_hdmi_tx_core_mm2s_tvalid [get_bd_pins fmc_hdmi_tx_core/m_axis_mm2s_tvalid] [get_bd_pins fmc_hdmi_tx_dma/m_axis_mm2s_tvalid]
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connect_bd_net -net fmc_hdmi_tx_core_mm2s_tdata [get_bd_pins fmc_hdmi_tx_core/m_axis_mm2s_tdata] [get_bd_pins fmc_hdmi_tx_dma/m_axis_mm2s_tdata]
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connect_bd_net -net fmc_hdmi_tx_core_mm2s_tkeep [get_bd_pins fmc_hdmi_tx_core/m_axis_mm2s_tkeep] [get_bd_pins fmc_hdmi_tx_dma/m_axis_mm2s_tkeep]
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connect_bd_net -net fmc_hdmi_tx_core_mm2s_tlast [get_bd_pins fmc_hdmi_tx_core/m_axis_mm2s_tlast] [get_bd_pins fmc_hdmi_tx_dma/m_axis_mm2s_tlast]
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connect_bd_net -net fmc_hdmi_tx_core_mm2s_tready [get_bd_pins fmc_hdmi_tx_core/m_axis_mm2s_tready] [get_bd_pins fmc_hdmi_tx_dma/m_axis_mm2s_tready]
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connect_bd_net -net fmc_hdmi_tx_core_mm2s_fsync [get_bd_pins fmc_hdmi_tx_core/m_axis_mm2s_fsync] [get_bd_pins fmc_hdmi_tx_dma/mm2s_fsync]
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connect_bd_net -net fmc_hdmi_tx_core_mm2s_fsync [get_bd_pins fmc_hdmi_tx_core/m_axis_mm2s_fsync_ret]
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# fmc hdmi rx data path
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connect_bd_intf_net -intf fmc_hdmi_rx_interconnect_s00 [get_bd_intf_pins fmc_hdmi_rx_interconnect/S00_AXI] [get_bd_intf_pins fmc_hdmi_rx_dma/m_dest_axi]
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connect_bd_intf_net -intf fmc_hdmi_rx_interconnect_m00 [get_bd_intf_pins fmc_hdmi_rx_interconnect/M00_AXI] [get_bd_intf_pins sys_ps7/S_AXI_HP2]
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connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_rx_interconnect/ACLK] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_rx_interconnect/S00_ACLK] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_rx_interconnect/M00_ACLK] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins sys_ps7/S_AXI_HP2_ACLK] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_rx_dma/s_axi_aclk] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_rx_dma/m_dest_axi_aclk] $sys_100m_clk_source
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connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_rx_core/s_axi_aclk] $sys_100m_clk_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_hdmi_rx_interconnect/ARESETN] $sys_100m_resetn_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_hdmi_rx_interconnect/S00_ARESETN] $sys_100m_resetn_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_hdmi_rx_interconnect/M00_ARESETN] $sys_100m_resetn_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_hdmi_rx_dma/s_axi_aresetn] $sys_100m_resetn_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_hdmi_rx_dma/m_dest_axi_aresetn] $sys_100m_resetn_source
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connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_hdmi_rx_core/s_axi_aresetn] $sys_100m_resetn_source
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connect_bd_net -net hdmi_rx_fifo_wr_data [get_bd_pins fmc_hdmi_rx_core/video_data] [get_bd_pins fmc_hdmi_rx_dma/fifo_wr_din]
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connect_bd_net -net hdmi_rx_fifo_wr_dvalid [get_bd_pins fmc_hdmi_rx_core/video_valid] [get_bd_pins fmc_hdmi_rx_dma/fifo_wr_en]
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connect_bd_net -net hdmi_rx_fifo_wr_clk [get_bd_pins fmc_hdmi_rx_core/video_clk] [get_bd_pins fmc_hdmi_rx_dma/fifo_wr_clk]
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connect_bd_net -net hdmi_rx_fifo_wr_sync [get_bd_pins fmc_hdmi_rx_core/video_sync] [get_bd_pins fmc_hdmi_rx_dma/fifo_wr_sync]
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connect_bd_net -net hdmi_rx_fifo_overflow [get_bd_pins fmc_hdmi_rx_core/video_overflow] [get_bd_pins fmc_hdmi_rx_dma/fifo_wr_overflow]
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connect_bd_net -net fmc_hdmi_rx_core_clk [get_bd_pins fmc_hdmi_rx_core/hdmi_clk] [get_bd_ports fmc_hdmi_rx_clk]
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connect_bd_net -net fmc_hdmi_rx_core_data [get_bd_pins fmc_hdmi_rx_core/hdmi_data] [get_bd_ports fmc_hdmi_rx_data]
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# fmc spdif audio
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connect_bd_intf_net -intf_net fmc_spdif_dma_req_tx [get_bd_intf_pins sys_ps7/DMA1_REQ] [get_bd_intf_pins fmc_spdif_tx_core/DMA_REQ]
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connect_bd_intf_net -intf_net fmc_spdif_dma_ack_tx [get_bd_intf_pins sys_ps7/DMA1_ACK] [get_bd_intf_pins fmc_spdif_tx_core/DMA_ACK]
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connect_bd_net -net sys_100m_clk [get_bd_pins fmc_spdif_tx_core/S_AXI_ACLK]
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connect_bd_net -net sys_100m_clk [get_bd_pins fmc_spdif_tx_core/DMA_REQ_ACLK]
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connect_bd_net -net sys_100m_clk [get_bd_pins sys_ps7/DMA1_ACLK]
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connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_spdif_tx_core/S_AXI_ARESETN]
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connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_spdif_tx_core/DMA_REQ_RSTN]
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connect_bd_net -net sys_audio_clkgen_clk [get_bd_pins sys_audio_clkgen/clk_out1] [get_bd_pins fmc_spdif_tx_core/spdif_data_clk]
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connect_bd_net -net fmc_spdif [get_bd_ports fmc_hdmi_tx_spdif] [get_bd_pins fmc_spdif_tx_core/spdif_tx_o]
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# fmc iic connections
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connect_bd_intf_net -intf_net axi_iic_fmc_iic [get_bd_intf_ports IIC_FMC] [get_bd_intf_pins axi_iic_fmc/iic]
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connect_bd_net -net sys_100m_clk [get_bd_pins axi_iic_fmc/s_axi_aclk]
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connect_bd_net -net sys_100m_resetn [get_bd_pins axi_iic_fmc/s_axi_aresetn]
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connect_bd_net -net fmc_hdmi_iic_rstn [get_bd_pins axi_iic_fmc/gpo] [get_bd_ports fmc_iic_rstn]
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# fmc hdmi interrupts
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connect_bd_net -net fmc_hdmi_tx_interrupt [get_bd_pins fmc_hdmi_tx_dma/mm2s_introut] [get_bd_ports fmc_hdmi_tx_dma_intr]
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connect_bd_net -net fmc_hdmi_rx_interrupt [get_bd_pins fmc_hdmi_rx_dma/irq] [get_bd_ports fmc_hdmi_rx_dma_intr]
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connect_bd_net -net fmc_hdmi_iic_interrupt [get_bd_pins axi_iic_fmc/iic2intc_irpt] [get_bd_ports fmc_hdmi_iic_intr]
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# address map
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create_bd_addr_seg -range 0x00010000 -offset 0x43C00000 $sys_addr_cntrl_space [get_bd_addr_segs fmc_hdmi_tx_core/s_axi/axi_lite] SEG_data_fmc_hdmi_tx_core
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create_bd_addr_seg -range 0x00010000 -offset 0x43100000 $sys_addr_cntrl_space [get_bd_addr_segs fmc_hdmi_rx_core/s_axi/axi_lite] SEG_data_fmc_hdmi_rx_core
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create_bd_addr_seg -range 0x00010000 -offset 0x43010000 $sys_addr_cntrl_space [get_bd_addr_segs fmc_hdmi_tx_dma/S_AXI_LITE/Reg] SEG_data_fmc_hdmi_tx_dma
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create_bd_addr_seg -range 0x00010000 -offset 0x43C20000 $sys_addr_cntrl_space [get_bd_addr_segs fmc_hdmi_rx_dma/s_axi/axi_lite] SEG_data_fmc_hdmi_rx_dma
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create_bd_addr_seg -range 0x00010000 -offset 0x43C30000 $sys_addr_cntrl_space [get_bd_addr_segs fmc_spdif_tx_core/S_AXI/reg0] SEG_data_fmc_spdif_tx_core
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create_bd_addr_seg -range 0x00010000 -offset 0x43C40000 $sys_addr_cntrl_space [get_bd_addr_segs axi_iic_fmc/s_axi/Reg] SEG_data_fmc_hdmi_iic
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|
||||
create_bd_addr -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces fmc_hdmi_tx_dma/Data_MM2S] [get_bd_addr_segs sys_ps7/S_AXI_HP1/HP1_DDR_LOWOCM] SEG_sys_ps7_hp1_ddr_lowocm
|
||||
create_bd_addr -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces fmc_hdmi_rx_dma/m_dest_axi] [get_bd_addr_segs sys_ps7/S_AXI_HP2/HP2_DDR_LOWOCM] SEG_sys_ps7_hp2_ddr_lowocm
|
||||
|
||||
|
|
@ -0,0 +1,4 @@
|
|||
|
||||
source $ad_hdl_dir/projects/common/zc706/zc706_system_bd.tcl
|
||||
source ../common/imageon_bd.tcl
|
||||
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
|
||||
# fmc hdmi rx (adv7611)
|
||||
|
||||
set_property -dict {PACKAGE_PIN AC28 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_rx_clk] ; ## G2 FMC_LPC_CLK1_M2C_P
|
||||
set_property -dict {PACKAGE_PIN AE26 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_rx_data[0]] ; ## H32 FMC_LPC_LA28_N
|
||||
set_property -dict {PACKAGE_PIN AD25 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_rx_data[1]] ; ## H31 FMC_LPC_LA28_P
|
||||
set_property -dict {PACKAGE_PIN AF25 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_rx_data[2]] ; ## G31 FMC_LPC_LA29_N
|
||||
set_property -dict {PACKAGE_PIN AJ29 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_rx_data[3]] ; ## C27 FMC_LPC_LA27_N
|
||||
set_property -dict {PACKAGE_PIN AK30 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_rx_data[4]] ; ## D27 FMC_LPC_LA26_N
|
||||
set_property -dict {PACKAGE_PIN AE25 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_rx_data[5]] ; ## G30 FMC_LPC_LA29_P
|
||||
set_property -dict {PACKAGE_PIN AJ28 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_rx_data[6]] ; ## C26 FMC_LPC_LA27_P
|
||||
set_property -dict {PACKAGE_PIN AJ30 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_rx_data[7]] ; ## D26 FMC_LPC_LA26_P
|
||||
set_property -dict {PACKAGE_PIN Y27 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_rx_data[8]] ; ## H38 FMC_LPC_LA32_N
|
||||
set_property -dict {PACKAGE_PIN Y26 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_rx_data[9]] ; ## H37 FMC_LPC_LA32_P
|
||||
set_property -dict {PACKAGE_PIN AA30 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_rx_data[10]] ; ## G37 FMC_LPC_LA33_N
|
||||
set_property -dict {PACKAGE_PIN Y30 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_rx_data[11]] ; ## G36 FMC_LPC_LA33_P
|
||||
set_property -dict {PACKAGE_PIN AB30 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_rx_data[12]] ; ## H35 FMC_LPC_LA30_N
|
||||
set_property -dict {PACKAGE_PIN AB29 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_rx_data[13]] ; ## H34 FMC_LPC_LA30_P
|
||||
set_property -dict {PACKAGE_PIN AD29 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_rx_data[14]] ; ## G34 FMC_LPC_LA31_N
|
||||
set_property -dict {PACKAGE_PIN AC29 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_rx_data[15]] ; ## G33 FMC_LPC_LA31_P
|
||||
|
||||
# fmc hdmi tx (adv7511)
|
||||
|
||||
set_property -dict {PACKAGE_PIN AD28 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_tx_clk] ; ## G3 FMC_LPC_CLK1_M2C_N
|
||||
set_property -dict {PACKAGE_PIN AF30 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_tx_spdif] ; ## H28 FMC_LPC_LA24_P
|
||||
set_property -dict {PACKAGE_PIN AG29 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_tx_data[0]] ; ## G28 FMC_LPC_LA25_N
|
||||
set_property -dict {PACKAGE_PIN AF29 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_tx_data[1]] ; ## G27 FMC_LPC_LA25_P
|
||||
set_property -dict {PACKAGE_PIN AH29 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_tx_data[2]] ; ## H26 FMC_LPC_LA21_N
|
||||
set_property -dict {PACKAGE_PIN AK26 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_tx_data[3]] ; ## D24 FMC_LPC_LA23_N
|
||||
set_property -dict {PACKAGE_PIN AH28 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_tx_data[4]] ; ## H25 FMC_LPC_LA21_P
|
||||
set_property -dict {PACKAGE_PIN AK28 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_tx_data[5]] ; ## G25 FMC_LPC_LA22_N
|
||||
set_property -dict {PACKAGE_PIN AF27 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_tx_data[6]] ; ## C23 FMC_LPC_LA18_CC_N
|
||||
set_property -dict {PACKAGE_PIN AJ26 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_tx_data[7]] ; ## D23 FMC_LPC_LA23_P
|
||||
set_property -dict {PACKAGE_PIN AK27 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_tx_data[8]] ; ## G24 FMC_LPC_LA22_P
|
||||
set_property -dict {PACKAGE_PIN AH27 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_tx_data[9]] ; ## H23 FMC_LPC_LA19_N
|
||||
set_property -dict {PACKAGE_PIN AE27 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_tx_data[10]] ; ## C22 FMC_LPC_LA18_CC_P
|
||||
set_property -dict {PACKAGE_PIN AC27 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_tx_data[11]] ; ## D21 FMC_LPC_LA17_CC_N
|
||||
set_property -dict {PACKAGE_PIN AH26 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_tx_data[12]] ; ## H22 FMC_LPC_LA19_P
|
||||
set_property -dict {PACKAGE_PIN AG27 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_tx_data[13]] ; ## G22 FMC_LPC_LA20_N
|
||||
set_property -dict {PACKAGE_PIN AB27 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_tx_data[14]] ; ## D20 FMC_LPC_LA17_CC_P
|
||||
set_property -dict {PACKAGE_PIN AG26 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_tx_data[15]] ; ## G21 FMC_LPC_LA20_P
|
||||
|
||||
# iic pins
|
||||
|
||||
set_property -dict {PACKAGE_PIN AE18 IOSTANDARD LVCMOS25} [get_ports fmc_iic_scl] ; ## G18 FMC_LPC_LA16_P
|
||||
set_property -dict {PACKAGE_PIN AE17 IOSTANDARD LVCMOS25} [get_ports fmc_iic_sda] ; ## G19 FMC_LPC_LA16_N
|
||||
set_property -dict {PACKAGE_PIN AG15 IOSTANDARD LVCMOS25} [get_ports fmc_iic_rstn] ; ## D9 FMC_LPC_LA01_CC_N
|
||||
|
||||
# clock definition
|
||||
|
||||
create_clock -period 6.06061 -name hdmi_rx_clk -waveform {0.000 3.030305} [get_ports fmc_hdmi_rx_clk]
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
# load script
|
||||
|
||||
source ../../scripts/adi_env.tcl
|
||||
source $ad_hdl_dir/projects/scripts/adi_project.tcl
|
||||
|
||||
set project_name imageon_zc706
|
||||
|
||||
adi_project_create $project_name
|
||||
|
||||
adi_project_files $project_name [list "system_top.v" \
|
||||
"$ad_hdl_dir/library/common/ad_iobuf.v" \
|
||||
"system_constr.xdc" \
|
||||
"$ad_hdl_dir/projects/common/zc706/zc706_system_constr.xdc"]
|
||||
|
||||
adi_project_run $project_name
|
||||
|
||||
|
|
@ -0,0 +1,218 @@
|
|||
// ***************************************************************************
|
||||
// ***************************************************************************
|
||||
// Copyright 2011(c) Analog Devices, Inc.
|
||||
//
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without modification,
|
||||
// are permitted provided that the following conditions are met:
|
||||
// - Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
// - Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in
|
||||
// the documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
// - Neither the name of Analog Devices, Inc. nor the names of its
|
||||
// contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
// - The use of this software may or may not infringe the patent rights
|
||||
// of one or more patent holders. This license does not release you
|
||||
// from the requirement that you obtain separate licenses from these
|
||||
// patent holders to use this software.
|
||||
// - Use of the software either in source or binary form, must be run
|
||||
// on or directly connected to an Analog Devices Inc. component.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
// INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A
|
||||
// PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
//
|
||||
// IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY
|
||||
// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
|
||||
// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
|
||||
// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// ***************************************************************************
|
||||
// ***************************************************************************
|
||||
// ***************************************************************************
|
||||
// ***************************************************************************
|
||||
|
||||
`timescale 1ns/100ps
|
||||
|
||||
module system_top (
|
||||
|
||||
DDR_addr,
|
||||
DDR_ba,
|
||||
DDR_cas_n,
|
||||
DDR_ck_n,
|
||||
DDR_ck_p,
|
||||
DDR_cke,
|
||||
DDR_cs_n,
|
||||
DDR_dm,
|
||||
DDR_dq,
|
||||
DDR_dqs_n,
|
||||
DDR_dqs_p,
|
||||
DDR_odt,
|
||||
DDR_ras_n,
|
||||
DDR_reset_n,
|
||||
DDR_we_n,
|
||||
|
||||
FIXED_IO_ddr_vrn,
|
||||
FIXED_IO_ddr_vrp,
|
||||
FIXED_IO_mio,
|
||||
FIXED_IO_ps_clk,
|
||||
FIXED_IO_ps_porb,
|
||||
FIXED_IO_ps_srstb,
|
||||
|
||||
gpio_bd,
|
||||
|
||||
hdmi_out_clk,
|
||||
hdmi_vsync,
|
||||
hdmi_hsync,
|
||||
hdmi_data_e,
|
||||
hdmi_data,
|
||||
|
||||
spdif,
|
||||
|
||||
iic_scl,
|
||||
iic_sda,
|
||||
|
||||
fmc_hdmi_rx_clk,
|
||||
fmc_hdmi_rx_data,
|
||||
|
||||
fmc_hdmi_tx_clk,
|
||||
fmc_hdmi_tx_data,
|
||||
fmc_hdmi_tx_spdif,
|
||||
|
||||
fmc_iic_scl,
|
||||
fmc_iic_sda,
|
||||
fmc_iic_rstn);
|
||||
|
||||
inout [14:0] DDR_addr;
|
||||
inout [ 2:0] DDR_ba;
|
||||
inout DDR_cas_n;
|
||||
inout DDR_ck_n;
|
||||
inout DDR_ck_p;
|
||||
inout DDR_cke;
|
||||
inout DDR_cs_n;
|
||||
inout [ 3:0] DDR_dm;
|
||||
inout [31:0] DDR_dq;
|
||||
inout [ 3:0] DDR_dqs_n;
|
||||
inout [ 3:0] DDR_dqs_p;
|
||||
inout DDR_odt;
|
||||
inout DDR_ras_n;
|
||||
inout DDR_reset_n;
|
||||
inout DDR_we_n;
|
||||
|
||||
inout FIXED_IO_ddr_vrn;
|
||||
inout FIXED_IO_ddr_vrp;
|
||||
inout [53:0] FIXED_IO_mio;
|
||||
inout FIXED_IO_ps_clk;
|
||||
inout FIXED_IO_ps_porb;
|
||||
inout FIXED_IO_ps_srstb;
|
||||
|
||||
inout [14:0] gpio_bd;
|
||||
|
||||
output hdmi_out_clk;
|
||||
output hdmi_vsync;
|
||||
output hdmi_hsync;
|
||||
output hdmi_data_e;
|
||||
output [23:0] hdmi_data;
|
||||
|
||||
output spdif;
|
||||
|
||||
inout iic_scl;
|
||||
inout iic_sda;
|
||||
|
||||
input fmc_hdmi_rx_clk;
|
||||
input [15:0] fmc_hdmi_rx_data;
|
||||
|
||||
output fmc_hdmi_tx_clk;
|
||||
output [15:0] fmc_hdmi_tx_data;
|
||||
output fmc_hdmi_tx_spdif;
|
||||
|
||||
inout fmc_iic_scl;
|
||||
inout fmc_iic_sda;
|
||||
output fmc_iic_rstn;
|
||||
|
||||
// internal signals
|
||||
|
||||
wire [14:0] gpio_i;
|
||||
wire [14:0] gpio_o;
|
||||
wire [14:0] gpio_t;
|
||||
|
||||
wire [15:0] ps_intrs;
|
||||
|
||||
// instantiations
|
||||
|
||||
ad_iobuf #(
|
||||
.DATA_WIDTH(15)
|
||||
) i_gpio_bd (
|
||||
.dt(gpio_t),
|
||||
.di(gpio_o),
|
||||
.do(gpio_i),
|
||||
.dio(gpio_bd));
|
||||
|
||||
system_wrapper i_system_wrapper (
|
||||
.DDR_addr (DDR_addr),
|
||||
.DDR_ba (DDR_ba),
|
||||
.DDR_cas_n (DDR_cas_n),
|
||||
.DDR_ck_n (DDR_ck_n),
|
||||
.DDR_ck_p (DDR_ck_p),
|
||||
.DDR_cke (DDR_cke),
|
||||
.DDR_cs_n (DDR_cs_n),
|
||||
.DDR_dm (DDR_dm),
|
||||
.DDR_dq (DDR_dq),
|
||||
.DDR_dqs_n (DDR_dqs_n),
|
||||
.DDR_dqs_p (DDR_dqs_p),
|
||||
.DDR_odt (DDR_odt),
|
||||
.DDR_ras_n (DDR_ras_n),
|
||||
.DDR_reset_n (DDR_reset_n),
|
||||
.DDR_we_n (DDR_we_n),
|
||||
.FIXED_IO_ddr_vrn (FIXED_IO_ddr_vrn),
|
||||
.FIXED_IO_ddr_vrp (FIXED_IO_ddr_vrp),
|
||||
.FIXED_IO_mio (FIXED_IO_mio),
|
||||
.FIXED_IO_ps_clk (FIXED_IO_ps_clk),
|
||||
.FIXED_IO_ps_porb (FIXED_IO_ps_porb),
|
||||
.FIXED_IO_ps_srstb (FIXED_IO_ps_srstb),
|
||||
.GPIO_I (gpio_i),
|
||||
.GPIO_O (gpio_o),
|
||||
.GPIO_T (gpio_t),
|
||||
.hdmi_data (hdmi_data),
|
||||
.hdmi_data_e (hdmi_data_e),
|
||||
.hdmi_hsync (hdmi_hsync),
|
||||
.hdmi_out_clk (hdmi_out_clk),
|
||||
.hdmi_vsync (hdmi_vsync),
|
||||
.iic_main_scl_io (iic_scl),
|
||||
.iic_main_sda_io (iic_sda),
|
||||
.ps_intr_0 (ps_intrs[0]),
|
||||
.ps_intr_1 (ps_intrs[1]),
|
||||
.ps_intr_2 (ps_intrs[2]),
|
||||
.ps_intr_3 (ps_intrs[3]),
|
||||
.ps_intr_4 (ps_intrs[4]),
|
||||
.ps_intr_5 (ps_intrs[5]),
|
||||
.ps_intr_6 (ps_intrs[6]),
|
||||
.ps_intr_7 (ps_intrs[7]),
|
||||
.ps_intr_8 (ps_intrs[8]),
|
||||
.ps_intr_9 (ps_intrs[9]),
|
||||
.ps_intr_10 (ps_intrs[10]),
|
||||
.ps_intr_11 (ps_intrs[11]),
|
||||
.ps_intr_12 (ps_intrs[12]),
|
||||
.ps_intr_13 (ps_intrs[13]),
|
||||
.spdif (spdif),
|
||||
.fmc_hdmi_rx_clk (fmc_hdmi_rx_clk),
|
||||
.fmc_hdmi_rx_data (fmc_hdmi_rx_data),
|
||||
.fmc_hdmi_tx_clk (fmc_hdmi_tx_clk),
|
||||
.fmc_hdmi_tx_spdif (fmc_hdmi_tx_spdif),
|
||||
.fmc_hdmi_tx_data (fmc_hdmi_tx_data),
|
||||
.fmc_hdmi_tx_dma_intr (ps_intrs[13]),
|
||||
.fmc_hdmi_rx_dma_intr (ps_intrs[12]),
|
||||
.fmc_hdmi_iic_intr (ps_intrs[11]),
|
||||
.iic_fmc_scl_io (iic_fmc_scl_io),
|
||||
.iic_fmc_sda_io (iic_fmc_sda_io),
|
||||
.fmc_iic_rstn (fmc_iic_rstn));
|
||||
|
||||
endmodule
|
||||
|
||||
// ***************************************************************************
|
||||
// ***************************************************************************
|
||||
Loading…
Reference in New Issue