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axi_hdmi_tx- altera ip changes

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Rejeesh Kutty 2015-08-27 16:03:03 -04:00
parent 1cd3435147
commit a33c08725b
1 changed files with 23 additions and 37 deletions
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60
library/axi_hdmi_tx/axi_hdmi_tx.v
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@ -34,8 +34,6 @@
// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. // THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// *************************************************************************** // ***************************************************************************
// *************************************************************************** // ***************************************************************************
// ***************************************************************************
// ***************************************************************************
module axi_hdmi_tx ( module axi_hdmi_tx (
@ -68,14 +66,12 @@ module axi_hdmi_tx (
// vdma interface // vdma interface
m_axis_mm2s_clk, vdma_clk,
m_axis_mm2s_fsync, vdma_fs,
m_axis_mm2s_fsync_ret, vdma_fs_ret,
m_axis_mm2s_tvalid, vdma_valid,
m_axis_mm2s_tdata, vdma_data,
m_axis_mm2s_tkeep, vdma_ready,
m_axis_mm2s_tlast,
m_axis_mm2s_tready,
// axi interface // axi interface
@ -83,6 +79,7 @@ module axi_hdmi_tx (
s_axi_aresetn, s_axi_aresetn,
s_axi_awvalid, s_axi_awvalid,
s_axi_awaddr, s_axi_awaddr,
s_axi_awprot,
s_axi_awready, s_axi_awready,
s_axi_wvalid, s_axi_wvalid,
s_axi_wdata, s_axi_wdata,
@ -93,10 +90,11 @@ module axi_hdmi_tx (
s_axi_bready, s_axi_bready,
s_axi_arvalid, s_axi_arvalid,
s_axi_araddr, s_axi_araddr,
s_axi_arprot,
s_axi_arready, s_axi_arready,
s_axi_rvalid, s_axi_rvalid,
s_axi_rdata,
s_axi_rresp, s_axi_rresp,
s_axi_rdata,
s_axi_rready); s_axi_rready);
// parameters // parameters
@ -139,14 +137,12 @@ module axi_hdmi_tx (
// vdma interface // vdma interface
input m_axis_mm2s_clk; input vdma_clk;
output m_axis_mm2s_fsync; output vdma_fs;
input m_axis_mm2s_fsync_ret; input vdma_fs_ret;
input m_axis_mm2s_tvalid; input vdma_valid;
input [63:0] m_axis_mm2s_tdata; input [63:0] vdma_data;
input [ 7:0] m_axis_mm2s_tkeep; output vdma_ready;
input m_axis_mm2s_tlast;
output m_axis_mm2s_tready;
// axi interface // axi interface
@ -154,6 +150,7 @@ module axi_hdmi_tx (
input s_axi_aresetn; input s_axi_aresetn;
input s_axi_awvalid; input s_axi_awvalid;
input [31:0] s_axi_awaddr; input [31:0] s_axi_awaddr;
input [ 2:0] s_axi_awprot;
output s_axi_awready; output s_axi_awready;
input s_axi_wvalid; input s_axi_wvalid;
input [31:0] s_axi_wdata; input [31:0] s_axi_wdata;
@ -164,10 +161,11 @@ module axi_hdmi_tx (
input s_axi_bready; input s_axi_bready;
input s_axi_arvalid; input s_axi_arvalid;
input [31:0] s_axi_araddr; input [31:0] s_axi_araddr;
input [ 2:0] s_axi_arprot;
output s_axi_arready; output s_axi_arready;
output s_axi_rvalid; output s_axi_rvalid;
output [31:0] s_axi_rdata;
output [ 1:0] s_axi_rresp; output [ 1:0] s_axi_rresp;
output [31:0] s_axi_rdata;
input s_axi_rready; input s_axi_rready;
// reset and clocks // reset and clocks
@ -175,7 +173,6 @@ module axi_hdmi_tx (
wire up_rstn; wire up_rstn;
wire up_clk; wire up_clk;
wire hdmi_rst; wire hdmi_rst;
wire vdma_clk;
wire vdma_rst; wire vdma_rst;
// internal signals // internal signals
@ -207,11 +204,6 @@ module axi_hdmi_tx (
wire [ 8:0] hdmi_raddr_g_s; wire [ 8:0] hdmi_raddr_g_s;
wire hdmi_tpm_oos_s; wire hdmi_tpm_oos_s;
wire hdmi_status_s; wire hdmi_status_s;
wire vdma_fs_s;
wire vdma_fs_ret_s;
wire vdma_valid_s;
wire [63:0] vdma_data_s;
wire vdma_ready_s;
wire vdma_wr_s; wire vdma_wr_s;
wire [ 8:0] vdma_waddr_s; wire [ 8:0] vdma_waddr_s;
wire [47:0] vdma_wdata_s; wire [47:0] vdma_wdata_s;
@ -225,12 +217,6 @@ module axi_hdmi_tx (
assign up_rstn = s_axi_aresetn; assign up_rstn = s_axi_aresetn;
assign up_clk = s_axi_aclk; assign up_clk = s_axi_aclk;
assign vdma_clk = m_axis_mm2s_clk;
assign vdma_valid_s = m_axis_mm2s_tvalid;
assign vdma_data_s = m_axis_mm2s_tdata;
assign vdma_fs_ret_s = m_axis_mm2s_fsync_ret;
assign m_axis_mm2s_fsync = vdma_fs_s;
assign m_axis_mm2s_tready = vdma_ready_s;
// axi interface // axi interface
@ -309,11 +295,11 @@ module axi_hdmi_tx (
.hdmi_raddr_g (hdmi_raddr_g_s), .hdmi_raddr_g (hdmi_raddr_g_s),
.vdma_clk (vdma_clk), .vdma_clk (vdma_clk),
.vdma_rst (vdma_rst), .vdma_rst (vdma_rst),
.vdma_fs (vdma_fs_s), .vdma_fs (vdma_fs),
.vdma_fs_ret (vdma_fs_ret_s), .vdma_fs_ret (vdma_fs_ret),
.vdma_valid (vdma_valid_s), .vdma_valid (vdma_valid),
.vdma_data (vdma_data_s), .vdma_data (vdma_data),
.vdma_ready (vdma_ready_s), .vdma_ready (vdma_ready),
.vdma_wr (vdma_wr_s), .vdma_wr (vdma_wr_s),
.vdma_waddr (vdma_waddr_s), .vdma_waddr (vdma_waddr_s),
.vdma_wdata (vdma_wdata_s), .vdma_wdata (vdma_wdata_s),