diff --git a/library/axi_ad9361/axi_ad9361.v b/library/axi_ad9361/axi_ad9361.v index d5e3e0a41..01c7ef763 100644 --- a/library/axi_ad9361/axi_ad9361.v +++ b/library/axi_ad9361/axi_ad9361.v @@ -60,6 +60,7 @@ module axi_ad9361 #( parameter DAC_DATAPATH_DISABLE = 0, parameter DAC_DDS_DISABLE = 0, parameter DAC_DDS_TYPE = 1, + parameter DAC_DDS_PHASE_DW = 16, parameter DAC_DDS_CORDIC_DW = 14, parameter DAC_DDS_CORDIC_PHASE_DW = 13, parameter DAC_USERPORTS_DISABLE = 0, @@ -671,6 +672,7 @@ module axi_ad9361 #( .PPS_RECEIVER_ENABLE (PPS_RECEIVER_ENABLE), .INIT_DELAY (DAC_INIT_DELAY), .DAC_DDS_DISABLE (DAC_DDS_DISABLE_INT), + .DAC_DDS_PHASE_DW (DAC_DDS_PHASE_DW), .DAC_DDS_TYPE (DAC_DDS_TYPE), .DAC_DDS_CORDIC_DW (DAC_DDS_CORDIC_DW), .DAC_DDS_CORDIC_PHASE_DW (DAC_DDS_CORDIC_PHASE_DW), diff --git a/library/axi_ad9361/axi_ad9361_tx.v b/library/axi_ad9361/axi_ad9361_tx.v index 592b541bd..ac0232ecf 100644 --- a/library/axi_ad9361/axi_ad9361_tx.v +++ b/library/axi_ad9361/axi_ad9361_tx.v @@ -51,6 +51,7 @@ module axi_ad9361_tx #( parameter INIT_DELAY = 0, parameter DAC_DDS_DISABLE = 0, parameter DAC_DDS_TYPE = 1, + parameter DAC_DDS_PHASE_DW = 16, parameter DAC_DDS_CORDIC_DW = 14, parameter DAC_DDS_CORDIC_PHASE_DW = 13, parameter USERPORTS_DISABLE = 0, @@ -226,6 +227,7 @@ module axi_ad9361_tx #( .DISABLE (0), .DAC_DDS_DISABLE (DAC_DDS_DISABLE), .DAC_DDS_TYPE (DAC_DDS_TYPE), + .DAC_DDS_PHASE_DW (DAC_DDS_PHASE_DW), .DAC_DDS_CORDIC_DW (DAC_DDS_CORDIC_DW), .DAC_DDS_CORDIC_PHASE_DW (DAC_DDS_CORDIC_PHASE_DW), .USERPORTS_DISABLE (USERPORTS_DISABLE), @@ -261,6 +263,7 @@ module axi_ad9361_tx #( .DISABLE (0), .DAC_DDS_DISABLE (DAC_DDS_DISABLE), .DAC_DDS_TYPE (DAC_DDS_TYPE), + .DAC_DDS_PHASE_DW (DAC_DDS_PHASE_DW), .DAC_DDS_CORDIC_DW (DAC_DDS_CORDIC_DW), .DAC_DDS_CORDIC_PHASE_DW (DAC_DDS_CORDIC_PHASE_DW), .USERPORTS_DISABLE (USERPORTS_DISABLE), @@ -296,6 +299,7 @@ module axi_ad9361_tx #( .DISABLE (MODE_1R1T), .DAC_DDS_DISABLE (DAC_DDS_DISABLE), .DAC_DDS_TYPE (DAC_DDS_TYPE), + .DAC_DDS_PHASE_DW (DAC_DDS_PHASE_DW), .DAC_DDS_CORDIC_DW (DAC_DDS_CORDIC_DW), .DAC_DDS_CORDIC_PHASE_DW (DAC_DDS_CORDIC_PHASE_DW), .USERPORTS_DISABLE (USERPORTS_DISABLE), @@ -331,6 +335,7 @@ module axi_ad9361_tx #( .DISABLE (MODE_1R1T), .DAC_DDS_DISABLE (DAC_DDS_DISABLE), .DAC_DDS_TYPE (DAC_DDS_TYPE), + .DAC_DDS_PHASE_DW (DAC_DDS_PHASE_DW), .DAC_DDS_CORDIC_DW (DAC_DDS_CORDIC_DW), .DAC_DDS_CORDIC_PHASE_DW (DAC_DDS_CORDIC_PHASE_DW), .USERPORTS_DISABLE (USERPORTS_DISABLE), diff --git a/library/axi_ad9361/axi_ad9361_tx_channel.v b/library/axi_ad9361/axi_ad9361_tx_channel.v index 417308d7f..82ea69d71 100644 --- a/library/axi_ad9361/axi_ad9361_tx_channel.v +++ b/library/axi_ad9361/axi_ad9361_tx_channel.v @@ -44,6 +44,7 @@ module axi_ad9361_tx_channel #( parameter DISABLE = 0, parameter DAC_DDS_DISABLE = 0, parameter DAC_DDS_TYPE = 1, + parameter DAC_DDS_PHASE_DW = 16, parameter DAC_DDS_CORDIC_DW = 14, parameter DAC_DDS_CORDIC_PHASE_DW = 13, parameter USERPORTS_DISABLE = 0, @@ -105,11 +106,11 @@ module axi_ad9361_tx_channel #( wire [15:0] dac_iqcor_data_s; wire [11:0] dac_dds_data_s; wire [15:0] dac_dds_scale_1_s; - wire [15:0] dac_dds_init_1_s; - wire [15:0] dac_dds_incr_1_s; + wire [DAC_DDS_PHASE_DW-1:0] dac_dds_init_1_s; + wire [DAC_DDS_PHASE_DW-1:0] dac_dds_incr_1_s; wire [15:0] dac_dds_scale_2_s; - wire [15:0] dac_dds_init_2_s; - wire [15:0] dac_dds_incr_2_s; + wire [DAC_DDS_PHASE_DW-1:0] dac_dds_init_2_s; + wire [DAC_DDS_PHASE_DW-1:0] dac_dds_incr_2_s; wire [15:0] dac_pat_data_1_s; wire [15:0] dac_pat_data_2_s; wire [ 3:0] dac_data_sel_s; @@ -321,7 +322,7 @@ module axi_ad9361_tx_channel #( ad_dds #( .DISABLE (DAC_DDS_DISABLE), .DDS_DW (12), - .PHASE_DW (16), + .PHASE_DW (DAC_DDS_PHASE_DW), .DDS_TYPE (DAC_DDS_TYPE), .CORDIC_DW (DAC_DDS_CORDIC_DW), .CORDIC_PHASE_DW (DAC_DDS_CORDIC_PHASE_DW), @@ -349,6 +350,7 @@ module axi_ad9361_tx_channel #( .COMMON_ID (6'h11), .CHANNEL_ID (CHANNEL_ID), .DDS_DISABLE (DAC_DDS_DISABLE), + .DDS_PHASE_DW (DAC_DDS_PHASE_DW), .USERPORTS_DISABLE (USERPORTS_DISABLE), .IQCORRECTION_DISABLE (IQCORRECTION_DISABLE) ) i_up_dac_channel (