zcu102- added
Rejeesh Kutty
parent
e8fbdd0f5d
commit
a6411dbd63
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####################################################################################
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####################################################################################
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## Copyright 2011(c) Analog Devices, Inc.
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## Auto-generated, do not modify!
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####################################################################################
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####################################################################################
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M_DEPS += system_top.v
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M_DEPS += system_project.tcl
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M_DEPS += system_constr.xdc
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M_DEPS += system_bd.tcl
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M_DEPS += ../common/fmcomms2_bd.tcl
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M_DEPS += ../../scripts/adi_project.tcl
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M_DEPS += ../../scripts/adi_env.tcl
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M_DEPS += ../../scripts/adi_board.tcl
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M_DEPS += ../../common/zc706/zc706_system_constr.xdc
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M_DEPS += ../../common/zc706/zc706_system_bd.tcl
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M_DEPS += ../../../library/common/ad_iobuf.v
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M_DEPS += ../../../library/axi_ad9361/axi_ad9361.xpr
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M_DEPS += ../../../library/axi_clkgen/axi_clkgen.xpr
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M_DEPS += ../../../library/axi_dmac/axi_dmac.xpr
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M_DEPS += ../../../library/axi_hdmi_tx/axi_hdmi_tx.xpr
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M_DEPS += ../../../library/axi_spdif_tx/axi_spdif_tx.xpr
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M_DEPS += ../../../library/util_cpack/util_cpack.xpr
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M_DEPS += ../../../library/util_tdd_sync/util_tdd_sync.xpr
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M_DEPS += ../../../library/util_upack/util_upack.xpr
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M_DEPS += ../../../library/util_wfifo/util_wfifo.xpr
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M_VIVADO := vivado -mode batch -source
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M_FLIST := *.cache
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M_FLIST += *.data
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M_FLIST += *.xpr
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M_FLIST += *.log
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M_FLIST += *.jou
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M_FLIST += xgui
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M_FLIST += *.runs
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M_FLIST += *.srcs
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M_FLIST += *.sdk
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M_FLIST += *.hw
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M_FLIST += *.sim
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M_FLIST += .Xil
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.PHONY: all lib clean clean-all
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all: lib fmcomms2_zc706.sdk/system_top.hdf
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clean:
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rm -rf $(M_FLIST)
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clean-all:clean
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make -C ../../../library/axi_ad9361 clean
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make -C ../../../library/axi_clkgen clean
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make -C ../../../library/axi_dmac clean
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make -C ../../../library/axi_hdmi_tx clean
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make -C ../../../library/axi_spdif_tx clean
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make -C ../../../library/util_cpack clean
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make -C ../../../library/util_tdd_sync clean
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make -C ../../../library/util_upack clean
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make -C ../../../library/util_wfifo clean
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fmcomms2_zc706.sdk/system_top.hdf: $(M_DEPS)
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rm -rf $(M_FLIST)
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$(M_VIVADO) system_project.tcl >> fmcomms2_zc706_vivado.log 2>&1
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lib:
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make -C ../../../library/axi_ad9361
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make -C ../../../library/axi_clkgen
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make -C ../../../library/axi_dmac
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make -C ../../../library/axi_hdmi_tx
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make -C ../../../library/axi_spdif_tx
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make -C ../../../library/util_cpack
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make -C ../../../library/util_tdd_sync
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make -C ../../../library/util_upack
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make -C ../../../library/util_wfifo
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####################################################################################
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####################################################################################
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source $ad_hdl_dir/projects/common/zc706/zc706_system_bd.tcl
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source ../common/fmcomms2_bd.tcl
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# constraints
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# ad9361
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set_property -dict {PACKAGE_PIN AE13 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_clk_in_p] ; ## G6 FMC_LPC_LA00_CC_P
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set_property -dict {PACKAGE_PIN AF13 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_clk_in_n] ; ## G7 FMC_LPC_LA00_CC_N
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set_property -dict {PACKAGE_PIN AF15 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_frame_in_p] ; ## D8 FMC_LPC_LA01_CC_P
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set_property -dict {PACKAGE_PIN AG15 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_frame_in_n] ; ## D9 FMC_LPC_LA01_CC_N
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set_property -dict {PACKAGE_PIN AE12 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_p[0]] ; ## H7 FMC_LPC_LA02_P
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set_property -dict {PACKAGE_PIN AF12 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_n[0]] ; ## H8 FMC_LPC_LA02_N
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set_property -dict {PACKAGE_PIN AG12 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_p[1]] ; ## G9 FMC_LPC_LA03_P
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set_property -dict {PACKAGE_PIN AH12 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_n[1]] ; ## G10 FMC_LPC_LA03_N
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set_property -dict {PACKAGE_PIN AJ15 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_p[2]] ; ## H10 FMC_LPC_LA04_P
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set_property -dict {PACKAGE_PIN AK15 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_n[2]] ; ## H11 FMC_LPC_LA04_N
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set_property -dict {PACKAGE_PIN AE16 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_p[3]] ; ## D11 FMC_LPC_LA05_P
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set_property -dict {PACKAGE_PIN AE15 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_n[3]] ; ## D12 FMC_LPC_LA05_N
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set_property -dict {PACKAGE_PIN AB12 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_p[4]] ; ## C10 FMC_LPC_LA06_P
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set_property -dict {PACKAGE_PIN AC12 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_n[4]] ; ## C11 FMC_LPC_LA06_N
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set_property -dict {PACKAGE_PIN AA15 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_p[5]] ; ## H13 FMC_LPC_LA07_P
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set_property -dict {PACKAGE_PIN AA14 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_n[5]] ; ## H14 FMC_LPC_LA07_N
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set_property -dict {PACKAGE_PIN AD14 IOSTANDARD LVDS_25} [get_ports tx_clk_out_p] ; ## G12 FMC_LPC_LA08_P
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set_property -dict {PACKAGE_PIN AD13 IOSTANDARD LVDS_25} [get_ports tx_clk_out_n] ; ## G13 FMC_LPC_LA08_N
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set_property -dict {PACKAGE_PIN AH14 IOSTANDARD LVDS_25} [get_ports tx_frame_out_p] ; ## D14 FMC_LPC_LA09_P
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set_property -dict {PACKAGE_PIN AH13 IOSTANDARD LVDS_25} [get_ports tx_frame_out_n] ; ## D15 FMC_LPC_LA09_N
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set_property -dict {PACKAGE_PIN AJ16 IOSTANDARD LVDS_25} [get_ports tx_data_out_p[0]] ; ## H16 FMC_LPC_LA11_P
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set_property -dict {PACKAGE_PIN AK16 IOSTANDARD LVDS_25} [get_ports tx_data_out_n[0]] ; ## H17 FMC_LPC_LA11_N
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set_property -dict {PACKAGE_PIN AD16 IOSTANDARD LVDS_25} [get_ports tx_data_out_p[1]] ; ## G15 FMC_LPC_LA12_P
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set_property -dict {PACKAGE_PIN AD15 IOSTANDARD LVDS_25} [get_ports tx_data_out_n[1]] ; ## G16 FMC_LPC_LA12_N
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set_property -dict {PACKAGE_PIN AH17 IOSTANDARD LVDS_25} [get_ports tx_data_out_p[2]] ; ## D17 FMC_LPC_LA13_P
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set_property -dict {PACKAGE_PIN AH16 IOSTANDARD LVDS_25} [get_ports tx_data_out_n[2]] ; ## D18 FMC_LPC_LA13_N
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set_property -dict {PACKAGE_PIN AC14 IOSTANDARD LVDS_25} [get_ports tx_data_out_p[3]] ; ## C14 FMC_LPC_LA10_P
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set_property -dict {PACKAGE_PIN AC13 IOSTANDARD LVDS_25} [get_ports tx_data_out_n[3]] ; ## C15 FMC_LPC_LA10_N
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set_property -dict {PACKAGE_PIN AF18 IOSTANDARD LVDS_25} [get_ports tx_data_out_p[4]] ; ## C18 FMC_LPC_LA14_P
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set_property -dict {PACKAGE_PIN AF17 IOSTANDARD LVDS_25} [get_ports tx_data_out_n[4]] ; ## C19 FMC_LPC_LA14_N
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set_property -dict {PACKAGE_PIN AB15 IOSTANDARD LVDS_25} [get_ports tx_data_out_p[5]] ; ## H19 FMC_LPC_LA15_P
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set_property -dict {PACKAGE_PIN AB14 IOSTANDARD LVDS_25} [get_ports tx_data_out_n[5]] ; ## H20 FMC_LPC_LA15_N
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set_property -dict {PACKAGE_PIN AE18 IOSTANDARD LVCMOS25} [get_ports enable] ; ## G18 FMC_LPC_LA16_P
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set_property -dict {PACKAGE_PIN AE17 IOSTANDARD LVCMOS25} [get_ports txnrx] ; ## G19 FMC_LPC_LA16_N
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set_property -dict {PACKAGE_PIN AA20 IOSTANDARD LVCMOS25} [get_ports tdd_sync] ; ## PMOD1_5_LS
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set_property -dict {PACKAGE_PIN AG26 IOSTANDARD LVCMOS25} [get_ports gpio_status[0]] ; ## G21 FMC_LPC_LA20_P
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set_property -dict {PACKAGE_PIN AG27 IOSTANDARD LVCMOS25} [get_ports gpio_status[1]] ; ## G22 FMC_LPC_LA20_N
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set_property -dict {PACKAGE_PIN AH28 IOSTANDARD LVCMOS25} [get_ports gpio_status[2]] ; ## H25 FMC_LPC_LA21_P
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set_property -dict {PACKAGE_PIN AH29 IOSTANDARD LVCMOS25} [get_ports gpio_status[3]] ; ## H26 FMC_LPC_LA21_N
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set_property -dict {PACKAGE_PIN AK27 IOSTANDARD LVCMOS25} [get_ports gpio_status[4]] ; ## G24 FMC_LPC_LA22_P
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set_property -dict {PACKAGE_PIN AK28 IOSTANDARD LVCMOS25} [get_ports gpio_status[5]] ; ## G25 FMC_LPC_LA22_N
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set_property -dict {PACKAGE_PIN AJ26 IOSTANDARD LVCMOS25} [get_ports gpio_status[6]] ; ## D23 FMC_LPC_LA23_P
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set_property -dict {PACKAGE_PIN AK26 IOSTANDARD LVCMOS25} [get_ports gpio_status[7]] ; ## D24 FMC_LPC_LA23_N
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set_property -dict {PACKAGE_PIN AF30 IOSTANDARD LVCMOS25} [get_ports gpio_ctl[0]] ; ## H28 FMC_LPC_LA24_P
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set_property -dict {PACKAGE_PIN AG30 IOSTANDARD LVCMOS25} [get_ports gpio_ctl[1]] ; ## H29 FMC_LPC_LA24_N
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set_property -dict {PACKAGE_PIN AF29 IOSTANDARD LVCMOS25} [get_ports gpio_ctl[2]] ; ## G27 FMC_LPC_LA25_P
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set_property -dict {PACKAGE_PIN AG29 IOSTANDARD LVCMOS25} [get_ports gpio_ctl[3]] ; ## G28 FMC_LPC_LA25_N
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set_property -dict {PACKAGE_PIN AH26 IOSTANDARD LVCMOS25} [get_ports gpio_en_agc] ; ## H22 FMC_LPC_LA19_P
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set_property -dict {PACKAGE_PIN AH27 IOSTANDARD LVCMOS25} [get_ports gpio_sync] ; ## H23 FMC_LPC_LA19_N
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set_property -dict {PACKAGE_PIN AD25 IOSTANDARD LVCMOS25} [get_ports gpio_resetb] ; ## H31 FMC_LPC_LA28_P
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set_property -dict {PACKAGE_PIN AJ30 IOSTANDARD LVCMOS25 PULLTYPE PULLUP} [get_ports spi_csn] ; ## D26 FMC_LPC_LA26_P
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set_property -dict {PACKAGE_PIN AK30 IOSTANDARD LVCMOS25} [get_ports spi_clk] ; ## D27 FMC_LPC_LA26_N
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set_property -dict {PACKAGE_PIN AJ28 IOSTANDARD LVCMOS25} [get_ports spi_mosi] ; ## C26 FMC_LPC_LA27_P
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set_property -dict {PACKAGE_PIN AJ29 IOSTANDARD LVCMOS25} [get_ports spi_miso] ; ## C27 FMC_LPC_LA27_N
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# spi pmod J58
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set_property -dict {PACKAGE_PIN AJ21 IOSTANDARD LVCMOS25 PULLTYPE PULLUP} [get_ports spi_udc_csn_tx] ; ## PMOD1_0_LS
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set_property -dict {PACKAGE_PIN Y20 IOSTANDARD LVCMOS25 PULLTYPE PULLUP} [get_ports spi_udc_csn_rx] ; ## PMOD1_4_LS
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set_property -dict {PACKAGE_PIN AB16 IOSTANDARD LVCMOS25} [get_ports spi_udc_sclk] ; ## PMOD1_3_LS
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set_property -dict {PACKAGE_PIN AK21 IOSTANDARD LVCMOS25} [get_ports spi_udc_data] ; ## PMOD1_1_LS
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set_property -dict {PACKAGE_PIN AB21 IOSTANDARD LVCMOS25} [get_ports gpio_muxout_tx] ; ## PMOD1_2_LS
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set_property -dict {PACKAGE_PIN AC18 IOSTANDARD LVCMOS25} [get_ports gpio_muxout_rx] ; ## PMOD1_6_LS
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# clocks
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create_clock -name rx_clk -period 4.00 [get_ports rx_clk_in_p]
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source ../../scripts/adi_env.tcl
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source $ad_hdl_dir/projects/scripts/adi_project.tcl
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source $ad_hdl_dir/projects/scripts/adi_board.tcl
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adi_project_create fmcomms2_zc706
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adi_project_files fmcomms2_zc706 [list \
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"system_top.v" \
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"system_constr.xdc"\
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"$ad_hdl_dir/library/common/ad_iobuf.v" \
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"$ad_hdl_dir/projects/common/zc706/zc706_system_constr.xdc" ]
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adi_project_run fmcomms2_zc706
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@ -0,0 +1,328 @@
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// ***************************************************************************
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// ***************************************************************************
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// Copyright 2011(c) Analog Devices, Inc.
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//
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without modification,
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// are permitted provided that the following conditions are met:
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// - Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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// - Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in
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// the documentation and/or other materials provided with the
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// distribution.
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// - Neither the name of Analog Devices, Inc. nor the names of its
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// contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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// - The use of this software may or may not infringe the patent rights
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// of one or more patent holders. This license does not release you
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// from the requirement that you obtain separate licenses from these
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// patent holders to use this software.
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// - Use of the software either in source or binary form, must be run
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// on or directly connected to an Analog Devices Inc. component.
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//
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// THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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// INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A
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// PARTICULAR PURPOSE ARE DISCLAIMED.
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//
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// IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY
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// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
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// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// ***************************************************************************
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// ***************************************************************************
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`timescale 1ns/100ps
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module system_top (
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ddr_addr,
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ddr_ba,
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ddr_cas_n,
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ddr_ck_n,
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ddr_ck_p,
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ddr_cke,
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ddr_cs_n,
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ddr_dm,
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ddr_dq,
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ddr_dqs_n,
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ddr_dqs_p,
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ddr_odt,
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ddr_ras_n,
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ddr_reset_n,
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ddr_we_n,
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fixed_io_ddr_vrn,
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fixed_io_ddr_vrp,
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fixed_io_mio,
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fixed_io_ps_clk,
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fixed_io_ps_porb,
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fixed_io_ps_srstb,
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gpio_bd,
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hdmi_out_clk,
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hdmi_vsync,
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hdmi_hsync,
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hdmi_data_e,
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hdmi_data,
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spdif,
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iic_scl,
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iic_sda,
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rx_clk_in_p,
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rx_clk_in_n,
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rx_frame_in_p,
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rx_frame_in_n,
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rx_data_in_p,
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rx_data_in_n,
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tx_clk_out_p,
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tx_clk_out_n,
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tx_frame_out_p,
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tx_frame_out_n,
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tx_data_out_p,
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tx_data_out_n,
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enable,
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txnrx,
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tdd_sync,
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gpio_muxout_tx,
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gpio_muxout_rx,
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gpio_resetb,
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gpio_sync,
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gpio_en_agc,
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gpio_ctl,
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gpio_status,
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spi_csn,
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spi_clk,
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spi_mosi,
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spi_miso,
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spi_udc_csn_tx,
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spi_udc_csn_rx,
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spi_udc_sclk,
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spi_udc_data);
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inout [14:0] ddr_addr;
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inout [ 2:0] ddr_ba;
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inout ddr_cas_n;
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inout ddr_ck_n;
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inout ddr_ck_p;
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inout ddr_cke;
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inout ddr_cs_n;
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inout [ 3:0] ddr_dm;
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inout [31:0] ddr_dq;
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inout [ 3:0] ddr_dqs_n;
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inout [ 3:0] ddr_dqs_p;
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inout ddr_odt;
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inout ddr_ras_n;
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inout ddr_reset_n;
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inout ddr_we_n;
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inout fixed_io_ddr_vrn;
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inout fixed_io_ddr_vrp;
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inout [53:0] fixed_io_mio;
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inout fixed_io_ps_clk;
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inout fixed_io_ps_porb;
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inout fixed_io_ps_srstb;
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inout [14:0] gpio_bd;
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output hdmi_out_clk;
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output hdmi_vsync;
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output hdmi_hsync;
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output hdmi_data_e;
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output [23:0] hdmi_data;
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output spdif;
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inout iic_scl;
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inout iic_sda;
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input rx_clk_in_p;
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input rx_clk_in_n;
|
||||
input rx_frame_in_p;
|
||||
input rx_frame_in_n;
|
||||
input [ 5:0] rx_data_in_p;
|
||||
input [ 5:0] rx_data_in_n;
|
||||
output tx_clk_out_p;
|
||||
output tx_clk_out_n;
|
||||
output tx_frame_out_p;
|
||||
output tx_frame_out_n;
|
||||
output [ 5:0] tx_data_out_p;
|
||||
output [ 5:0] tx_data_out_n;
|
||||
|
||||
output enable;
|
||||
output txnrx;
|
||||
|
||||
inout tdd_sync;
|
||||
|
||||
inout gpio_muxout_tx;
|
||||
inout gpio_muxout_rx;
|
||||
inout gpio_resetb;
|
||||
inout gpio_sync;
|
||||
inout gpio_en_agc;
|
||||
inout [ 3:0] gpio_ctl;
|
||||
inout [ 7:0] gpio_status;
|
||||
|
||||
output spi_csn;
|
||||
output spi_clk;
|
||||
output spi_mosi;
|
||||
input spi_miso;
|
||||
|
||||
output spi_udc_csn_tx;
|
||||
output spi_udc_csn_rx;
|
||||
output spi_udc_sclk;
|
||||
output spi_udc_data;
|
||||
|
||||
// internal signals
|
||||
|
||||
wire [63:0] gpio_i;
|
||||
wire [63:0] gpio_o;
|
||||
wire [63:0] gpio_t;
|
||||
wire clk;
|
||||
wire dma_dac_dunf;
|
||||
wire core_dac_dunf;
|
||||
wire [63:0] dma_dac_ddata;
|
||||
wire [63:0] core_dac_ddata;
|
||||
wire dma_dac_en;
|
||||
wire core_dac_en;
|
||||
wire dma_dac_dvalid;
|
||||
wire core_dac_dvalid;
|
||||
wire dma_adc_ovf;
|
||||
wire core_adc_ovf;
|
||||
wire [63:0] dma_adc_ddata;
|
||||
wire [63:0] core_adc_ddata;
|
||||
wire dma_adc_dwr;
|
||||
wire core_adc_dwr;
|
||||
wire dma_adc_dsync;
|
||||
wire core_adc_dsync;
|
||||
wire [31:0] adc_gpio_input;
|
||||
wire [31:0] adc_gpio_output;
|
||||
wire [31:0] dac_gpio_input;
|
||||
wire [31:0] dac_gpio_output;
|
||||
wire tdd_sync_t;
|
||||
wire tdd_sync_o;
|
||||
wire tdd_sync_i;
|
||||
|
||||
// instantiations
|
||||
|
||||
ad_iobuf #(.DATA_WIDTH(17)) i_iobuf (
|
||||
.dio_t ({gpio_t[50:49], gpio_t[46:32]}),
|
||||
.dio_i ({gpio_o[50:49], gpio_o[46:32]}),
|
||||
.dio_o ({gpio_i[50:49], gpio_i[46:32]}),
|
||||
.dio_p ({ gpio_muxout_tx, // 50:50
|
||||
gpio_muxout_rx, // 49:49
|
||||
gpio_resetb, // 46:46
|
||||
gpio_sync, // 45:45
|
||||
gpio_en_agc, // 44:44
|
||||
gpio_ctl, // 43:40
|
||||
gpio_status})); // 39:32
|
||||
|
||||
ad_iobuf #(.DATA_WIDTH(15)) i_iobuf_bd (
|
||||
.dio_t (gpio_t[14:0]),
|
||||
.dio_i (gpio_o[14:0]),
|
||||
.dio_o (gpio_i[14:0]),
|
||||
.dio_p (gpio_bd));
|
||||
|
||||
ad_iobuf #(.DATA_WIDTH(1)) i_iobuf_tdd_sync (
|
||||
.dio_t (tdd_sync_t),
|
||||
.dio_i (tdd_sync_o),
|
||||
.dio_o (tdd_sync_i),
|
||||
.dio_p (tdd_sync));
|
||||
|
||||
system_wrapper i_system_wrapper (
|
||||
.ddr_addr (ddr_addr),
|
||||
.ddr_ba (ddr_ba),
|
||||
.ddr_cas_n (ddr_cas_n),
|
||||
.ddr_ck_n (ddr_ck_n),
|
||||
.ddr_ck_p (ddr_ck_p),
|
||||
.ddr_cke (ddr_cke),
|
||||
.ddr_cs_n (ddr_cs_n),
|
||||
.ddr_dm (ddr_dm),
|
||||
.ddr_dq (ddr_dq),
|
||||
.ddr_dqs_n (ddr_dqs_n),
|
||||
.ddr_dqs_p (ddr_dqs_p),
|
||||
.ddr_odt (ddr_odt),
|
||||
.ddr_ras_n (ddr_ras_n),
|
||||
.ddr_reset_n (ddr_reset_n),
|
||||
.ddr_we_n (ddr_we_n),
|
||||
.enable (enable),
|
||||
.fixed_io_ddr_vrn (fixed_io_ddr_vrn),
|
||||
.fixed_io_ddr_vrp (fixed_io_ddr_vrp),
|
||||
.fixed_io_mio (fixed_io_mio),
|
||||
.fixed_io_ps_clk (fixed_io_ps_clk),
|
||||
.fixed_io_ps_porb (fixed_io_ps_porb),
|
||||
.fixed_io_ps_srstb (fixed_io_ps_srstb),
|
||||
.gpio_i (gpio_i),
|
||||
.gpio_o (gpio_o),
|
||||
.gpio_t (gpio_t),
|
||||
.hdmi_data (hdmi_data),
|
||||
.hdmi_data_e (hdmi_data_e),
|
||||
.hdmi_hsync (hdmi_hsync),
|
||||
.hdmi_out_clk (hdmi_out_clk),
|
||||
.hdmi_vsync (hdmi_vsync),
|
||||
.iic_main_scl_io (iic_scl),
|
||||
.iic_main_sda_io (iic_sda),
|
||||
.ps_intr_00 (1'b0),
|
||||
.ps_intr_01 (1'b0),
|
||||
.ps_intr_02 (1'b0),
|
||||
.ps_intr_03 (1'b0),
|
||||
.ps_intr_04 (1'b0),
|
||||
.ps_intr_05 (1'b0),
|
||||
.ps_intr_06 (1'b0),
|
||||
.ps_intr_07 (1'b0),
|
||||
.ps_intr_08 (1'b0),
|
||||
.ps_intr_09 (1'b0),
|
||||
.ps_intr_10 (1'b0),
|
||||
.ps_intr_11 (1'b0),
|
||||
.rx_clk_in_n (rx_clk_in_n),
|
||||
.rx_clk_in_p (rx_clk_in_p),
|
||||
.rx_data_in_n (rx_data_in_n),
|
||||
.rx_data_in_p (rx_data_in_p),
|
||||
.rx_frame_in_n (rx_frame_in_n),
|
||||
.rx_frame_in_p (rx_frame_in_p),
|
||||
.spdif (spdif),
|
||||
.spi0_clk_i (1'b0),
|
||||
.spi0_clk_o (spi_clk),
|
||||
.spi0_csn_0_o (spi_csn),
|
||||
.spi0_csn_1_o (),
|
||||
.spi0_csn_2_o (),
|
||||
.spi0_csn_i (1'b1),
|
||||
.spi0_sdi_i (spi_miso),
|
||||
.spi0_sdo_i (1'b0),
|
||||
.spi0_sdo_o (spi_mosi),
|
||||
.spi1_clk_i (1'b0),
|
||||
.spi1_clk_o (spi_udc_sclk),
|
||||
.spi1_csn_0_o (spi_udc_csn_tx),
|
||||
.spi1_csn_1_o (spi_udc_csn_rx),
|
||||
.spi1_csn_2_o (),
|
||||
.spi1_csn_i (1'b1),
|
||||
.spi1_sdi_i (1'b0),
|
||||
.spi1_sdo_i (spi_udc_data),
|
||||
.spi1_sdo_o (spi_udc_data),
|
||||
.tdd_sync_i (tdd_sync_i),
|
||||
.tdd_sync_o (tdd_sync_o),
|
||||
.tdd_sync_t (tdd_sync_t),
|
||||
.tx_clk_out_n (tx_clk_out_n),
|
||||
.tx_clk_out_p (tx_clk_out_p),
|
||||
.tx_data_out_n (tx_data_out_n),
|
||||
.tx_data_out_p (tx_data_out_p),
|
||||
.tx_frame_out_n (tx_frame_out_n),
|
||||
.tx_frame_out_p (tx_frame_out_p),
|
||||
.txnrx (txnrx),
|
||||
.up_enable (gpio_o[47]),
|
||||
.up_txnrx (gpio_o[48]));
|
||||
|
||||
endmodule
|
||||
|
||||
// ***************************************************************************
|
||||
// ***************************************************************************
|
||||
Loading…
Reference in New Issue