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adrv9009/a10gx: Delete redundant timing constraints

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Istvan Csomortani 2020-03-16 09:14:47 +00:00 committed by Adrian Costina
parent 02ada3bbf7
commit a66029aef3
1 changed files with 0 additions and 7 deletions
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7
projects/adrv9009/a10gx/system_constr.sdc
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@ -8,12 +8,5 @@ derive_clock_uncertainty
set_false_path -from [get_registers *altera_reset_synchronizer:alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out*]
if {[string equal "quartus_fit" $::TimeQuestInfo(nameofexecutable)]} {
set_max_delay -from [get_clocks *sys_ddr3_cntrl_phy_clk_l*] -to [get_clocks *sys_ddr3_cntrl_core_usr_clk*] 0.150
set_min_delay -from [get_clocks *sys_ddr3_cntrl_phy_clk_l*] -to [get_clocks *sys_ddr3_cntrl_core_usr_clk*] 0.000
}
# flash interface
set_false_path -from * -to [get_ports {flash_resetn}]