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arradio: Add i2c interface

main
AndreiGrozav 2017-06-29 17:26:58 +03:00
parent 8755e6da44
commit a765a9c709
3 changed files with 42 additions and 0 deletions
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12
projects/arradio/c5soc/system_project.tcl
View File

@ -88,6 +88,18 @@ set_instance_assignment -name IO_STANDARD "2.5 V" -to spi_clk
set_instance_assignment -name IO_STANDARD "2.5 V" -to spi_mosi
set_instance_assignment -name IO_STANDARD "2.5 V" -to spi_miso
set_location_assignment PIN_F15 -to scl
set_location_assignment PIN_G13 -to sda
set_location_assignment PIN_C7 -to ga0
set_location_assignment PIN_H14 -to ga1
set_instance_assignment -name IO_STANDARD "2.5 V" -to scl
set_instance_assignment -name IO_STANDARD "2.5 V" -to sda
set_instance_assignment -name IO_STANDARD "2.5 V" -to ga0
set_instance_assignment -name IO_STANDARD "2.5 V" -to ga1
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to scl
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to sda
set_instance_assignment -name AUTO_SHIFT_REGISTER_RECOGNITION OFF -to * -entity axi_ad9361
execute_flow -compile

22
projects/arradio/c5soc/system_top.v
View File

@ -136,6 +136,13 @@ module system_top (
output ad9361_en_agc,
output ad9361_sync,
// iic interface
inout scl,
inout sda,
output ga0,
output ga1,
// spi interface
output spi_csn,
@ -151,6 +158,11 @@ module system_top (
wire [ 31:0] sys_gpio_i;
wire [ 31:0] sys_gpio_o;
wire i2c0_out_data;
wire i2c0_sda;
wire i2c0_out_clk;
wire i2c0_scl_in_clk;
// defaults
assign vga_blank_n = 1'b1;
@ -165,6 +177,12 @@ module system_top (
assign ad9361_en_agc = sys_gpio_o[3];
assign ad9361_sync = sys_gpio_o[2];
assign ga0 = 1'b0;
assign ga1 = 1'b0;
ALT_IOBUF scl_iobuf (.i(1'b0), .oe(i2c0_out_clk), .o(i2c0_scl_in_clk), .io(scl));
ALT_IOBUF sda_iobuf (.i(1'b0), .oe(i2c0_out_data), .o(i2c0_sda), .io(sda));
// instantiations
system_bd i_system_bd (
@ -234,6 +252,10 @@ module system_top (
.sys_hps_hps_io_hps_io_spim1_inst_SS0 (spim1_ss0),
.sys_hps_hps_io_hps_io_uart0_inst_RX (uart0_rx),
.sys_hps_hps_io_hps_io_uart0_inst_TX (uart0_tx),
.sys_hps_i2c0_out_data(i2c0_out_data),
.sys_hps_i2c0_sda(i2c0_sda),
.sys_hps_i2c0_clk_clk(i2c0_out_clk),
.sys_hps_i2c0_scl_in_clk(i2c0_scl_in_clk),
.sys_hps_memory_mem_a (ddr3_a),
.sys_hps_memory_mem_ba (ddr3_ba),
.sys_hps_memory_mem_ck (ddr3_ck_p),

8
projects/common/c5soc/c5soc_system_qsys.tcl
View File

@ -40,6 +40,8 @@ set_instance_parameter_value sys_hps {UART0_PinMuxing} {HPS I/O Set 0}
set_instance_parameter_value sys_hps {UART0_Mode} {No Flow Control}
set_instance_parameter_value sys_hps {UART1_PinMuxing} {Unused}
set_instance_parameter_value sys_hps {UART1_Mode} {N/A}
set_instance_parameter_value sys_hps {I2C0_PinMuxing} {FPGA}
set_instance_parameter_value sys_hps {I2C0_Mode} {Full}
set_instance_parameter_value sys_hps {desired_cfg_clk_mhz} {80.0}
set_instance_parameter_value sys_hps {S2FCLK_USER0CLK_Enable} {1}
set_instance_parameter_value sys_hps {S2FCLK_USER1CLK_Enable} {0}
@ -101,6 +103,12 @@ add_connection sys_clk.clk sys_hps.f2h_sdram0_clock
add_connection sys_clk.clk sys_hps.h2f_axi_clock
add_connection sys_clk.clk sys_hps.f2h_axi_clock
add_connection sys_clk.clk sys_hps.h2f_lw_axi_clock
add_interface sys_hps_i2c0 conduit end
set_interface_property sys_hps_i2c0 EXPORT_OF sys_hps.i2c0
add_interface sys_hps_i2c0_clk clock source
set_interface_property sys_hps_i2c0_clk EXPORT_OF sys_hps.i2c0_clk
add_interface sys_hps_i2c0_scl_in clock sink
set_interface_property sys_hps_i2c0_scl_in EXPORT_OF sys_hps.i2c0_scl_in
# cpu/hps handling