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axi_hdmi_rx: Drop TPG enable from register map 

The TPG is no longer part of the RX core and the corresponding bit in the
register map isn't hooked up to anything. So drop it.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
main
Lars-Peter Clausen 2015-06-26 10:59:27 +02:00
parent a2a4f3402c
commit ab6ea2c824
3 changed files with 1 additions and 16 deletions
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3
library/axi_hdmi_rx/axi_hdmi_rx.v
View File

@ -129,7 +129,6 @@ module axi_hdmi_rx (
wire hdmi_bgr_s;
wire hdmi_packed_s;
wire hdmi_csc_bypass_s;
wire hdmi_tpg_enable_s;
wire [15:0] hdmi_vs_count_s;
wire [15:0] hdmi_hs_count_s;
wire hdmi_tpm_oos_s;
@ -189,7 +188,6 @@ module axi_hdmi_rx (
.hdmi_bgr (hdmi_bgr_s),
.hdmi_packed (hdmi_packed_s),
.hdmi_csc_bypass (hdmi_csc_bypass_s),
.hdmi_tpg_enable (hdmi_tpg_enable_s),
.hdmi_vs_count (hdmi_vs_count_s),
.hdmi_hs_count (hdmi_hs_count_s),
.hdmi_dma_ovf (hdmi_dma_ovf),
@ -223,7 +221,6 @@ module axi_hdmi_rx (
.hdmi_bgr (hdmi_bgr_s),
.hdmi_packed (hdmi_packed_s),
.hdmi_csc_bypass (hdmi_csc_bypass_s),
.hdmi_tpg_enable (hdmi_tpg_enable_s),
.hdmi_vs_count (hdmi_vs_count_s),
.hdmi_hs_count (hdmi_hs_count_s),
.hdmi_tpm_oos (hdmi_tpm_oos_s),

2
library/axi_hdmi_rx/axi_hdmi_rx_core.v
View File

@ -47,7 +47,6 @@ module axi_hdmi_rx_core (
hdmi_bgr,
hdmi_packed,
hdmi_csc_bypass,
hdmi_tpg_enable,
hdmi_vs_count,
hdmi_hs_count,
hdmi_tpm_oos,
@ -73,7 +72,6 @@ module axi_hdmi_rx_core (
input hdmi_bgr;
input hdmi_packed;
input hdmi_csc_bypass;
input hdmi_tpg_enable;
input [15:0] hdmi_vs_count;
input [15:0] hdmi_hs_count;
output hdmi_tpm_oos;

12
library/common/up_hdmi_rx.v
View File

@ -45,7 +45,6 @@ module up_hdmi_rx (
hdmi_bgr,
hdmi_packed,
hdmi_csc_bypass,
hdmi_tpg_enable,
hdmi_vs_count,
hdmi_hs_count,
hdmi_dma_ovf,
@ -85,7 +84,6 @@ module up_hdmi_rx (
output hdmi_bgr;
output hdmi_packed;
output hdmi_csc_bypass;
output hdmi_tpg_enable;
output [15:0] hdmi_vs_count;
output [15:0] hdmi_hs_count;
input hdmi_dma_ovf;
@ -121,7 +119,6 @@ module up_hdmi_rx (
reg up_bgr = 'd0;
reg up_packed = 'd0;
reg up_csc_bypass = 'd0;
reg up_tpg_enable = 'd0;
reg up_dma_ovf = 'd0;
reg up_dma_unf = 'd0;
reg up_tpm_oos = 'd0;
@ -166,7 +163,6 @@ module up_hdmi_rx (
up_bgr <= 'd0;
up_packed <= 'd0;
up_csc_bypass <= 'd0;
up_tpg_enable <= 'd0;
up_dma_ovf <= 'd0;
up_dma_unf <= 'd0;
up_tpm_oos <= 'd0;
@ -190,9 +186,6 @@ module up_hdmi_rx (
up_packed <= up_wdata[1];
up_csc_bypass <= up_wdata[0];
end
if ((up_wreq_s == 1'b1) && (up_waddr[11:0] == 12'h012)) begin
up_tpg_enable <= up_wdata[0];
end
if (up_dma_ovf_s == 1'b1) begin
up_dma_ovf <= 1'b1;
end else if ((up_wreq_s == 1'b1) && (up_waddr[11:0] == 12'h018)) begin
@ -250,7 +243,6 @@ module up_hdmi_rx (
12'h002: up_rdata <= up_scratch;
12'h010: up_rdata <= {31'h0, up_resetn};
12'h011: up_rdata <= {28'h0, up_edge_sel, up_bgr, up_packed, up_csc_bypass};
12'h012: up_rdata <= {31'h0, up_tpg_enable};
12'h015: up_rdata <= up_clk_count_s;
12'h016: up_rdata <= hdmi_clk_ratio;
12'h018: up_rdata <= {30'h0, up_dma_ovf, up_dma_unf};
@ -274,14 +266,13 @@ module up_hdmi_rx (
// hdmi control & status
up_xfer_cntrl #(.DATA_WIDTH(37)) i_hdmi_xfer_cntrl (
up_xfer_cntrl #(.DATA_WIDTH(36)) i_hdmi_xfer_cntrl (
.up_rstn (up_rstn),
.up_clk (up_clk),
.up_data_cntrl ({ up_edge_sel,
up_bgr,
up_packed,
up_csc_bypass,
up_tpg_enable,
up_vs_count,
up_hs_count}),
.up_xfer_done (),
@ -291,7 +282,6 @@ module up_hdmi_rx (
hdmi_bgr,
hdmi_packed,
hdmi_csc_bypass,
hdmi_tpg_enable,
hdmi_vs_count,
hdmi_hs_count}));