axi_dacfifo: No overflow for DAC

main
Istvan Csomortani 2016-05-17 17:04:12 +03:00
parent 81ade7f26c
commit aca3038919
3 changed files with 2 additions and 16 deletions

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@ -57,7 +57,6 @@ module axi_dacfifo (
dac_valid,
dac_data,
dac_dunf,
dac_dovf,
dac_xfer_out,
dac_fifo_bypass,
@ -138,7 +137,6 @@ module axi_dacfifo (
input dac_valid;
output [(DAC_DATA_WIDTH-1):0] dac_data;
output dac_dunf;
output dac_dovf;
output dac_xfer_out;
input dac_fifo_bypass;
@ -297,8 +295,7 @@ module axi_dacfifo (
.dac_valid (dac_valid),
.dac_data (dac_data_s),
.dac_xfer_out (dac_xfer_out),
.dac_dunf (dac_dunf),
.dac_dovf (dac_dovf));
.dac_dunf (dac_dunf));
// output logic

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@ -52,9 +52,7 @@ module axi_dacfifo_dac (
dac_valid,
dac_data,
dac_xfer_out,
dac_dunf,
dac_dovf
dac_dunf
);
// parameters
@ -87,7 +85,6 @@ module axi_dacfifo_dac (
output [(DAC_DATA_WIDTH-1):0] dac_data;
output dac_xfer_out;
output dac_dunf;
output dac_dovf;
// internal registers
@ -100,7 +97,6 @@ module axi_dacfifo_dac (
reg axi_almost_full = 1'b0;
reg axi_dwunf = 1'b0;
reg axi_almost_empty = 1'b0;
reg axi_dwovf = 1'b0;
reg dac_rd = 'd0;
reg dac_rd_d = 'd0;
@ -109,7 +105,6 @@ module axi_dacfifo_dac (
reg [(DAC_ADDRESS_WIDTH-1):0] dac_raddr_g = 'd0;
reg [ 2:0] dac_dunf_m = 3'b0;
reg [ 2:0] dac_dovf_m = 3'b0;
reg [ 2:0] dac_xfer_req_m = 3'b0;
// internal signals
@ -189,7 +184,6 @@ module axi_dacfifo_dac (
axi_almost_full <= 1'b0;
axi_dwunf <= 1'b0;
axi_almost_empty <= 1'b0;
axi_dwovf <= 1'b0;
end else begin
axi_raddr_m <= g2b(dac_raddr_g);
axi_raddr <= axi_raddr_m;
@ -210,17 +204,14 @@ module axi_dacfifo_dac (
axi_almost_empty <= 1'b0;
end
axi_dwunf <= (axi_addr_diff == 0) ? 1'b1 : 1'b0;
axi_dwovf <= (axi_addr_diff == {(DAC_ADDRESS_WIDTH){1'b1}}) ? 1'b1 : 1'b0;
end
end
always @(posedge dac_clk) begin
dac_dunf_m <= {dac_dunf_m[1:0], axi_dwunf};
dac_dovf_m <= {dac_dovf_m[1:0], axi_dwovf};
dac_xfer_req_m <= {dac_xfer_req_m[1:0], axi_xfer_req};
end
assign dac_dovf = dac_dovf_m[2];
assign dac_dunf = dac_dunf_m[2];
assign dac_xfer_out = dac_xfer_req_m[2];

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@ -23,7 +23,6 @@ proc p_plddr3_dacfifo {p_name m_name dma_data_width dac_data_width} {
create_bd_pin -dir I dac_valid
create_bd_pin -dir O -from [expr ($dac_data_width-1)] -to 0 dac_data
create_bd_pin -dir O dac_dunf
create_bd_pin -dir O dac_dovf
create_bd_pin -dir O dac_xfer_out
create_bd_pin -dir I dac_fifo_bypass
@ -85,7 +84,6 @@ proc p_plddr3_dacfifo {p_name m_name dma_data_width dac_data_width} {
ad_connect dac_valid axi_dacfifo/dac_valid
ad_connect dac_data axi_dacfifo/dac_data
ad_connect dac_dunf axi_dacfifo/dac_dunf
ad_connect dac_dovf axi_dacfifo/dac_dovf
ad_connect dac_xfer_out axi_dacfifo/dac_xfer_out
ad_connect axi_ddr_cntrl/device_temp_i GND