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axi_dmac: Fix block ram constraint 

If the internal FIFO is larger than one block ram there will be multiple
BRAMs called ram_reg[0], ram_reg[1]. Modify the BRAM constraint rule so that
it matches these as well.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
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Lars-Peter Clausen 2015-04-21 18:40:36 +02:00
parent a100ecd308
commit ae808ba942
1 changed files with 1 additions and 1 deletions
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library/axi_dmac/axi_dmac_constr.xdc
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@ -177,7 +177,7 @@ set_false_path -quiet \
# Not sure why, but it seems the built-in constraints for the RAM36B are wrong
set_max_delay -quiet \
-from $async_dest_to_src_clk \
-to [get_pins -hier ram_reg/REGCEB -filter {NAME =~ *i_fifo*}] \
-to [get_pins -hier ram_reg*/REGCEB -filter {NAME =~ *i_fifo*}] \
[get_property PERIOD $dest_clk] -datapath_only
# Ignore timing for debug signals to register map