diff --git a/projects/adv7511/kc705/system_bd.tcl b/projects/adv7511/kc705/system_bd.tcl new file mode 100755 index 000000000..578fb63f1 --- /dev/null +++ b/projects/adv7511/kc705/system_bd.tcl @@ -0,0 +1,8 @@ + +source ../../scripts/kc705_system_bd.tcl +set_property -dict [list CONFIG.NUM_MI {13}] $axi_interconnect_1 +set_property -dict [list CONFIG.NUM_SI {5}] $axi_interconnect_2 +set_property -dict [list CONFIG.NUM_MI {1}] $axi_interconnect_2 +set_property -dict [list CONFIG.NUM_PORTS {8}] $concat_intc_1 + + diff --git a/projects/adv7511/kc705/system_project.tcl b/projects/adv7511/kc705/system_project.tcl new file mode 100755 index 000000000..33d74462b --- /dev/null +++ b/projects/adv7511/kc705/system_project.tcl @@ -0,0 +1,11 @@ + + +source ../../scripts/adi_project.tcl + +adi_project_create adv7511_kc705 +adi_project_files adv7511_kc705 [list \ + "system_top.v" \ + "../../scripts/kc705_system_constr.xdc" ] + +adi_project_run adv7511_kc705 + diff --git a/projects/adv7511/kc705/system_top.v b/projects/adv7511/kc705/system_top.v new file mode 100755 index 000000000..bc7c83cb9 --- /dev/null +++ b/projects/adv7511/kc705/system_top.v @@ -0,0 +1,210 @@ +// *************************************************************************** +// *************************************************************************** +// Copyright 2011(c) Analog Devices, Inc. +// +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without modification, +// are permitted provided that the following conditions are met: +// - Redistributions of source code must retain the above copyright +// notice, this list of conditions and the following disclaimer. +// - Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in +// the documentation and/or other materials provided with the +// distribution. +// - Neither the name of Analog Devices, Inc. nor the names of its +// contributors may be used to endorse or promote products derived +// from this software without specific prior written permission. +// - The use of this software may or may not infringe the patent rights +// of one or more patent holders. This license does not release you +// from the requirement that you obtain separate licenses from these +// patent holders to use this software. +// - Use of the software either in source or binary form, must be run +// on or directly connected to an Analog Devices Inc. component. +// +// THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, +// INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A +// PARTICULAR PURPOSE ARE DISCLAIMED. +// +// IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY +// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR +// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF +// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// *************************************************************************** +// *************************************************************************** +// *************************************************************************** +// *************************************************************************** + +`timescale 1ns/100ps + +module system_top ( + + sys_rst, + sys_clk_p, + sys_clk_n, + + uart_sin, + uart_sout, + + ddr3_1_n, + ddr3_1_p, + ddr3_reset_n, + ddr3_addr, + ddr3_ba, + ddr3_cas_n, + ddr3_ras_n, + ddr3_we_n, + ddr3_ck_n, + ddr3_ck_p, + ddr3_cke, + ddr3_cs_n, + ddr3_dm, + ddr3_dq, + ddr3_dqs_n, + ddr3_dqs_p, + ddr3_odt, + + mdio_mdc, + mdio_mdio_io, + mii_rst_n, + mii_col, + mii_crs, + mii_rx_clk, + mii_rx_er, + mii_rx_dv, + mii_rxd, + mii_tx_clk, + mii_tx_en, + mii_txd, + + fan_pwm, + + gpio_lcd, + gpio_led, + gpio_sw, + + iic_rstn, + iic_scl, + iic_sda, + + hdmi_out_clk, + hdmi_hsync, + hdmi_vsync, + hdmi_data_e, + hdmi_data, + + spdif); + + input sys_rst; + input sys_clk_p; + input sys_clk_n; + + input uart_sin; + output uart_sout; + + output [ 2:0] ddr3_1_n; + output [ 1:0] ddr3_1_p; + output ddr3_reset_n; + output [13:0] ddr3_addr; + output [ 2:0] ddr3_ba; + output ddr3_cas_n; + output ddr3_ras_n; + output ddr3_we_n; + output [ 0:0] ddr3_ck_n; + output [ 0:0] ddr3_ck_p; + output [ 0:0] ddr3_cke; + output [ 0:0] ddr3_cs_n; + output [ 7:0] ddr3_dm; + inout [63:0] ddr3_dq; + inout [ 7:0] ddr3_dqs_n; + inout [ 7:0] ddr3_dqs_p; + output [ 0:0] ddr3_odt; + + output mdio_mdc; + inout mdio_mdio_io; + output mii_rst_n; + input mii_col; + input mii_crs; + input mii_rx_clk; + input mii_rx_er; + input mii_rx_dv; + input [ 3:0] mii_rxd; + input mii_tx_clk; + output mii_tx_en; + output [ 3:0] mii_txd; + + output fan_pwm; + + output [ 6:0] gpio_lcd; + output [ 7:0] gpio_led; + input [ 8:0] gpio_sw; + + output iic_rstn; + inout iic_scl; + inout iic_sda; + + output hdmi_out_clk; + output hdmi_hsync; + output hdmi_vsync; + output hdmi_data_e; + output [15:0] hdmi_data; + + output spdif; + + // instantiations + + system_wrapper i_system_wrapper ( + .ddr3_1_n (ddr3_1_n), + .ddr3_1_p (ddr3_1_p), + .ddr3_addr (ddr3_addr), + .ddr3_ba (ddr3_ba), + .ddr3_cas_n (ddr3_cas_n), + .ddr3_ck_n (ddr3_ck_n), + .ddr3_ck_p (ddr3_ck_p), + .ddr3_cke (ddr3_cke), + .ddr3_cs_n (ddr3_cs_n), + .ddr3_dm (ddr3_dm), + .ddr3_dq (ddr3_dq), + .ddr3_dqs_n (ddr3_dqs_n), + .ddr3_dqs_p (ddr3_dqs_p), + .ddr3_odt (ddr3_odt), + .ddr3_ras_n (ddr3_ras_n), + .ddr3_reset_n (ddr3_reset_n), + .ddr3_we_n (ddr3_we_n), + .fan_pwm (fan_pwm), + .gpio_lcd_tri_o (gpio_lcd), + .gpio_led_tri_o (gpio_led), + .gpio_sw_tri_i (gpio_sw), + .hdmi_data (hdmi_data), + .hdmi_data_e (hdmi_data_e), + .hdmi_hsync (hdmi_hsync), + .hdmi_out_clk (hdmi_out_clk), + .hdmi_vsync (hdmi_vsync), + .iic_main_scl_io (iic_scl), + .iic_main_sda_io (iic_sda), + .iic_rstn (iic_rstn), + .mdio_mdc (mdio_mdc), + .mdio_mdio_io (mdio_mdio_io), + .mii_col (mii_col), + .mii_crs (mii_crs), + .mii_rst_n (mii_rst_n), + .mii_rx_clk (mii_rx_clk), + .mii_rx_dv (mii_rx_dv), + .mii_rx_er (mii_rx_er), + .mii_rxd (mii_rxd), + .mii_tx_clk (mii_tx_clk), + .mii_tx_en (mii_tx_en), + .mii_txd (mii_txd), + .spdif (spdif), + .sys_clk_n (sys_clk_n), + .sys_clk_p (sys_clk_p), + .sys_rst (sys_rst), + .uart_sin (uart_sin), + .uart_sout (uart_sout)); + +endmodule + +// *************************************************************************** +// ***************************************************************************