From b3f06af77a43c230aad0b9c6e6bba6014ccbf39b Mon Sep 17 00:00:00 2001 From: Rejeesh Kutty Date: Wed, 22 Mar 2017 09:25:50 -0400 Subject: [PATCH] altera srf files do not work --- projects/common/a10gx/a10gx_system_assign.tcl | 1 - projects/common/a10soc/a10soc_system_assign.tcl | 1 - projects/common/altera/messages.srf | 1 - 3 files changed, 3 deletions(-) delete mode 100644 projects/common/altera/messages.srf diff --git a/projects/common/a10gx/a10gx_system_assign.tcl b/projects/common/a10gx/a10gx_system_assign.tcl index 20bb9a8d7..2b081ad34 100755 --- a/projects/common/a10gx/a10gx_system_assign.tcl +++ b/projects/common/a10gx/a10gx_system_assign.tcl @@ -8,7 +8,6 @@ set_global_assignment -name DEVICE 10AX115S3F45E2SGE3 set_global_assignment -name MESSAGE_DISABLE 17951 ; ## disable unused RX channels message set_global_assignment -name MESSAGE_DISABLE 18655 ; ## disable unused TX channels message -set_global_assignment -name SOURCE_FILE $ad_hdl_dir/projects/common/altera/messages.srf # clocks and resets diff --git a/projects/common/a10soc/a10soc_system_assign.tcl b/projects/common/a10soc/a10soc_system_assign.tcl index 34474b390..3efc48393 100755 --- a/projects/common/a10soc/a10soc_system_assign.tcl +++ b/projects/common/a10soc/a10soc_system_assign.tcl @@ -8,7 +8,6 @@ set_global_assignment -name DEVICE 10AS066N3F40E2SGE2 set_global_assignment -name MESSAGE_DISABLE 17951 ; ## disable unused RX channels message set_global_assignment -name MESSAGE_DISABLE 18655 ; ## disable unused TX channels message -set_global_assignment -name SOURCE_FILE $ad_hdl_dir/projects/common/altera/messages.srf # clocks and resets diff --git a/projects/common/altera/messages.srf b/projects/common/altera/messages.srf deleted file mode 100644 index d0dd20c4d..000000000 --- a/projects/common/altera/messages.srf +++ /dev/null @@ -1 +0,0 @@ -{ "" "" "" "Timing analysis was performed using a non-final timing model and/or constraints. You must regenerate the external memory interface IP and recheck timing closure in a future version of Quartus Prime." { } { } 0 0 "" 0 0 "Design Software" 0 -1 0 ""}