From b582b9ed99dd00c1eeed9f6b4769006b6b5e26f0 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Tue, 1 Aug 2017 07:38:43 +0200 Subject: [PATCH] util_upack: util_upack_hw.tcl: Disable unused interfaces instead of not creating them Currently the util_upack_hw.tcl script does not create interfaces if they are not used in the current configuration. This has the disadvantage that the ports belonging to these interfaces are not included in the generated HDL wrapper. Which will generate a fair bunch of warnings when synthesizing the HDL. Instead always generate all interfaces, but disable those that are not used in the current configuration. This will make sure that the ports belonging to these interfaces are properly tied-off in the generate wrapper HDL. This reduces the amount of false positive warnings generated and makes it easier to spot actual issues. Signed-off-by: Lars-Peter Clausen --- library/util_upack/util_upack_hw.tcl | 27 ++++++++++++--------------- 1 file changed, 12 insertions(+), 15 deletions(-) diff --git a/library/util_upack/util_upack_hw.tcl b/library/util_upack/util_upack_hw.tcl index ecfed57e8..883a2067e 100644 --- a/library/util_upack/util_upack_hw.tcl +++ b/library/util_upack/util_upack_hw.tcl @@ -21,25 +21,22 @@ ad_alt_intf signal dac_valid output 1 valid ad_alt_intf signal dac_sync output 1 sync ad_alt_intf signal dac_data input NUM_OF_CHANNELS*CHANNEL_DATA_WIDTH data -add_interface dac_ch_0 conduit end -add_interface_port dac_ch_0 dac_enable_0 enable Input 1 -add_interface_port dac_ch_0 dac_valid_0 valid Input 1 -add_interface_port dac_ch_0 dac_valid_out_0 data_valid Output 1 -add_interface_port dac_ch_0 dac_data_0 data Output CHANNEL_DATA_WIDTH -set_interface_property dac_ch_0 associatedClock if_dac_clk -set_interface_property dac_ch_0 associatedReset none +for {set n 0} {$n < 8} {incr n} { + add_interface dac_ch_${n} conduit end + add_interface_port dac_ch_${n} dac_enable_${n} enable Input 1 + add_interface_port dac_ch_${n} dac_valid_${n} valid Input 1 + add_interface_port dac_ch_${n} dac_valid_out_${n} data_valid Output 1 + add_interface_port dac_ch_${n} dac_data_${n} data Output CHANNEL_DATA_WIDTH + set_interface_property dac_ch_${n} associatedClock if_dac_clk + set_interface_property dac_ch_${n} associatedReset none +} proc util_upack_elab {} { + set num_channels [get_parameter_value NUM_OF_CHANNELS] for {set n 1} {$n < 8} {incr n} { - if {[get_parameter_value NUM_OF_CHANNELS] > $n} { - add_interface dac_ch_${n} conduit end - add_interface_port dac_ch_${n} dac_enable_${n} enable Input 1 - add_interface_port dac_ch_${n} dac_valid_${n} valid Input 1 - add_interface_port dac_ch_${n} dac_valid_out_${n} data_valid Output 1 - add_interface_port dac_ch_${n} dac_data_${n} data Output CHANNEL_DATA_WIDTH - set_interface_property dac_ch_${n} associatedClock if_dac_clk - set_interface_property dac_ch_${n} associatedReset none + if {$n >= $num_channels} { + set_interface_property dac_ch_${n} ENABLED false } } }