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jesd204:tx_ctrl: Fix sync_bits instance

main
Istvan Csomortani 2018-04-04 10:08:35 +01:00 committed by István Csomortáni
parent 0b20dbc2c9
commit b632debc35
1 changed files with 8 additions and 11 deletions
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19
library/jesd204/jesd204_tx/jesd204_tx_ctrl.v
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@ -93,17 +93,14 @@ reg cgs_enable = 1'b1;
wire [NUM_LINKS-1:0] status_sync_cdc;
genvar i;
generate
for (i=0; i<NUM_LINKS; i=i+1) begin : SYNC_CDC
sync_bits i_cdc_sync (
.in(sync[i]),
.out_clk(clk),
.out_resetn(1'b1),
.out(status_sync_cdc[i])
);
end
endgenerate
sync_bits #(
.NUM_OF_BITS (NUM_LINKS))
i_cdc_sync (
.in(sync),
.out_clk(clk),
.out_resetn(1'b1),
.out(status_sync_cdc)
);
assign status_sync = status_sync_cdc ^ cfg_links_disable;
always @(posedge clk) begin