updated 9680 hdl files(to resolve a critical warning)
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@ -44,8 +44,8 @@ module axi_ad9680 (
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rx_clk,
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rx_sof,
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rx_data,
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rx_valid,
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rx_data,
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rx_ready,
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// dma interface
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@ -93,9 +93,8 @@ module axi_ad9680 (
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input rx_clk;
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input [ 3:0] rx_sof;
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input [127:0] rx_data;
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input rx_valid;
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input [127:0] rx_data;
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output rx_ready;
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// dma interface
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@ -26,6 +26,7 @@ adi_ip_properties axi_ad9680
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adi_ip_constraints axi_ad9680 [list \
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"$ad_hdl_dir/library/common/ad_axi_ip_constr.xdc" ]
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set_property driver_value 0 [ipx::get_ports *rx_valid* -of_objects [ipx::current_core]]
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set_property driver_value 0 [ipx::get_ports *dovf* -of_objects [ipx::current_core]]
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set_property driver_value 0 [ipx::get_ports *dunf* -of_objects [ipx::current_core]]
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