jesd204: Slightly rework sysref handling
For SYSREF handling there are now three possible modes. 1) Disabled. In this mode the LMFC is generated internally and all external SYSREF edges are ignored. This mode should be used for subclass 0 when no external sysref is available. 2) Continuous SYSREF. An external SYSREF signal is required and the LMFC is aligned to the SYSREF signal. The SYSREF signal is continuously monitored and if a edge unaligned to the previous edges is detected the LMFC is re-aligned to the new edge. 3) Oneshot SYSREF. Oneshot SYSREF mode is similar to continuous SYSREF mode except only the first edge is captured and all further edges are ignored, re-alignment will not happen. Both in continuous and oneshot signal at least one external sysref edge is required before an LMFC is generated. All events that require an LMFC will be delayed until a SYSREF edge has been captured. This is done to avoid accidental re-alignment. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>main
parent
bf88527119
commit
baa256e34c
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@ -59,7 +59,7 @@ module jesd204_up_sysref (
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output reg up_cfg_sysref_oneshot,
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output reg [7:0] up_cfg_lmfc_offset,
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output reg up_cfg_sysref_required,
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output reg up_cfg_sysref_disable,
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input core_event_sysref_alignment_error
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);
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@ -70,7 +70,11 @@ wire up_status_sysref_captured;
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always @(*) begin
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case (up_raddr)
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/* JESD SYSREF configuraton */
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12'h040: up_rdata <= {30'h00,up_cfg_sysref_required,up_cfg_sysref_oneshot};
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12'h040: up_rdata <= {
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/* 02-31 */ 30'h00, /* Reserved for future use */
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/* 01 */ up_cfg_sysref_oneshot,
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/* 00 */ up_cfg_sysref_disable
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};
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12'h041: up_rdata <= up_cfg_lmfc_offset;
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default: up_rdata <= 32'h00000000;
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endcase
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@ -80,13 +84,13 @@ always @(posedge up_clk) begin
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if (up_reset == 1'b1) begin
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up_cfg_sysref_oneshot <= 1'b0;
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up_cfg_lmfc_offset <= 'h00;
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up_cfg_sysref_required <= 1'b1;
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up_cfg_sysref_disable <= 1'b0;
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end else if (up_wreq == 1'b1 && up_cfg_is_writeable == 1'b1) begin
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case (up_waddr)
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/* JESD SYSREF configuraton */
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12'h040: begin
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up_cfg_sysref_required <= up_wdata[1];
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up_cfg_sysref_oneshot <= up_wdata[0];
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up_cfg_sysref_oneshot <= up_wdata[1];
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up_cfg_sysref_disable <= up_wdata[0];
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end
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12'h041: up_cfg_lmfc_offset <= up_wdata[7:0];
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endcase
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@ -81,7 +81,7 @@ module axi_jesd204_rx #(
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output core_cfg_disable_char_replacement,
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output [7:0] core_cfg_lmfc_offset,
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output core_cfg_sysref_oneshot,
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output core_cfg_sysref_required,
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output core_cfg_sysref_disable,
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output core_cfg_buffer_early_release,
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output [7:0] core_cfg_buffer_delay,
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@ -118,7 +118,7 @@ wire [4:0] up_irq_trigger = 5'b00000;
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wire up_cfg_is_writeable;
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wire up_cfg_sysref_oneshot;
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wire up_cfg_sysref_required;
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wire up_cfg_sysref_disable;
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wire up_cfg_buffer_early_release;
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wire [7:0] up_cfg_buffer_delay;
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wire [7:0] up_cfg_lmfc_offset;
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@ -195,14 +195,14 @@ jesd204_up_common #(
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.core_cfg_disable_char_replacement(core_cfg_disable_char_replacement),
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.up_extra_cfg({
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/* 18 */ up_cfg_sysref_required,
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/* 18 */ up_cfg_sysref_disable,
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/* 17 */ up_cfg_sysref_oneshot,
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/* 16 */ up_cfg_buffer_early_release,
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/* 08-15 */ up_cfg_buffer_delay,
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/* 00-07 */ up_cfg_lmfc_offset
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}),
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.core_extra_cfg({
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/* 18 */ core_cfg_sysref_required,
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/* 18 */ core_cfg_sysref_disable,
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/* 17 */ core_cfg_sysref_oneshot,
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/* 16 */ core_cfg_buffer_early_release,
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/* 08-15 */ core_cfg_buffer_delay,
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@ -227,7 +227,7 @@ jesd204_up_sysref i_up_sysref (
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.up_cfg_lmfc_offset(up_cfg_lmfc_offset),
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.up_cfg_sysref_oneshot(up_cfg_sysref_oneshot),
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.up_cfg_sysref_required(up_cfg_sysref_required)
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.up_cfg_sysref_disable(up_cfg_sysref_disable)
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);
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jesd204_up_rx #(
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@ -80,7 +80,7 @@ adi_add_bus "rx_cfg" "master" \
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{ "core_cfg_octets_per_frame" "octets_per_frame" } \
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{ "core_cfg_lmfc_offset" "lmfc_offset" } \
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{ "core_cfg_sysref_oneshot" "sysref_oneshot" } \
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{ "core_cfg_sysref_required" "sysref_required" } \
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{ "core_cfg_sysref_disable" "sysref_disable" } \
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{ "core_cfg_buffer_early_release" "buffer_early_release" } \
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{ "core_cfg_buffer_delay" "buffer_delay" } \
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{ "core_cfg_disable_char_replacement" "disable_char_replacement" } \
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@ -80,7 +80,7 @@ module axi_jesd204_tx #(
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output [7:0] core_cfg_octets_per_frame,
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output [7:0] core_cfg_lmfc_offset,
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output core_cfg_sysref_oneshot,
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output core_cfg_sysref_required,
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output core_cfg_sysref_disable,
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output core_cfg_continuous_cgs,
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output core_cfg_continuous_ilas,
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output core_cfg_skip_ilas,
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@ -125,7 +125,7 @@ wire up_cfg_continuous_cgs;
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wire [7:0] up_cfg_mframes_per_ilas;
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wire [7:0] up_cfg_lmfc_offset;
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wire up_cfg_sysref_oneshot;
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wire up_cfg_sysref_required;
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wire up_cfg_sysref_disable;
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wire up_cfg_is_writeable;
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wire [4:0] up_irq_trigger;
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@ -216,7 +216,7 @@ jesd204_up_common #(
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.core_cfg_disable_char_replacement(core_cfg_disable_char_replacement),
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.up_extra_cfg({
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/* 20 */ up_cfg_sysref_required,
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/* 20 */ up_cfg_sysref_disable,
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/* 19 */ up_cfg_sysref_oneshot,
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/* 18 */ up_cfg_continuous_cgs,
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/* 17 */ up_cfg_continuous_ilas,
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@ -225,7 +225,7 @@ jesd204_up_common #(
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/* 00-07 */ up_cfg_mframes_per_ilas
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}),
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.core_extra_cfg({
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/* 20 */ core_cfg_sysref_required,
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/* 20 */ core_cfg_sysref_disable,
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/* 19 */ core_cfg_sysref_oneshot,
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/* 18 */ core_cfg_continuous_cgs,
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/* 17 */ core_cfg_continuous_ilas,
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@ -244,7 +244,7 @@ jesd204_up_sysref i_up_sysref (
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.up_cfg_lmfc_offset(up_cfg_lmfc_offset),
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.up_cfg_sysref_oneshot(up_cfg_sysref_oneshot),
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.up_cfg_sysref_required(up_cfg_sysref_required),
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.up_cfg_sysref_disable(up_cfg_sysref_disable),
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.up_raddr(up_raddr),
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.up_rdata(up_rdata_sysref),
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@ -78,7 +78,7 @@ adi_add_bus "tx_cfg" "master" \
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{ "core_cfg_octets_per_frame" "octets_per_frame" } \
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{ "core_cfg_lmfc_offset" "lmfc_offset" } \
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{ "core_cfg_sysref_oneshot" "sysref_oneshot" } \
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{ "core_cfg_sysref_required" "sysref_required" } \
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{ "core_cfg_sysref_disable" "sysref_disable" } \
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{ "core_cfg_continuous_cgs" "continuous_cgs" } \
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{ "core_cfg_continuous_ilas" "continuous_ilas" } \
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{ "core_cfg_skip_ilas" "skip_ilas" } \
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@ -51,9 +51,8 @@ module jesd204_lmfc (
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input [7:0] cfg_beats_per_multiframe,
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input [7:0] cfg_lmfc_offset,
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input cfg_sysref_oneshot,
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input cfg_sysref_required,
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input clear_sysref_captured,
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input cfg_sysref_disable,
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output reg lmfc_edge,
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output reg lmfc_clk,
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@ -93,7 +92,7 @@ always @(posedge clk) begin
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end
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always @(posedge clk) begin
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if (sysref_d3 == 1'b0 && sysref_d2 == 1'b1) begin
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if (sysref_d3 == 1'b0 && sysref_d2 == 1'b1 && cfg_sysref_disable == 1'b0) begin
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sysref_edge <= 1'b1;
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end else begin
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sysref_edge <= 1'b0;
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@ -129,8 +128,8 @@ end
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always @(posedge clk) begin
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if (reset == 1'b1) begin
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lmfc_counter <= 'h00;
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lmfc_active <= ~cfg_sysref_required;
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lmfc_counter <= 'h01;
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lmfc_active <= cfg_sysref_disable;
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end else begin
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/*
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* In oneshot mode only the first occurence of the
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@ -155,7 +154,7 @@ always @(posedge clk) begin
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* setting.
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*/
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sysref_alignment_error <= 1'b0;
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if (sysref_edge == 1'b1 &&
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if (sysref_edge == 1'b1 && lmfc_active == 1'b1 &&
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lmfc_counter_next != cfg_lmfc_offset) begin
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sysref_alignment_error <= 1'b1;
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end
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@ -99,7 +99,7 @@ adi_add_bus "rx_cfg" "slave" \
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{ "cfg_octets_per_frame" "octets_per_frame" } \
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{ "cfg_lmfc_offset" "lmfc_offset" } \
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{ "cfg_sysref_oneshot" "sysref_oneshot" } \
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{ "cfg_sysref_required" "sysref_required" } \
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{ "cfg_sysref_disable" "sysref_disable" } \
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{ "cfg_buffer_delay" "buffer_delay" } \
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{ "cfg_buffer_early_release" "buffer_early_release" } \
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{ "cfg_disable_char_replacement" "disable_char_replacement" } \
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@ -73,7 +73,7 @@ module jesd204_rx #(
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input [7:0] cfg_beats_per_multiframe,
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input [7:0] cfg_octets_per_frame,
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input [7:0] cfg_lmfc_offset,
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input cfg_sysref_required,
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input cfg_sysref_disable,
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input cfg_sysref_oneshot,
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input cfg_buffer_early_release,
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input [7:0] cfg_buffer_delay,
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@ -213,7 +213,7 @@ jesd204_lmfc i_lmfc (
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.cfg_beats_per_multiframe(cfg_beats_per_multiframe),
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.cfg_lmfc_offset(cfg_lmfc_offset),
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.cfg_sysref_oneshot(cfg_sysref_oneshot),
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.cfg_sysref_required(cfg_sysref_required),
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.cfg_sysref_disable(cfg_sysref_disable),
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.sysref(sysref),
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.lmfc_edge(lmfc_edge),
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@ -61,7 +61,7 @@ adi_add_bus "rx_cfg" "master" \
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{ "cfg_octets_per_frame" "octets_per_frame" } \
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{ "cfg_lmfc_offset" "lmfc_offset" } \
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{ "cfg_sysref_oneshot" "sysref_oneshot" } \
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{ "cfg_sysref_required" "sysref_required" } \
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{ "cfg_sysref_disable" "sysref_disable" } \
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{ "cfg_buffer_early_release" "buffer_early_release" } \
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}
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adi_add_bus_clock "clk" "rx_cfg"
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@ -56,7 +56,7 @@ module jesd204_rx_static_config #(
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output [7:0] cfg_octets_per_frame,
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output [7:0] cfg_lmfc_offset,
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output cfg_sysref_oneshot,
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output cfg_sysref_required,
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output cfg_sysref_disable,
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output [7:0] cfg_buffer_delay,
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output cfg_buffer_early_release,
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@ -68,7 +68,7 @@ assign cfg_beats_per_multiframe = (FRAMES_PER_MULTIFRAME * OCTETS_PER_FRAME / 4)
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assign cfg_octets_per_frame = OCTETS_PER_FRAME - 1;
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assign cfg_lmfc_offset = 3;
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assign cfg_sysref_oneshot = 1'b0;
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assign cfg_sysref_required = 1'b1;
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assign cfg_sysref_disable = 1'b0;
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assign cfg_buffer_delay = 'hb;
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assign cfg_buffer_early_release = BUFFER_EARLY_RELEASE;
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assign cfg_lanes_disable = {NUM_LANES{1'b0}};
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@ -92,7 +92,7 @@ adi_add_bus "tx_cfg" "slave" \
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{ "cfg_octets_per_frame" "octets_per_frame" } \
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{ "cfg_lmfc_offset" "lmfc_offset" } \
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{ "cfg_sysref_oneshot" "sysref_oneshot" } \
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{ "cfg_sysref_required" "sysref_required" } \
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{ "cfg_sysref_disable" "sysref_disable" } \
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{ "cfg_continuous_cgs" "continuous_cgs" } \
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{ "cfg_continuous_ilas" "continuous_ilas" } \
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{ "cfg_skip_ilas" "skip_ilas" } \
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@ -65,7 +65,7 @@ module jesd204_tx #(
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input [7:0] cfg_octets_per_frame,
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input [7:0] cfg_lmfc_offset,
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input cfg_sysref_oneshot,
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input cfg_sysref_required,
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input cfg_sysref_disable,
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input cfg_continuous_cgs,
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input cfg_continuous_ilas,
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input cfg_skip_ilas,
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@ -123,7 +123,7 @@ jesd204_lmfc i_lmfc (
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.cfg_beats_per_multiframe(cfg_beats_per_multiframe),
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.cfg_lmfc_offset(cfg_lmfc_offset),
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.cfg_sysref_oneshot(cfg_sysref_oneshot),
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.cfg_sysref_required(cfg_sysref_required),
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.cfg_sysref_disable(cfg_sysref_disable),
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.sysref(sysref),
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@ -62,7 +62,7 @@ adi_add_bus "tx_cfg" "master" \
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{ "cfg_octets_per_frame" "octets_per_frame" } \
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{ "cfg_lmfc_offset" "lmfc_offset" } \
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{ "cfg_sysref_oneshot" "sysref_oneshot" } \
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{ "cfg_sysref_required" "sysref_required" } \
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{ "cfg_sysref_disable" "sysref_disable" } \
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{ "cfg_continuous_cgs" "continuous_cgs" } \
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{ "cfg_continuous_ilas" "continuous_ilas" } \
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{ "cfg_skip_ilas" "skip_ilas" } \
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@ -59,7 +59,7 @@ module jesd204_tx_static_config #(
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output [7:0] cfg_octets_per_frame,
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output [7:0] cfg_lmfc_offset,
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output cfg_sysref_oneshot,
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output cfg_sysref_required,
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output cfg_sysref_disable,
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output cfg_continuous_cgs,
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output cfg_continuous_ilas,
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output cfg_skip_ilas,
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@ -76,7 +76,7 @@ assign cfg_beats_per_multiframe = (FRAMES_PER_MULTIFRAME * OCTETS_PER_FRAME / 4)
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assign cfg_octets_per_frame = OCTETS_PER_FRAME - 1;
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assign cfg_lmfc_offset = 3;
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assign cfg_sysref_oneshot = 1'b0;
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assign cfg_sysref_required = 1'b1;
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assign cfg_sysref_disable = 1'b0;
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assign cfg_continuous_cgs = 1'b0;
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assign cfg_continuous_ilas = 1'b0;
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assign cfg_skip_ilas = 1'b0;
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@ -136,7 +136,8 @@ module loopback_tb;
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wire [7:0] tx_cfg_beats_per_multiframe;
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wire [7:0] tx_cfg_octets_per_frame;
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wire [7:0] tx_cfg_lmfc_offset;
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wire tx_cfg_sysref_required;
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wire tx_cfg_sysref_disable;
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wire tx_cfg_sysref_oneshot;
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wire tx_cfg_continuous_cgs;
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wire tx_cfg_continuous_ilas;
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wire tx_cfg_skip_ilas;
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@ -160,7 +161,8 @@ module loopback_tb;
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.cfg_beats_per_multiframe(tx_cfg_beats_per_multiframe),
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.cfg_octets_per_frame(tx_cfg_octets_per_frame),
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.cfg_lmfc_offset(tx_cfg_lmfc_offset),
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.cfg_sysref_required(tx_cfg_sysref_required),
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.cfg_sysref_disable(tx_cfg_sysref_disable),
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.cfg_sysref_oneshot(tx_cfg_sysref_oneshot),
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.cfg_continuous_cgs(tx_cfg_continuous_cgs),
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.cfg_continuous_ilas(tx_cfg_continuous_ilas),
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.cfg_skip_ilas(tx_cfg_skip_ilas),
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@ -183,7 +185,8 @@ module loopback_tb;
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.cfg_beats_per_multiframe(tx_cfg_beats_per_multiframe),
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.cfg_octets_per_frame(tx_cfg_octets_per_frame),
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.cfg_lmfc_offset(tx_cfg_lmfc_offset),
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.cfg_sysref_required(tx_cfg_sysref_required),
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.cfg_sysref_disable(tx_cfg_sysref_disable),
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.cfg_sysref_oneshot(tx_cfg_sysref_oneshot),
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.cfg_continuous_cgs(tx_cfg_continuous_cgs),
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.cfg_continuous_ilas(tx_cfg_continuous_ilas),
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.cfg_skip_ilas(tx_cfg_skip_ilas),
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@ -211,7 +214,8 @@ module loopback_tb;
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wire [7:0] rx_cfg_beats_per_multiframe;
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wire [7:0] rx_cfg_octets_per_frame;
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wire [7:0] rx_cfg_lmfc_offset;
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wire rx_sysref_required;
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wire rx_sysref_disable;
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wire rx_sysref_oneshot;
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wire rx_cfg_disable_scrambler;
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wire rx_cfg_disable_char_replacement;
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wire rx_cfg_buffer_early_release;
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@ -232,7 +236,8 @@ module loopback_tb;
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.cfg_beats_per_multiframe(rx_cfg_beats_per_multiframe),
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.cfg_octets_per_frame(rx_cfg_octets_per_frame),
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.cfg_lmfc_offset(rx_cfg_lmfc_offset),
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.cfg_sysref_required(rx_cfg_sysref_required),
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.cfg_sysref_disable(rx_cfg_sysref_disable),
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.cfg_sysref_oneshot(rx_cfg_sysref_oneshot),
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.cfg_disable_scrambler(rx_cfg_disable_scrambler),
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.cfg_disable_char_replacement(rx_cfg_disable_char_replacement),
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.cfg_buffer_delay(rx_cfg_buffer_delay),
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|
@ -249,7 +254,8 @@ module loopback_tb;
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.cfg_beats_per_multiframe(rx_cfg_beats_per_multiframe),
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||||
.cfg_octets_per_frame(rx_cfg_octets_per_frame),
|
||||
.cfg_lmfc_offset(rx_cfg_lmfc_offset),
|
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.cfg_sysref_required(rx_cfg_sysref_required),
|
||||
.cfg_sysref_disable(rx_cfg_sysref_disable),
|
||||
.cfg_sysref_oneshot(rx_cfg_sysref_oneshot),
|
||||
.cfg_disable_scrambler(rx_cfg_disable_scrambler),
|
||||
.cfg_disable_char_replacement(rx_cfg_disable_char_replacement),
|
||||
.cfg_buffer_delay(rx_cfg_buffer_delay),
|
||||
|
|
|
@ -138,7 +138,7 @@ module rx_tb;
|
|||
wire [7:0] cfg_octets_per_frame;
|
||||
wire [7:0] cfg_lmfc_offset;
|
||||
wire cfg_sysref_oneshot;
|
||||
wire cfg_sysref_required;
|
||||
wire cfg_sysref_disable;
|
||||
wire cfg_buffer_early_release;
|
||||
wire cfg_disable_scrambler;
|
||||
|
||||
|
@ -154,7 +154,7 @@ module rx_tb;
|
|||
.cfg_octets_per_frame(cfg_octets_per_frame),
|
||||
.cfg_lmfc_offset(cfg_lmfc_offset),
|
||||
.cfg_sysref_oneshot(cfg_sysref_oneshot),
|
||||
.cfg_sysref_required(cfg_sysref_required),
|
||||
.cfg_sysref_disable(cfg_sysref_disable),
|
||||
.cfg_disable_scrambler(tx_cfg_disable_scrambler),
|
||||
.cfg_buffer_early_release(rx_buffer_early_release)
|
||||
);
|
||||
|
@ -170,7 +170,7 @@ module rx_tb;
|
|||
.cfg_octets_per_frame(cfg_octets_per_frame),
|
||||
.cfg_lmfc_offset(cfg_lmfc_offset),
|
||||
.cfg_sysref_oneshot(cfg_sysref_oneshot),
|
||||
.cfg_sysref_required(cfg_sysref_required),
|
||||
.cfg_sysref_disable(cfg_sysref_disable),
|
||||
.cfg_disable_scrambler(tx_cfg_disable_scrambler),
|
||||
.cfg_buffer_early_release(rx_buffer_early_release),
|
||||
|
||||
|
|
|
@ -78,7 +78,7 @@ module tx_tb;
|
|||
wire [7:0] cfg_octets_per_frame;
|
||||
wire [7:0] cfg_lmfc_offset;
|
||||
wire cfg_sysref_oneshot;
|
||||
wire cfg_sysref_required;
|
||||
wire cfg_sysref_disable;
|
||||
wire cfg_continuous_cgs;
|
||||
wire cfg_continuous_ilas;
|
||||
wire cfg_skip_ilas;
|
||||
|
@ -106,7 +106,7 @@ module tx_tb;
|
|||
.cfg_disable_char_replacement(cfg_disable_char_replacement),
|
||||
.cfg_disable_scrambler(cfg_disable_scrambler),
|
||||
.cfg_sysref_oneshot(cfg_sysref_oneshot),
|
||||
.cfg_sysref_required(cfg_sysref_required),
|
||||
.cfg_sysref_disable(cfg_sysref_disable),
|
||||
|
||||
.ilas_config_rd(tx_ilas_config_rd),
|
||||
.ilas_config_addr(tx_ilas_config_addr),
|
||||
|
@ -130,7 +130,7 @@ module tx_tb;
|
|||
.cfg_disable_char_replacement(cfg_disable_char_replacement),
|
||||
.cfg_disable_scrambler(cfg_disable_scrambler),
|
||||
.cfg_sysref_oneshot(cfg_sysref_oneshot),
|
||||
.cfg_sysref_required(cfg_sysref_required),
|
||||
.cfg_sysref_disable(cfg_sysref_disable),
|
||||
|
||||
.ilas_config_rd(tx_ilas_config_rd),
|
||||
.ilas_config_addr(tx_ilas_config_addr),
|
||||
|
|
Loading…
Reference in New Issue