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spi_engine: Fixup param ranges and CPHA info (#1239) 

Set validation ranges for DATA_WIDTH and NUM_OF_CS for the expected
min/max values in the verilog source code.
Also, fix swapped description for CPHA in the documentation.

Signed-off-by: Carlos Oliveira <caosjr8@gmail.com>
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caosjr 2023-12-18 10:52:26 -03:00 committed by GitHub
parent 870b27d3d3
commit bad1d03678
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2 changed files with 5 additions and 5 deletions
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6
docs/library/spi_engine/instruction-format.rst
View File

@ -210,9 +210,9 @@ bus behavior.
high.
* - [0]
- CPHA
- Configures the phase of the SCLK signal. When 0, data is updated on the
leading edge and sampled on the trailing edge. When 1, data is is
sampled on the leading edge and updated on the trailing edge.
- Configures the phase of the SCLK signal. When 0, data is sampled on the
leading edge and updated on the trailing edge. When 1, data is
sampled on the trailing edge and updated on the leading edge.
.. _spi_engine prescaler-configuration-register:

4
library/spi_engine/spi_engine_execution/spi_engine_execution_ip.tcl
View File

@ -62,7 +62,7 @@ set cc [ipx::current_core]
set_property -dict [list \
"value_validation_type" "range_long" \
"value_validation_range_minimum" "8" \
"value_validation_range_maximum" "256" \
"value_validation_range_maximum" "32" \
] \
[ipx::get_user_parameters DATA_WIDTH -of_objects $cc]
@ -70,7 +70,7 @@ set_property -dict [list \
set_property -dict [list \
"value_validation_type" "range_long" \
"value_validation_range_minimum" "1" \
"value_validation_range_maximum" "32" \
"value_validation_range_maximum" "8" \
] \
[ipx::get_user_parameters NUM_OF_CS -of_objects $cc]