parent
c748b3bbc7
commit
bb3027995a
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@ -6,10 +6,13 @@
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PROJECT_NAME := adv7513_de10nano
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M_DEPS += ../../scripts/adi_pd.tcl
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M_DEPS += ../../common/de10nano/de10nano_system_qsys.tcl
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M_DEPS += ../../common/de10nano/de10nano_system_assign.tcl
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LIB_DEPS += axi_dmac
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LIB_DEPS += axi_hdmi_tx
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LIB_DEPS += axi_sysid
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LIB_DEPS += sysid_rom
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include ../../scripts/project-intel.mk
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@ -1,3 +1,12 @@
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source $ad_hdl_dir/projects/scripts/adi_pd.tcl
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source $ad_hdl_dir/projects/common/de10nano/de10nano_system_qsys.tcl
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#system ID
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set_instance_parameter_value axi_sysid_0 {ROM_ADDR_BITS} {9}
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set_instance_parameter_value rom_sys_0 {ROM_ADDR_BITS} {9}
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set_instance_parameter_value rom_sys_0 {PATH_TO_FILE} "[pwd]/mem_init_sys.txt"
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sysid_gen_sys_init_file;
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@ -7,14 +7,17 @@
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PROJECT_NAME := cn0540_de10nano
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M_DEPS += ../common/cn0540_qsys.tcl
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M_DEPS += ../../scripts/adi_pd.tcl
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M_DEPS += ../../common/de10nano/de10nano_system_qsys.tcl
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M_DEPS += ../../common/de10nano/de10nano_system_assign.tcl
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LIB_DEPS += axi_dmac
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LIB_DEPS += axi_hdmi_tx
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LIB_DEPS += axi_sysid
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LIB_DEPS += spi_engine/axi_spi_engine
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LIB_DEPS += spi_engine/spi_engine_execution
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LIB_DEPS += spi_engine/spi_engine_interconnect
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LIB_DEPS += spi_engine/spi_engine_offload
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LIB_DEPS += sysid_rom
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include ../../scripts/project-intel.mk
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@ -1,6 +1,15 @@
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set dac_fifo_address_width 10
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source $ad_hdl_dir/projects/scripts/adi_pd.tcl
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source $ad_hdl_dir/projects/common/de10nano/de10nano_system_qsys.tcl
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source ../common/cn0540_qsys.tcl
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#system ID
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set_instance_parameter_value axi_sysid_0 {ROM_ADDR_BITS} {9}
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set_instance_parameter_value rom_sys_0 {ROM_ADDR_BITS} {9}
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set_instance_parameter_value rom_sys_0 {PATH_TO_FILE} "[pwd]/mem_init_sys.txt"
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sysid_gen_sys_init_file;
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@ -164,6 +164,20 @@ set_instance_parameter_value sys_id {id} {-1395322110}
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add_connection sys_clk.clk sys_id.clk
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add_connection sys_clk.clk_reset sys_id.reset
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# system id
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add_instance axi_sysid_0 axi_sysid
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add_instance rom_sys_0 sysid_rom
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add_connection axi_sysid_0.if_rom_addr rom_sys_0.if_rom_addr
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add_connection rom_sys_0.if_rom_data axi_sysid_0.if_sys_rom_data
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add_connection sys_clk.clk rom_sys_0.if_clk
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add_connection sys_clk.clk axi_sysid_0.s_axi_clock
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add_connection sys_clk.clk_reset axi_sysid_0.s_axi_reset
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add_interface pr_rom_data_nc conduit end
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set_interface_property pr_rom_data_nc EXPORT_OF axi_sysid_0.if_pr_rom_data
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# gpio-bd
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add_instance sys_gpio_bd altera_avalon_pio
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@ -333,4 +347,5 @@ ad_cpu_interconnect 0x00090000 axi_hdmi_tx_0.s_axi
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ad_cpu_interconnect 0x00100000 pixel_clk_pll_reconfig.mgmt_avalon_slave
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ad_cpu_interconnect 0x00109000 sys_gpio_out.s1
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ad_cpu_interconnect 0x0010A000 ltc2308_spi.spi_control_port
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ad_cpu_interconnect 0x00018000 axi_sysid_0.s_axi
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