adrv9001/zed: Connect TDD sync to PMOD JA1
parent
a47cc59c67
commit
bb44e5399f
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@ -57,3 +57,7 @@ set_property -dict {PACKAGE_PIN R15 IOSTANDARD LVCMOS18} [get_ports gpio_bd[
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set_property -dict {PACKAGE_PIN K15 IOSTANDARD LVCMOS18} [get_ports gpio_bd[29]] ; ## XADC-GIO2
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set_property -dict {PACKAGE_PIN J15 IOSTANDARD LVCMOS18} [get_ports gpio_bd[30]] ; ## XADC-GIO3
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set_property -dict {PACKAGE_PIN G17 IOSTANDARD LVCMOS18} [get_ports gpio_bd[31]] ; ## OTG-RESETN
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set_property -dict {PACKAGE_PIN Y11 IOSTANDARD LVCMOS33} [get_ports tdd_sync] ; ## JA1.JA1
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@ -155,7 +155,9 @@ module system_top (
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inout sm_fan_tach,
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input vadj_err,
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output platform_status
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output platform_status,
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inout tdd_sync
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);
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// internal registers
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@ -182,6 +184,9 @@ module system_top (
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wire rx2_enable_s;
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wire tx1_enable_s;
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wire tx2_enable_s;
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wire tdd_sync_loc;
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wire tdd_sync_i;
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wire tdd_sync_cntr;
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// instantiations
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@ -229,6 +234,13 @@ module system_top (
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assign gpio_i[55] = vadj_err;
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assign gpio_i[63:56] = gpio_o[63:56];
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assign tdd_sync_loc = gpio_o[56];
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// tdd_sync_loc - local sync signal from a GPIO or other source
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// tdd_sync - external sync
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assign tdd_sync_i = tdd_sync_cntr ? tdd_sync_loc : tdd_sync;
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assign tdd_sync = tdd_sync_cntr ? tdd_sync_loc : 1'bz;
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ad_iobuf #(.DATA_WIDTH(2)) i_iobuf_iic_scl (
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.dio_t ({iic_mux_scl_t_s,iic_mux_scl_t_s}),
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.dio_i (iic_mux_scl_o_s),
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@ -342,6 +354,9 @@ module system_top (
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.gpio_tx1_enable_in (gpio_tx1_enable_in),
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.gpio_tx2_enable_in (gpio_tx2_enable_in),
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.tdd_sync (tdd_sync_i),
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.tdd_sync_cntr (tdd_sync_cntr),
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.spi0_clk_i (1'b0),
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.spi0_clk_o (spi_clk_s),
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.spi0_csn_0_o (spi_en_s),
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