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axi_ltc2387: Make adc_valid to represent the current sample 

* Before, adc_valid was for the previous sample. This said that
   at the second rising edge of clk_gate - the first sample is valid,
   which is not true

 * Alongside with the software issue that will be solved, these fixes
   will make the first 2 samples to be with valid data, otherwise the
   user has to always keep in mind that the first 2 ones are invalid

Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com>
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Iulia Moldovan 2022-08-23 15:44:24 +01:00 committed by imoldovan
parent 474b8d5bed
commit bc94402b91
1 changed files with 2 additions and 1 deletions
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library/axi_ltc2387/axi_ltc2387_if.v
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@ -96,7 +96,8 @@ module axi_ltc2387_if #(
// assignments // assignments
assign adc_valid = ~clk_gate_d[2] & clk_gate_d[1]; // adc_valid is 1 for the current sample that is sent
assign adc_valid = clk_gate_d[1] & ~clk_gate_d[0];
always @(posedge clk) begin always @(posedge clk) begin
clk_gate_d <= {clk_gate_d[1:0], clk_gate}; clk_gate_d <= {clk_gate_d[1:0], clk_gate};