fmcomms2_tdd: Update tdd_enabaled path

This line controls the mux, which switch between hdl and software (GPIO) control of the ENABLE/TXNRX pins.
Fix the broken path and change the name from "tdd_enable" to "tdd_enabled".
main
Istvan Csomortani 2015-08-11 12:24:26 +03:00
parent 8e536ad8d1
commit bcee3e04d4
5 changed files with 18 additions and 17 deletions

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@ -108,7 +108,7 @@ module axi_ad9361 (
dac_dunf,
dac_r1_mode,
tdd_enable,
tdd_enabled,
enable,
txnrx,
@ -227,7 +227,7 @@ module axi_ad9361 (
input dac_dunf;
output dac_r1_mode;
output tdd_enable;
output tdd_enabled;
output enable;
output txnrx;
@ -407,7 +407,7 @@ module axi_ad9361 (
.tdd_tx_vco_en(tdd_tx_vco_en_s),
.tdd_rx_rf_en(tdd_rx_rf_en_s),
.tdd_tx_rf_en(tdd_tx_rf_en_s),
.tdd_enable (tdd_enable),
.tdd_enabled (tdd_enabled),
.tdd_status(tdd_status_s),
.tdd_sync_req(tdd_sync_req),
.tdd_sync_ack(tdd_sync_ack),

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@ -55,7 +55,7 @@ module axi_ad9361_tdd (
// status signal
tdd_enable,
tdd_enabled,
tdd_status,
// sync signals
@ -111,7 +111,7 @@ module axi_ad9361_tdd (
output tdd_rx_rf_en;
output tdd_tx_rf_en;
output tdd_enable;
output tdd_enabled;
input [ 7:0] tdd_status;
inout tdd_sync_req;
@ -156,7 +156,6 @@ module axi_ad9361_tdd (
output [41:0] tdd_dbg;
reg tdd_enable = 1'b0;
reg tdd_slave_synced = 1'b0;
reg tdd_sync_o = 1'b0;
@ -223,6 +222,8 @@ module axi_ad9361_tdd (
assign tdd_rx_valid_q1 = ((tdd_enable_synced_s & tdd_gated_rx_dmapath_s) == 1'b1) ?
(rx_valid_q1 & tdd_rx_rf_en) : rx_valid_q1;
assign tdd_enabled = tdd_enable_synced_s;
// instantiations
up_tdd_cntrl i_up_tdd_cntrl(

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@ -17,7 +17,7 @@ create_bd_port -dir O -from 5 -to 0 tx_data_out_n
create_bd_port -dir O enable
create_bd_port -dir O txnrx
create_bd_port -dir O tdd_enable
create_bd_port -dir O tdd_enabled
create_bd_port -dir IO tdd_sync_req
create_bd_port -dir IO tdd_sync_ack
@ -142,7 +142,7 @@ ad_connect axi_ad9361_dac_dma/fifo_rd_underflow axi_ad9361/dac_dunf
ad_connect tdd_sync_req axi_ad9361/tdd_sync_req
ad_connect tdd_sync_ack axi_ad9361/tdd_sync_ack
ad_connect tdd_enable axi_ad9361/tdd_enable
ad_connect tdd_enabled axi_ad9361/tdd_enabled
# interconnects
@ -195,6 +195,6 @@ set_property -dict [list CONFIG.C_PROBE3_WIDTH {35}] $ila_adc
ad_connect axi_ad9361_clk ila_tdd/clk
ad_connect axi_ad9361/enable ila_tdd/probe0
ad_connect axi_ad9361/txnrx ila_tdd/probe1
ad_connect axi_ad9361/tdd_enable ila_tdd/probe2
ad_connect axi_ad9361/tdd_enabled ila_tdd/probe2
ad_connect axi_ad9361/tdd_dbg ila_tdd/probe3

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@ -225,7 +225,7 @@ module system_top (
wire [63:0] gpio_o;
wire [63:0] gpio_t;
wire tdd_enable_s;
wire tdd_enabled_s;
wire gpio_enable;
wire gpio_txnrx;
wire enable_s;
@ -234,8 +234,8 @@ module system_top (
// assignments
assign hdmi_pd = 1'b0;
assign enable = (tdd_enable_s == 1'b1) ? enable_s : gpio_enable;
assign txnrx = (tdd_enable_s == 1'b1) ? txnrx_s : gpio_txnrx;
assign enable = (tdd_enabled_s == 1'b1) ? enable_s : gpio_enable;
assign txnrx = (tdd_enabled_s == 1'b1) ? txnrx_s : gpio_txnrx;
// instantiations
@ -363,7 +363,7 @@ module system_top (
.tx_frame_out_n (tx_frame_out_n),
.tx_frame_out_p (tx_frame_out_p),
.txnrx (txnrx_s),
.tdd_enable (tdd_enable_s),
.tdd_enabled (tdd_enabled_s),
.tdd_sync_req (tdd_sync_req),
.tdd_sync_ack (tdd_sync_ack));

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@ -212,14 +212,14 @@ module system_top (
wire [31:0] dac_gpio_input;
wire [31:0] dac_gpio_output;
wire tdd_enable_s;
wire tdd_enabled_s;
wire gpio_enable;
wire gpio_txnrx;
wire enable_s;
wire txnrx_s;
assign enable = (tdd_enable_s == 1'b1) ? enable_s : gpio_enable;
assign txnrx = (tdd_enable_s == 1'b1) ? txnrx_s : gpio_txnrx;
assign enable = (tdd_enabled_s == 1'b1) ? enable_s : gpio_enable;
assign txnrx = (tdd_enabled_s == 1'b1) ? txnrx_s : gpio_txnrx;
// instantiations
@ -320,7 +320,7 @@ module system_top (
.tx_frame_out_n (tx_frame_out_n),
.tx_frame_out_p (tx_frame_out_p),
.txnrx (txnrx_s),
.tdd_enable (tdd_enable_s),
.tdd_enabled (tdd_enabled_s),
.tdd_sync_req(tdd_sync_req),
.tdd_sync_ack(tdd_sync_ack));