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ad9081_fmca_ebz/a10soc: Make second sync CMOS and GPIO controllable

main
Laszlo Nagy 2022-05-20 15:11:14 +01:00 committed by Laszlo Nagy
parent a2da965391
commit bdd5686e95
2 changed files with 25 additions and 19 deletions
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25
projects/ad9081_fmca_ebz/a10soc/system_project.tcl
View File

@ -109,14 +109,14 @@ set_location_assignment PIN_J36 -to "tx_data[4](n)" ; ## A35 DP4_C2M_N
set_location_assignment PIN_J37 -to "tx_data[4]" ; ## A34 DP4_C2M_P
set_location_assignment PIN_K38 -to "tx_data[3](n)" ; ## A31 DP3_C2M_N
set_location_assignment PIN_K39 -to "tx_data[3]" ; ## A30 DP3_C2M_P
set_location_assignment PIN_D13 -to "fpga_syncin[0](n)" ; ## H08 LA02_N
set_location_assignment PIN_C13 -to "fpga_syncin[0]" ; ## H07 LA02_P
set_location_assignment PIN_D14 -to "fpga_syncin[1](n)" ; ## G10 LA03_N
set_location_assignment PIN_C14 -to "fpga_syncin[1]" ; ## G09 LA03_P
set_location_assignment PIN_E13 -to "fpga_syncout[0](n)" ; ## D09 LA01_CC_N
set_location_assignment PIN_E12 -to "fpga_syncout[0]" ; ## D08 LA01_CC_P
set_location_assignment PIN_B10 -to "fpga_syncout[1](n)" ; ## C11 LA06_N
set_location_assignment PIN_A10 -to "fpga_syncout[1]" ; ## C10 LA06_P
set_location_assignment PIN_D13 -to "fpga_syncin_0(n)" ; ## H08 LA02_N
set_location_assignment PIN_C13 -to "fpga_syncin_0" ; ## H07 LA02_P
set_location_assignment PIN_D14 -to "fpga_syncin_1_n" ; ## G10 LA03_N
set_location_assignment PIN_C14 -to "fpga_syncin_1_p" ; ## G09 LA03_P
set_location_assignment PIN_E13 -to "fpga_syncout_0(n)" ; ## D09 LA01_CC_N
set_location_assignment PIN_E12 -to "fpga_syncout_0" ; ## D08 LA01_CC_P
set_location_assignment PIN_B10 -to "fpga_syncout_1_n" ; ## C11 LA06_N
set_location_assignment PIN_A10 -to "fpga_syncout_1_p" ; ## C10 LA06_P
set_location_assignment PIN_D4 -to "gpio[0]" ; ## H19 LA15_P
set_location_assignment PIN_D5 -to "gpio[1]" ; ## H20 LA15_N
set_location_assignment PIN_G5 -to "gpio[2]" ; ## H22 LA19_P
@ -168,13 +168,10 @@ for {set i 0} {$i < $common_lanes} {incr i} {
set_instance_assignment -name XCVR_RECONFIG_GROUP xcvr_${i} -to tx_data[${i}]
}
set_instance_assignment -name IO_STANDARD LVDS -to fpga_syncin[0]
set_instance_assignment -name IO_STANDARD LVDS -to fpga_syncin[1]
set_instance_assignment -name IO_STANDARD LVDS -to fpga_syncout[0]
set_instance_assignment -name IO_STANDARD LVDS -to fpga_syncout[1]
set_instance_assignment -name IO_STANDARD LVDS -to fpga_syncin_0
set_instance_assignment -name IO_STANDARD LVDS -to fpga_syncout_0
set_instance_assignment -name IO_STANDARD LVDS -to sysref2
set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to fpga_syncin[0]
set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to fpga_syncin[1]
set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to fpga_syncin_0
set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to sysref2
set_instance_assignment -name IO_STANDARD "1.8 V" -to agc0[0]

19
projects/ad9081_fmca_ebz/a10soc/system_top.v
View File

@ -130,8 +130,12 @@ module system_top #(
input fpga_refclk_in,
input [7:0] rx_data,
output [7:0] tx_data,
input [1:0] fpga_syncin,
output [1:0] fpga_syncout,
input fpga_syncin_0,
inout fpga_syncin_1_n,
inout fpga_syncin_1_p,
output fpga_syncout_0,
inout fpga_syncout_1_n,
inout fpga_syncout_1_p,
input sysref2,
// spi
@ -211,6 +215,7 @@ module system_top #(
assign txen[0] = gpio_o[58];
assign txen[1] = gpio_o[59];
// board stuff (max-v-u21)
assign gpio_i[31:14] = gpio_o[31:14];
@ -231,7 +236,11 @@ module system_top #(
// instantiations
system_bd i_system_bd (
.mxfe_gpio_export (gpio),
.mxfe_gpio_export ({fpga_syncout_1_n, // 14
fpga_syncout_1_p, // 13
fpga_syncin_1_n, // 12
fpga_syncin_1_p, // 11
gpio}), // 10 :0
.sys_clk_clk (sys_clk),
.sys_gpio_bd_in_port (gpio_i[31:0]),
.sys_gpio_bd_out_port (gpio_o[31:0]),
@ -311,12 +320,12 @@ module system_top #(
.sys_spi_SS_n (spi_csn_s),
.tx_serial_data_tx_serial_data (tx_data[7:0]),
.tx_ref_clk_clk (fpga_refclk_in),
.tx_sync_export (fpga_syncin),
.tx_sync_export (fpga_syncin_0),
.tx_sysref_export (sysref2),
.tx_device_clk_clk (clkin6),
.rx_serial_data_rx_serial_data (rx_data[7:0]),
.rx_ref_clk_clk (fpga_refclk_in),
.rx_sync_export (fpga_syncout),
.rx_sync_export (fpga_syncout_0),
.rx_sysref_export (sysref2),
.rx_device_clk_clk (clkin6)