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axi_ad9361: Delete debug ports of the tdd module

main
Istvan Csomortani 2016-09-01 16:50:32 +03:00
parent 521c41ce32
commit be41a8bcaa
2 changed files with 2 additions and 11 deletions
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3
library/axi_ad9361/axi_ad9361.v
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@ -559,8 +559,7 @@ module axi_ad9361 (
.up_rreq (up_rreq_s),
.up_raddr (up_raddr_s),
.up_rdata (up_rdata_tdd_s),
.up_rack (up_rack_tdd_s),
.tdd_dbg ());
.up_rack (up_rack_tdd_s));
// receive

10
library/axi_ad9361/axi_ad9361_tdd.v
View File

@ -98,10 +98,7 @@ module axi_ad9361_tdd (
up_rreq,
up_raddr,
up_rdata,
up_rack,
tdd_dbg
);
up_rack);
input clk;
input rst;
@ -158,8 +155,6 @@ module axi_ad9361_tdd (
output [31:0] up_rdata;
output up_rack;
output [41:0] tdd_dbg;
reg tdd_slave_synced = 1'b0;
reg tdd_tx_valid = 1'b0;
@ -216,9 +211,6 @@ module axi_ad9361_tdd (
wire tdd_rx_dp_en_s;
wire tdd_tx_dp_en_s;
assign tdd_dbg = {tdd_counter_status, tdd_enable_s, tdd_sync, tdd_tx_dp_en_s,
tdd_rx_vco_en, tdd_tx_vco_en, tdd_rx_rf_en, tdd_tx_rf_en};
assign tdd_enabled = tdd_enable_s;
assign tdd_sync_cntr = ~(tdd_enable_s & tdd_terminal_type_s);