library- altera power up warnings
parent
3e57ff1fc5
commit
c0a2ef1ac4
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@ -73,7 +73,7 @@ module axi_adxcvr_up #(
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reg up_wreq_d = 'd0;
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reg up_wreq_d = 'd0;
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reg [31:0] up_scratch = 'd0;
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reg [31:0] up_scratch = 'd0;
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reg up_resetn = 'd0;
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reg up_resetn = 'd0;
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reg [ 3:0] up_rst_cnt = 'd0;
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reg [ 3:0] up_rst_cnt = 'd8;
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reg up_status_int = 'd0;
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reg up_status_int = 'd0;
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reg up_rreq_d = 'd0;
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reg up_rreq_d = 'd0;
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reg [31:0] up_rdata_d = 'd0;
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reg [31:0] up_rdata_d = 'd0;
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@ -8,5 +8,5 @@ set_false_path -from [get_registers *up_xfer_status:i_xfer_status|d_xfer_data*]
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set_false_path -from [get_registers *up_clock_mon:i_clock_mon|d_count_toggle*] -to [get_registers *up_clock_mon:i_clock_mon|up_count_toggle_m1*]
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set_false_path -from [get_registers *up_clock_mon:i_clock_mon|d_count_toggle*] -to [get_registers *up_clock_mon:i_clock_mon|up_count_toggle_m1*]
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set_false_path -from [get_registers *up_clock_mon:i_clock_mon|d_count_hold*] -to [get_registers *up_clock_mon:i_clock_mon|up_d_count*]
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set_false_path -from [get_registers *up_clock_mon:i_clock_mon|d_count_hold*] -to [get_registers *up_clock_mon:i_clock_mon|up_d_count*]
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set_false_path -from [get_registers *up_clock_mon:i_clock_mon|up_count_toggle*] -to [get_registers *up_clock_mon:i_clock_mon|d_count_toggle_m1*]
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set_false_path -from [get_registers *up_clock_mon:i_clock_mon|up_count_toggle*] -to [get_registers *up_clock_mon:i_clock_mon|d_count_toggle_m1*]
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set_false_path -from [get_registers *up_core_preset*] -to [get_registers *ad_rst:i_core_rst_reg|ad_rst_sync_m1*]
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set_false_path -from [get_registers *up_*preset*] -to [get_registers *ad_rst:i_core_rst_reg|ad_rst_sync_m1*]
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@ -108,8 +108,8 @@ module up_adc_common #(
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// internal registers
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// internal registers
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reg up_core_preset = 'd0;
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reg up_core_preset = 'd1;
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reg up_mmcm_preset = 'd0;
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reg up_mmcm_preset = 'd1;
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reg up_wack_int = 'd0;
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reg up_wack_int = 'd0;
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reg [31:0] up_scratch = 'd0;
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reg [31:0] up_scratch = 'd0;
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reg up_mmcm_resetn = 'd0;
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reg up_mmcm_resetn = 'd0;
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