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adrv9001/zcu102: Enable independent TX mode in CMOS 

For CMOS case, lane rates are so low that reference clock of the source
synchronous interface can be routed on non-clock routes. The delays on
the clock line are adjusted by the digital interface tuning controlled
through software.

Lock down clock buffers on Rx and Tx interfaces, this avoids suboptimal
placement which causes large skew between clocks at the serdes pins.
main
Laszlo Nagy 2021-05-11 11:55:11 +01:00 committed by Laszlo Nagy
parent d493b724f2
commit c5d216bba9
1 changed files with 13 additions and 1 deletions
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14
projects/adrv9001/zcu102/cmos_constr.xdc
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@ -53,6 +53,18 @@ set_clock_latency -source -early -0.25 [get_clocks rx2_dclk_out]
set_clock_latency -source -late 0.25 [get_clocks rx1_dclk_out]
set_clock_latency -source -late 0.25 [get_clocks rx2_dclk_out]
create_pblock SSI_REGION
add_cells_to_pblock [get_pblocks SSI_REGION] [get_cells -quiet [list \
i_system_wrapper/system_i/axi_adrv9001/inst/i_if/i_rx_1_phy/i_clk_buf_fast \
i_system_wrapper/system_i/axi_adrv9001/inst/i_if/i_rx_1_phy/i_div_clk_buf \
i_system_wrapper/system_i/axi_adrv9001/inst/i_if/i_rx_2_phy/i_clk_buf_fast \
i_system_wrapper/system_i/axi_adrv9001/inst/i_if/i_rx_2_phy/i_div_clk_buf \
i_system_wrapper/system_i/axi_adrv9001/inst/i_if/i_tx_1_phy/i_dac_clk_in_gbuf \
i_system_wrapper/system_i/axi_adrv9001/inst/i_if/i_tx_1_phy/i_dac_div_clk_rbuf \
i_system_wrapper/system_i/axi_adrv9001/inst/i_if/i_tx_2_phy/i_dac_clk_in_gbuf \
i_system_wrapper/system_i/axi_adrv9001/inst/i_if/i_tx_2_phy/i_dac_div_clk_rbuf \
]]
resize_pblock SSI_REGION -add CLOCKREGION_X3Y2:CLOCKREGION_X3Y3
set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets i_system_wrapper/system_i/axi_adrv9001/inst/i_if/i_tx_1_phy/i_dac_clk_in_ibuf/O]
set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets i_system_wrapper/system_i/axi_adrv9001/inst/i_if/i_tx_2_phy/i_dac_clk_in_ibuf/O]