ccbrk_cmos: cmos mode
Rejeesh Kutty
parent
c566784ba9
commit
c7ee15d4f4
|
|
@ -2,3 +2,47 @@
|
||||||
source $ad_hdl_dir/projects/common/pzsdr/pzsdr_system_bd.tcl
|
source $ad_hdl_dir/projects/common/pzsdr/pzsdr_system_bd.tcl
|
||||||
source ../common/ccbrk_bd.tcl
|
source ../common/ccbrk_bd.tcl
|
||||||
|
|
||||||
|
# CMOS Mode
|
||||||
|
|
||||||
|
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports tx_clk_out_p]]]
|
||||||
|
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports tx_clk_out_n]]]
|
||||||
|
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports tx_frame_out_p]]]
|
||||||
|
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports tx_frame_out_n]]]
|
||||||
|
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports tx_data_out_p]]]
|
||||||
|
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports tx_data_out_n]]]
|
||||||
|
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports rx_clk_in_p]]]
|
||||||
|
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports rx_clk_in_n]]]
|
||||||
|
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports rx_frame_in_p]]]
|
||||||
|
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports rx_frame_in_n]]]
|
||||||
|
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports rx_data_in_p]]]
|
||||||
|
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports rx_data_in_n]]]
|
||||||
|
|
||||||
|
delete_bd_objs [get_bd_ports tx_clk_out_p]
|
||||||
|
delete_bd_objs [get_bd_ports tx_clk_out_n]
|
||||||
|
delete_bd_objs [get_bd_ports tx_frame_out_p]
|
||||||
|
delete_bd_objs [get_bd_ports tx_frame_out_n]
|
||||||
|
delete_bd_objs [get_bd_ports tx_data_out_p]
|
||||||
|
delete_bd_objs [get_bd_ports tx_data_out_n]
|
||||||
|
delete_bd_objs [get_bd_ports rx_clk_in_p]
|
||||||
|
delete_bd_objs [get_bd_ports rx_clk_in_n]
|
||||||
|
delete_bd_objs [get_bd_ports rx_frame_in_p]
|
||||||
|
delete_bd_objs [get_bd_ports rx_frame_in_n]
|
||||||
|
delete_bd_objs [get_bd_ports rx_data_in_p]
|
||||||
|
delete_bd_objs [get_bd_ports rx_data_in_n]
|
||||||
|
|
||||||
|
create_bd_port -dir I rx_clk_in
|
||||||
|
create_bd_port -dir I rx_frame_in
|
||||||
|
create_bd_port -dir I -from 11 -to 0 rx_data_in
|
||||||
|
create_bd_port -dir O tx_clk_out
|
||||||
|
create_bd_port -dir O tx_frame_out
|
||||||
|
create_bd_port -dir O -from 11 -to 0 tx_data_out
|
||||||
|
|
||||||
|
set_property CONFIG.CMOS_OR_LVDS_N 1 [get_bd_cells axi_ad9361]
|
||||||
|
|
||||||
|
ad_connect rx_clk_in axi_ad9361/rx_clk_in
|
||||||
|
ad_connect rx_frame_in axi_ad9361/rx_frame_in
|
||||||
|
ad_connect rx_data_in axi_ad9361/rx_data_in
|
||||||
|
ad_connect tx_clk_out axi_ad9361/tx_clk_out
|
||||||
|
ad_connect tx_frame_out axi_ad9361/tx_frame_out
|
||||||
|
ad_connect tx_data_out axi_ad9361/tx_data_out
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,258 +0,0 @@
|
||||||
|
|
||||||
## constraints
|
|
||||||
## loopback
|
|
||||||
## p4
|
|
||||||
|
|
||||||
set_property -dict {PACKAGE_PIN D4 IOSTANDARD LVCMOS18} [get_ports gp_out[0]] ; ## IO_L2P_T0_33
|
|
||||||
set_property -dict {PACKAGE_PIN G4 IOSTANDARD LVCMOS18} [get_ports gp_in[0]] ; ## IO_L1P_T0_33
|
|
||||||
set_property -dict {PACKAGE_PIN D3 IOSTANDARD LVCMOS18} [get_ports gp_out[1]] ; ## IO_L2N_T0_33
|
|
||||||
set_property -dict {PACKAGE_PIN F4 IOSTANDARD LVCMOS18} [get_ports gp_in[1]] ; ## IO_L1N_T0_33
|
|
||||||
set_property -dict {PACKAGE_PIN D1 IOSTANDARD LVCMOS18} [get_ports gp_out[2]] ; ## IO_L4P_T0_33
|
|
||||||
set_property -dict {PACKAGE_PIN G2 IOSTANDARD LVCMOS18} [get_ports gp_in[2]] ; ## IO_L3P_T0_DQS_33
|
|
||||||
set_property -dict {PACKAGE_PIN C1 IOSTANDARD LVCMOS18} [get_ports gp_out[3]] ; ## IO_L4N_T0_33
|
|
||||||
set_property -dict {PACKAGE_PIN F2 IOSTANDARD LVCMOS18} [get_ports gp_in[3]] ; ## IO_L3N_T0_DQS_33
|
|
||||||
set_property -dict {PACKAGE_PIN F3 IOSTANDARD LVCMOS18} [get_ports gp_out[4]] ; ## IO_L6P_T0_33
|
|
||||||
set_property -dict {PACKAGE_PIN E2 IOSTANDARD LVCMOS18} [get_ports gp_in[4]] ; ## IO_L5P_T0_33
|
|
||||||
set_property -dict {PACKAGE_PIN E3 IOSTANDARD LVCMOS18} [get_ports gp_out[5]] ; ## IO_L6N_T0_VREF_33
|
|
||||||
set_property -dict {PACKAGE_PIN E1 IOSTANDARD LVCMOS18} [get_ports gp_in[5]] ; ## IO_L5N_T0_33
|
|
||||||
set_property -dict {PACKAGE_PIN H4 IOSTANDARD LVCMOS18} [get_ports gp_out[6]] ; ## IO_L8P_T1_33
|
|
||||||
set_property -dict {PACKAGE_PIN J1 IOSTANDARD LVCMOS18} [get_ports gp_in[6]] ; ## IO_L7P_T1_33
|
|
||||||
set_property -dict {PACKAGE_PIN H3 IOSTANDARD LVCMOS18} [get_ports gp_out[7]] ; ## IO_L8N_T1_33
|
|
||||||
set_property -dict {PACKAGE_PIN H1 IOSTANDARD LVCMOS18} [get_ports gp_in[7]] ; ## IO_L7N_T1_33
|
|
||||||
set_property -dict {PACKAGE_PIN H2 IOSTANDARD LVCMOS18} [get_ports gp_out[8]] ; ## IO_L10P_T1_33
|
|
||||||
set_property -dict {PACKAGE_PIN K2 IOSTANDARD LVCMOS18} [get_ports gp_in[8]] ; ## IO_L9P_T1_DQS_33
|
|
||||||
set_property -dict {PACKAGE_PIN G1 IOSTANDARD LVCMOS18} [get_ports gp_out[9]] ; ## IO_L10N_T1_33
|
|
||||||
set_property -dict {PACKAGE_PIN K1 IOSTANDARD LVCMOS18} [get_ports gp_in[9]] ; ## IO_L9N_T1_DQS_33
|
|
||||||
set_property -dict {PACKAGE_PIN J4 IOSTANDARD LVCMOS18} [get_ports gp_out[10]] ; ## IO_L12P_T1_MRCC_33
|
|
||||||
set_property -dict {PACKAGE_PIN L3 IOSTANDARD LVCMOS18} [get_ports gp_in[10]] ; ## IO_L11P_T1_SRCC_33
|
|
||||||
|
|
||||||
## p5
|
|
||||||
|
|
||||||
set_property -dict {PACKAGE_PIN N4 IOSTANDARD LVCMOS18} [get_ports gp_out[11]] ; ## IO_L17P_T2_33
|
|
||||||
set_property -dict {PACKAGE_PIN M2 IOSTANDARD LVCMOS18} [get_ports gp_in[11]] ; ## IO_L16P_T2_33
|
|
||||||
set_property -dict {PACKAGE_PIN M4 IOSTANDARD LVCMOS18} [get_ports gp_out[12]] ; ## IO_L17N_T2_33
|
|
||||||
set_property -dict {PACKAGE_PIN L2 IOSTANDARD LVCMOS18} [get_ports gp_in[12]] ; ## IO_L16N_T2_33
|
|
||||||
set_property -dict {PACKAGE_PIN M7 IOSTANDARD LVCMOS18} [get_ports gp_out[13]] ; ## IO_L19P_T3_33
|
|
||||||
set_property -dict {PACKAGE_PIN N1 IOSTANDARD LVCMOS18} [get_ports gp_in[13]] ; ## IO_L18P_T2_33
|
|
||||||
set_property -dict {PACKAGE_PIN L7 IOSTANDARD LVCMOS18} [get_ports gp_out[14]] ; ## IO_L19N_T3_VREF_33
|
|
||||||
set_property -dict {PACKAGE_PIN M1 IOSTANDARD LVCMOS18} [get_ports gp_in[14]] ; ## IO_L18N_T2_33
|
|
||||||
set_property -dict {PACKAGE_PIN K5 IOSTANDARD LVCMOS18} [get_ports gp_out[15]] ; ## IO_L20P_T3_33
|
|
||||||
set_property -dict {PACKAGE_PIN M8 IOSTANDARD LVCMOS18} [get_ports gp_in[15]] ; ## IO_L21P_T3_DQS_33
|
|
||||||
set_property -dict {PACKAGE_PIN J5 IOSTANDARD LVCMOS18} [get_ports gp_out[16]] ; ## IO_L20N_T3_33
|
|
||||||
set_property -dict {PACKAGE_PIN L8 IOSTANDARD LVCMOS18} [get_ports gp_in[16]] ; ## IO_L21N_T3_DQS_33
|
|
||||||
set_property -dict {PACKAGE_PIN K6 IOSTANDARD LVCMOS18} [get_ports gp_out[17]] ; ## IO_L22P_T3_33
|
|
||||||
set_property -dict {PACKAGE_PIN N7 IOSTANDARD LVCMOS18} [get_ports gp_in[17]] ; ## IO_L23P_T3_33
|
|
||||||
set_property -dict {PACKAGE_PIN J6 IOSTANDARD LVCMOS18} [get_ports gp_out[18]] ; ## IO_L22N_T3_33
|
|
||||||
set_property -dict {PACKAGE_PIN N6 IOSTANDARD LVCMOS18} [get_ports gp_in[18]] ; ## IO_L23N_T3_33
|
|
||||||
set_property -dict {PACKAGE_PIN K10 IOSTANDARD LVCMOS18} [get_ports gp_out[19]] ; ## IO_25_VRP_34
|
|
||||||
set_property -dict {PACKAGE_PIN D5 IOSTANDARD LVCMOS18} [get_ports gp_in[19]] ; ## IO_L10N_T1_34
|
|
||||||
set_property -dict {PACKAGE_PIN L5 IOSTANDARD LVCMOS18} [get_ports gp_out[20]] ; ## IO_L14P_T2_SRCC_33
|
|
||||||
set_property -dict {PACKAGE_PIN K8 IOSTANDARD LVCMOS18} [get_ports gp_in[20]] ; ## IO_L24P_T3_33
|
|
||||||
set_property -dict {PACKAGE_PIN L4 IOSTANDARD LVCMOS18} [get_ports gp_out[21]] ; ## IO_L14N_T2_SRCC_33
|
|
||||||
set_property -dict {PACKAGE_PIN K7 IOSTANDARD LVCMOS18} [get_ports gp_in[21]] ; ## IO_L24N_T3_33
|
|
||||||
set_property -dict {PACKAGE_PIN M6 IOSTANDARD LVCMOS18} [get_ports gp_out[22]] ; ## IO_L13P_T2_MRCC_33
|
|
||||||
set_property -dict {PACKAGE_PIN N3 IOSTANDARD LVCMOS18} [get_ports gp_in[22]] ; ## IO_L15P_T2_DQS_33
|
|
||||||
set_property -dict {PACKAGE_PIN M5 IOSTANDARD LVCMOS18} [get_ports gp_out[23]] ; ## IO_L13N_T2_MRCC_33
|
|
||||||
set_property -dict {PACKAGE_PIN N2 IOSTANDARD LVCMOS18} [get_ports gp_in[23]] ; ## IO_L15N_T2_DQS_33
|
|
||||||
|
|
||||||
## p6
|
|
||||||
|
|
||||||
set_property -dict {PACKAGE_PIN G6 IOSTANDARD LVCMOS18} [get_ports gp_out[24]] ; ## IO_L2P_T0_34
|
|
||||||
set_property -dict {PACKAGE_PIN J11 IOSTANDARD LVCMOS18} [get_ports gp_in[24]] ; ## IO_L1P_T0_34
|
|
||||||
set_property -dict {PACKAGE_PIN G5 IOSTANDARD LVCMOS18} [get_ports gp_out[25]] ; ## IO_L2N_T0_34
|
|
||||||
set_property -dict {PACKAGE_PIN H11 IOSTANDARD LVCMOS18} [get_ports gp_in[25]] ; ## IO_L1N_T0_34
|
|
||||||
set_property -dict {PACKAGE_PIN H7 IOSTANDARD LVCMOS18} [get_ports gp_out[26]] ; ## IO_L4P_T0_34
|
|
||||||
set_property -dict {PACKAGE_PIN H9 IOSTANDARD LVCMOS18} [get_ports gp_in[26]] ; ## IO_L3P_T0_DQS_PUDC_B_34
|
|
||||||
set_property -dict {PACKAGE_PIN H6 IOSTANDARD LVCMOS18} [get_ports gp_out[27]] ; ## IO_L4N_T0_34
|
|
||||||
set_property -dict {PACKAGE_PIN G9 IOSTANDARD LVCMOS18} [get_ports gp_in[27]] ; ## IO_L3N_T0_DQS_34
|
|
||||||
set_property -dict {PACKAGE_PIN J8 IOSTANDARD LVCMOS18} [get_ports gp_out[28]] ; ## IO_L6P_T0_34
|
|
||||||
set_property -dict {PACKAGE_PIN J10 IOSTANDARD LVCMOS18} [get_ports gp_in[28]] ; ## IO_L5P_T0_34
|
|
||||||
set_property -dict {PACKAGE_PIN H8 IOSTANDARD LVCMOS18} [get_ports gp_out[29]] ; ## IO_L6N_T0_VREF_34
|
|
||||||
set_property -dict {PACKAGE_PIN J9 IOSTANDARD LVCMOS18} [get_ports gp_in[29]] ; ## IO_L5N_T0_34
|
|
||||||
set_property -dict {PACKAGE_PIN D9 IOSTANDARD LVCMOS18} [get_ports gp_out[30]] ; ## IO_L8P_T1_34
|
|
||||||
set_property -dict {PACKAGE_PIN F5 IOSTANDARD LVCMOS18} [get_ports gp_in[30]] ; ## IO_L7P_T1_34
|
|
||||||
set_property -dict {PACKAGE_PIN G7 IOSTANDARD LVCMOS18} [get_ports gp_out[31]] ; ## IO_L12P_T1_MRCC_34
|
|
||||||
set_property -dict {PACKAGE_PIN F8 IOSTANDARD LVCMOS18} [get_ports gp_in[31]] ; ## IO_L11P_T1_SRCC_34
|
|
||||||
set_property -dict {PACKAGE_PIN F7 IOSTANDARD LVCMOS18} [get_ports gp_out[32]] ; ## IO_L12N_T1_MRCC_34
|
|
||||||
set_property -dict {PACKAGE_PIN E7 IOSTANDARD LVCMOS18} [get_ports gp_in[32]] ; ## IO_L11N_T1_SRCC_34
|
|
||||||
|
|
||||||
## p7
|
|
||||||
|
|
||||||
set_property -dict {PACKAGE_PIN D6 IOSTANDARD LVCMOS18} [get_ports gp_out[33]] ; ## IO_L14P_T2_SRCC_34
|
|
||||||
set_property -dict {PACKAGE_PIN C8 IOSTANDARD LVCMOS18} [get_ports gp_in[33]] ; ## IO_L13P_T2_MRCC_34
|
|
||||||
set_property -dict {PACKAGE_PIN C6 IOSTANDARD LVCMOS18} [get_ports gp_out[34]] ; ## IO_L14N_T2_SRCC_34
|
|
||||||
set_property -dict {PACKAGE_PIN C7 IOSTANDARD LVCMOS18} [get_ports gp_in[34]] ; ## IO_L13N_T2_MRCC_34
|
|
||||||
set_property -dict {PACKAGE_PIN B10 IOSTANDARD LVCMOS18} [get_ports gp_out[35]] ; ## IO_L16P_T2_34
|
|
||||||
set_property -dict {PACKAGE_PIN C9 IOSTANDARD LVCMOS18} [get_ports gp_in[35]] ; ## IO_L15P_T2_DQS_34
|
|
||||||
set_property -dict {PACKAGE_PIN A10 IOSTANDARD LVCMOS18} [get_ports gp_out[36]] ; ## IO_L16N_T2_34
|
|
||||||
set_property -dict {PACKAGE_PIN B9 IOSTANDARD LVCMOS18} [get_ports gp_in[36]] ; ## IO_L15N_T2_DQS_34
|
|
||||||
set_property -dict {PACKAGE_PIN B5 IOSTANDARD LVCMOS18} [get_ports gp_out[37]] ; ## IO_L20P_T3_34
|
|
||||||
set_property -dict {PACKAGE_PIN C4 IOSTANDARD LVCMOS18} [get_ports gp_in[37]] ; ## IO_L19P_T3_34
|
|
||||||
set_property -dict {PACKAGE_PIN B4 IOSTANDARD LVCMOS18} [get_ports gp_out[38]] ; ## IO_L20N_T3_34
|
|
||||||
set_property -dict {PACKAGE_PIN C3 IOSTANDARD LVCMOS18} [get_ports gp_in[38]] ; ## IO_L19N_T3_VREF_34
|
|
||||||
set_property -dict {PACKAGE_PIN A4 IOSTANDARD LVCMOS18} [get_ports gp_out[39]] ; ## IO_L22P_T3_34
|
|
||||||
set_property -dict {PACKAGE_PIN B6 IOSTANDARD LVCMOS18} [get_ports gp_in[39]] ; ## IO_L21P_T3_DQS_34
|
|
||||||
set_property -dict {PACKAGE_PIN A3 IOSTANDARD LVCMOS18} [get_ports gp_out[40]] ; ## IO_L22N_T3_34
|
|
||||||
set_property -dict {PACKAGE_PIN A5 IOSTANDARD LVCMOS18} [get_ports gp_in[40]] ; ## IO_L21N_T3_DQS_34
|
|
||||||
set_property -dict {PACKAGE_PIN L9 IOSTANDARD LVCMOS18} [get_ports gp_out[41]] ; ## IO_0_VRN_33
|
|
||||||
set_property -dict {PACKAGE_PIN B7 IOSTANDARD LVCMOS18} [get_ports gp_in[41]] ; ## IO_L18P_T2_34
|
|
||||||
set_property -dict {PACKAGE_PIN A7 IOSTANDARD LVCMOS18} [get_ports gp_out[42]] ; ## IO_L18N_T2_34
|
|
||||||
set_property -dict {PACKAGE_PIN N8 IOSTANDARD LVCMOS18} [get_ports gp_in[42]] ; ## IO_25_VRP_33
|
|
||||||
|
|
||||||
## p13
|
|
||||||
|
|
||||||
set_property -dict {PACKAGE_PIN AF15 IOSTANDARD LVCMOS25} [get_ports gp_out[43]] ; ## IO_L16P_T2_12
|
|
||||||
set_property -dict {PACKAGE_PIN AD16 IOSTANDARD LVCMOS25} [get_ports gp_in[43]] ; ## IO_L15P_T2_DQS_12
|
|
||||||
set_property -dict {PACKAGE_PIN AF14 IOSTANDARD LVCMOS25} [get_ports gp_out[44]] ; ## IO_L16N_T2_12
|
|
||||||
set_property -dict {PACKAGE_PIN AD15 IOSTANDARD LVCMOS25} [get_ports gp_in[44]] ; ## IO_L15N_T2_DQS_12
|
|
||||||
set_property -dict {PACKAGE_PIN AB15 IOSTANDARD LVCMOS25} [get_ports gp_out[45]] ; ## IO_L14P_T2_SRCC_12
|
|
||||||
set_property -dict {PACKAGE_PIN AC14 IOSTANDARD LVCMOS25} [get_ports gp_in[45]] ; ## IO_L13P_T2_MRCC_12
|
|
||||||
set_property -dict {PACKAGE_PIN AB14 IOSTANDARD LVCMOS25} [get_ports gp_out[46]] ; ## IO_L14N_T2_SRCC_12
|
|
||||||
set_property -dict {PACKAGE_PIN AD14 IOSTANDARD LVCMOS25} [get_ports gp_in[46]] ; ## IO_L13N_T2_MRCC_12
|
|
||||||
set_property -dict {PACKAGE_PIN AC13 IOSTANDARD LVCMOS25} [get_ports gp_out[47]] ; ## IO_L12P_T1_MRCC_12
|
|
||||||
set_property -dict {PACKAGE_PIN AC12 IOSTANDARD LVCMOS25} [get_ports gp_in[47]] ; ## IO_L11P_T1_SRCC_12
|
|
||||||
set_property -dict {PACKAGE_PIN AD13 IOSTANDARD LVCMOS25} [get_ports gp_out[48]] ; ## IO_L12N_T1_MRCC_12
|
|
||||||
set_property -dict {PACKAGE_PIN AD11 IOSTANDARD LVCMOS25} [get_ports gp_in[48]] ; ## IO_L11N_T1_SRCC_12
|
|
||||||
set_property -dict {PACKAGE_PIN AE13 IOSTANDARD LVCMOS25} [get_ports gp_out[49]] ; ## IO_L10P_T1_12
|
|
||||||
set_property -dict {PACKAGE_PIN AE11 IOSTANDARD LVCMOS25} [get_ports gp_in[49]] ; ## IO_L9P_T1_DQS_12
|
|
||||||
set_property -dict {PACKAGE_PIN AF13 IOSTANDARD LVCMOS25} [get_ports gp_out[50]] ; ## IO_L10N_T1_12
|
|
||||||
set_property -dict {PACKAGE_PIN AF10 IOSTANDARD LVCMOS25} [get_ports gp_in[50]] ; ## IO_L9N_T1_DQS_12
|
|
||||||
set_property -dict {PACKAGE_PIN AE12 IOSTANDARD LVCMOS25} [get_ports gp_out[51]] ; ## IO_L8P_T1_12
|
|
||||||
set_property -dict {PACKAGE_PIN AE10 IOSTANDARD LVCMOS25} [get_ports gp_in[51]] ; ## IO_L7P_T1_12
|
|
||||||
set_property -dict {PACKAGE_PIN AF12 IOSTANDARD LVCMOS25} [get_ports gp_out[52]] ; ## IO_L8N_T1_12
|
|
||||||
set_property -dict {PACKAGE_PIN AD10 IOSTANDARD LVCMOS25} [get_ports gp_in[52]] ; ## IO_L7N_T1_12
|
|
||||||
set_property -dict {PACKAGE_PIN AA13 IOSTANDARD LVCMOS25} [get_ports gp_out[53]] ; ## IO_L6P_T0_12
|
|
||||||
set_property -dict {PACKAGE_PIN W13 IOSTANDARD LVCMOS25} [get_ports gp_in[53]] ; ## IO_L5P_T0_12
|
|
||||||
set_property -dict {PACKAGE_PIN AA12 IOSTANDARD LVCMOS25} [get_ports gp_out[54]] ; ## IO_L6N_T0_VREF_12
|
|
||||||
set_property -dict {PACKAGE_PIN Y13 IOSTANDARD LVCMOS25} [get_ports gp_in[54]] ; ## IO_L5N_T0_12
|
|
||||||
set_property -dict {PACKAGE_PIN AB11 IOSTANDARD LVCMOS25} [get_ports gp_out[55]] ; ## IO_L4P_T0_12
|
|
||||||
set_property -dict {PACKAGE_PIN Y10 IOSTANDARD LVCMOS25} [get_ports gp_in[55]] ; ## IO_L3P_T0_DQS_12
|
|
||||||
set_property -dict {PACKAGE_PIN AB10 IOSTANDARD LVCMOS25} [get_ports gp_out[56]] ; ## IO_L4N_T0_12
|
|
||||||
set_property -dict {PACKAGE_PIN AA10 IOSTANDARD LVCMOS25} [get_ports gp_in[56]] ; ## IO_L3N_T0_DQS_12
|
|
||||||
set_property -dict {PACKAGE_PIN AB12 IOSTANDARD LVCMOS25} [get_ports gp_out[57]] ; ## IO_L2P_T0_12
|
|
||||||
set_property -dict {PACKAGE_PIN Y12 IOSTANDARD LVCMOS25} [get_ports gp_in[57]] ; ## IO_L1P_T0_12
|
|
||||||
set_property -dict {PACKAGE_PIN AC11 IOSTANDARD LVCMOS25} [get_ports gp_out[58]] ; ## IO_L2N_T0_12
|
|
||||||
set_property -dict {PACKAGE_PIN Y11 IOSTANDARD LVCMOS25} [get_ports gp_in[58]] ; ## IO_L1N_T0_12
|
|
||||||
set_property -dict {PACKAGE_PIN AE17 IOSTANDARD LVCMOS25} [get_ports gp_out[59]] ; ## IO_L18P_T2_12
|
|
||||||
set_property -dict {PACKAGE_PIN AE16 IOSTANDARD LVCMOS25} [get_ports gp_in[59]] ; ## IO_L17P_T2_12
|
|
||||||
set_property -dict {PACKAGE_PIN AF17 IOSTANDARD LVCMOS25} [get_ports gp_out[60]] ; ## IO_L18N_T2_12
|
|
||||||
set_property -dict {PACKAGE_PIN AE15 IOSTANDARD LVCMOS25} [get_ports gp_in[60]] ; ## IO_L17N_T2_12
|
|
||||||
set_property -dict {PACKAGE_PIN AB17 IOSTANDARD LVCMOS25} [get_ports gp_out[61]] ; ## IO_L20P_T3_12
|
|
||||||
set_property -dict {PACKAGE_PIN Y17 IOSTANDARD LVCMOS25} [get_ports gp_in[61]] ; ## IO_L19P_T3_12
|
|
||||||
set_property -dict {PACKAGE_PIN AB16 IOSTANDARD LVCMOS25} [get_ports gp_out[62]] ; ## IO_L20N_T3_12
|
|
||||||
set_property -dict {PACKAGE_PIN AA17 IOSTANDARD LVCMOS25} [get_ports gp_in[62]] ; ## IO_L19N_T3_VREF_12
|
|
||||||
set_property -dict {PACKAGE_PIN AA15 IOSTANDARD LVCMOS25} [get_ports gp_out[63]] ; ## IO_L22P_T3_12
|
|
||||||
set_property -dict {PACKAGE_PIN AC17 IOSTANDARD LVCMOS25} [get_ports gp_in[63]] ; ## IO_L21P_T3_DQS_12
|
|
||||||
set_property -dict {PACKAGE_PIN AA14 IOSTANDARD LVCMOS25} [get_ports gp_out[64]] ; ## IO_L22N_T3_12
|
|
||||||
set_property -dict {PACKAGE_PIN AC16 IOSTANDARD LVCMOS25} [get_ports gp_in[64]] ; ## IO_L21N_T3_DQS_12
|
|
||||||
|
|
||||||
## p2
|
|
||||||
|
|
||||||
set_property -dict {PACKAGE_PIN V18 IOSTANDARD LVCMOS25} [get_ports gp_out[65]] ; ## IO_25_13
|
|
||||||
set_property -dict {PACKAGE_PIN AA24 IOSTANDARD LVCMOS25} [get_ports gp_in[65]] ; ## IO_L6P_T0_13
|
|
||||||
set_property -dict {PACKAGE_PIN AB26 IOSTANDARD LVCMOS25} [get_ports gp_out[66]] ; ## IO_L2P_T0_13
|
|
||||||
set_property -dict {PACKAGE_PIN AA25 IOSTANDARD LVCMOS25} [get_ports gp_in[66]] ; ## IO_L1P_T0_13
|
|
||||||
set_property -dict {PACKAGE_PIN AC26 IOSTANDARD LVCMOS25} [get_ports gp_out[67]] ; ## IO_L2N_T0_13
|
|
||||||
set_property -dict {PACKAGE_PIN AB25 IOSTANDARD LVCMOS25} [get_ports gp_in[67]] ; ## IO_L1N_T0_13
|
|
||||||
set_property -dict {PACKAGE_PIN AD25 IOSTANDARD LVCMOS25} [get_ports gp_out[68]] ; ## IO_L4P_T0_13
|
|
||||||
set_property -dict {PACKAGE_PIN AE25 IOSTANDARD LVCMOS25} [get_ports gp_in[68]] ; ## IO_L3P_T0_DQS_13
|
|
||||||
set_property -dict {PACKAGE_PIN AD26 IOSTANDARD LVCMOS25} [get_ports gp_out[69]] ; ## IO_L4N_T0_13
|
|
||||||
set_property -dict {PACKAGE_PIN AE26 IOSTANDARD LVCMOS25} [get_ports gp_in[69]] ; ## IO_L3N_T0_DQS_13
|
|
||||||
set_property -dict {PACKAGE_PIN AE23 IOSTANDARD LVCMOS25} [get_ports gp_out[70]] ; ## IO_L8P_T1_13
|
|
||||||
set_property -dict {PACKAGE_PIN AE22 IOSTANDARD LVCMOS25} [get_ports gp_in[70]] ; ## IO_L7P_T1_13
|
|
||||||
set_property -dict {PACKAGE_PIN AF23 IOSTANDARD LVCMOS25} [get_ports gp_out[71]] ; ## IO_L8N_T1_13
|
|
||||||
set_property -dict {PACKAGE_PIN AF22 IOSTANDARD LVCMOS25} [get_ports gp_in[71]] ; ## IO_L7N_T1_13
|
|
||||||
set_property -dict {PACKAGE_PIN AA22 IOSTANDARD LVCMOS25} [get_ports gp_out[72]] ; ## IO_L10P_T1_13
|
|
||||||
set_property -dict {PACKAGE_PIN AB21 IOSTANDARD LVCMOS25} [get_ports gp_in[72]] ; ## IO_L9P_T1_DQS_13
|
|
||||||
set_property -dict {PACKAGE_PIN AA23 IOSTANDARD LVCMOS25} [get_ports gp_out[73]] ; ## IO_L10N_T1_13
|
|
||||||
set_property -dict {PACKAGE_PIN AB22 IOSTANDARD LVCMOS25} [get_ports gp_in[73]] ; ## IO_L9N_T1_DQS_13
|
|
||||||
set_property -dict {PACKAGE_PIN AC23 IOSTANDARD LVCMOS25} [get_ports gp_out[74]] ; ## IO_L12P_T1_MRCC_13
|
|
||||||
set_property -dict {PACKAGE_PIN AD23 IOSTANDARD LVCMOS25} [get_ports gp_in[74]] ; ## IO_L11P_T1_SRCC_13
|
|
||||||
set_property -dict {PACKAGE_PIN AC24 IOSTANDARD LVCMOS25} [get_ports gp_out[75]] ; ## IO_L12N_T1_MRCC_13
|
|
||||||
set_property -dict {PACKAGE_PIN AD24 IOSTANDARD LVCMOS25} [get_ports gp_in[75]] ; ## IO_L11N_T1_SRCC_13
|
|
||||||
set_property -dict {PACKAGE_PIN AC21 IOSTANDARD LVCMOS25} [get_ports gp_out[76]] ; ## IO_L14P_T2_SRCC_13
|
|
||||||
set_property -dict {PACKAGE_PIN AD20 IOSTANDARD LVCMOS25} [get_ports gp_in[76]] ; ## IO_L13P_T2_MRCC_13
|
|
||||||
set_property -dict {PACKAGE_PIN AC22 IOSTANDARD LVCMOS25} [get_ports gp_out[77]] ; ## IO_L14N_T2_SRCC_13
|
|
||||||
set_property -dict {PACKAGE_PIN AD21 IOSTANDARD LVCMOS25} [get_ports gp_in[77]] ; ## IO_L13N_T2_MRCC_13
|
|
||||||
set_property -dict {PACKAGE_PIN AE20 IOSTANDARD LVCMOS25} [get_ports gp_out[78]] ; ## IO_L16P_T2_13
|
|
||||||
set_property -dict {PACKAGE_PIN AF19 IOSTANDARD LVCMOS25} [get_ports gp_in[78]] ; ## IO_L15P_T2_DQS_13
|
|
||||||
set_property -dict {PACKAGE_PIN AE21 IOSTANDARD LVCMOS25} [get_ports gp_out[79]] ; ## IO_L16N_T2_13
|
|
||||||
set_property -dict {PACKAGE_PIN AF20 IOSTANDARD LVCMOS25} [get_ports gp_in[79]] ; ## IO_L15N_T2_DQS_13
|
|
||||||
set_property -dict {PACKAGE_PIN AE18 IOSTANDARD LVCMOS25} [get_ports gp_out[80]] ; ## IO_L18P_T2_13
|
|
||||||
set_property -dict {PACKAGE_PIN AD18 IOSTANDARD LVCMOS25} [get_ports gp_in[80]] ; ## IO_L17P_T2_13
|
|
||||||
set_property -dict {PACKAGE_PIN AF18 IOSTANDARD LVCMOS25} [get_ports gp_out[81]] ; ## IO_L18N_T2_13
|
|
||||||
set_property -dict {PACKAGE_PIN AD19 IOSTANDARD LVCMOS25} [get_ports gp_in[81]] ; ## IO_L17N_T2_13
|
|
||||||
set_property -dict {PACKAGE_PIN AA20 IOSTANDARD LVCMOS25} [get_ports gp_out[82]] ; ## IO_L20P_T3_13
|
|
||||||
set_property -dict {PACKAGE_PIN W20 IOSTANDARD LVCMOS25} [get_ports gp_in[82]] ; ## IO_L19P_T3_13
|
|
||||||
set_property -dict {PACKAGE_PIN AB20 IOSTANDARD LVCMOS25} [get_ports gp_out[83]] ; ## IO_L20N_T3_13
|
|
||||||
set_property -dict {PACKAGE_PIN Y20 IOSTANDARD LVCMOS25} [get_ports gp_in[83]] ; ## IO_L19N_T3_VREF_13
|
|
||||||
set_property -dict {PACKAGE_PIN AA19 IOSTANDARD LVCMOS25} [get_ports gp_out[84]] ; ## IO_L22P_T3_13
|
|
||||||
set_property -dict {PACKAGE_PIN AC18 IOSTANDARD LVCMOS25} [get_ports gp_in[84]] ; ## IO_L21P_T3_DQS_13
|
|
||||||
set_property -dict {PACKAGE_PIN AB19 IOSTANDARD LVCMOS25} [get_ports gp_out[85]] ; ## IO_L22N_T3_13
|
|
||||||
set_property -dict {PACKAGE_PIN AC19 IOSTANDARD LVCMOS25} [get_ports gp_in[85]] ; ## IO_L21N_T3_DQS_13
|
|
||||||
set_property -dict {PACKAGE_PIN Y18 IOSTANDARD LVCMOS25} [get_ports gp_out[86]] ; ## IO_L24P_T3_13
|
|
||||||
set_property -dict {PACKAGE_PIN W18 IOSTANDARD LVCMOS25} [get_ports gp_in[86]] ; ## IO_L23P_T3_13
|
|
||||||
set_property -dict {PACKAGE_PIN AA18 IOSTANDARD LVCMOS25} [get_ports gp_out[87]] ; ## IO_L24N_T3_13
|
|
||||||
set_property -dict {PACKAGE_PIN W19 IOSTANDARD LVCMOS25} [get_ports gp_in[87]] ; ## IO_L23N_T3_13
|
|
||||||
|
|
||||||
## vcc
|
|
||||||
|
|
||||||
set_property -dict {PACKAGE_PIN AB24 IOSTANDARD LVCMOS25} [get_ports gp_in_1] ; ## IO_L6N_T0_VREF_13
|
|
||||||
|
|
||||||
## on board
|
|
||||||
|
|
||||||
set_property -dict {PACKAGE_PIN W6} [get_ports gt_ref_clk_p] ; ## MGTREFCLK0P_111
|
|
||||||
set_property -dict {PACKAGE_PIN W5} [get_ports gt_ref_clk_n] ; ## MGTREFCLK0N_111
|
|
||||||
set_property -dict {PACKAGE_PIN AD8} [get_ports gt_rx_p[0]] ; ## MGTXRXP0_111
|
|
||||||
set_property -dict {PACKAGE_PIN AD7} [get_ports gt_rx_n[0]] ; ## MGTXRXN0_111
|
|
||||||
set_property -dict {PACKAGE_PIN AE6} [get_ports gt_rx_p[1]] ; ## MGTXRXP1_111
|
|
||||||
set_property -dict {PACKAGE_PIN AE5} [get_ports gt_rx_n[1]] ; ## MGTXRXN1_111
|
|
||||||
set_property -dict {PACKAGE_PIN AC6} [get_ports gt_rx_p[2]] ; ## MGTXRXP2_111
|
|
||||||
set_property -dict {PACKAGE_PIN AC5} [get_ports gt_rx_n[2]] ; ## MGTXRXN2_111
|
|
||||||
set_property -dict {PACKAGE_PIN AD4} [get_ports gt_rx_p[3]] ; ## MGTXRXP3_111
|
|
||||||
set_property -dict {PACKAGE_PIN AD3} [get_ports gt_rx_n[3]] ; ## MGTXRXN3_111
|
|
||||||
set_property -dict {PACKAGE_PIN AF8} [get_ports gt_tx_p[0]] ; ## MGTXTXP0_111
|
|
||||||
set_property -dict {PACKAGE_PIN AF7} [get_ports gt_tx_n[0]] ; ## MGTXTXN0_111
|
|
||||||
set_property -dict {PACKAGE_PIN AF4} [get_ports gt_tx_p[1]] ; ## MGTXTXP1_111
|
|
||||||
set_property -dict {PACKAGE_PIN AF3} [get_ports gt_tx_n[1]] ; ## MGTXTXN1_111
|
|
||||||
set_property -dict {PACKAGE_PIN AE2} [get_ports gt_tx_p[2]] ; ## MGTXTXP2_111
|
|
||||||
set_property -dict {PACKAGE_PIN AE1} [get_ports gt_tx_n[2]] ; ## MGTXTXN2_111
|
|
||||||
set_property -dict {PACKAGE_PIN AC2} [get_ports gt_tx_p[3]] ; ## MGTXTXP3_111
|
|
||||||
set_property -dict {PACKAGE_PIN AC1} [get_ports gt_tx_n[3]] ; ## MGTXTXN3_111
|
|
||||||
|
|
||||||
## clocks
|
|
||||||
|
|
||||||
create_clock -name ref_clk -period 4.00 [get_ports gt_ref_clk_p]
|
|
||||||
create_clock -name tx_div_clk -period 8.00 [get_pins i_system_wrapper/system_i/axi_pzslb_gt/inst/g_lane_1[0].i_channel/i_gt/i_gtxe2_channel/TXOUTCLK]
|
|
||||||
create_clock -name rx_div_clk -period 8.00 [get_pins i_system_wrapper/system_i/axi_pzslb_gt/inst/g_lane_1[0].i_channel/i_gt/i_gtxe2_channel/RXOUTCLK]
|
|
||||||
create_clock -name tx_div_clk -period 8.00 [get_pins i_system_wrapper/system_i/axi_pzslb_gt/inst/g_lane_1[1].i_channel/i_gt/i_gtxe2_channel/TXOUTCLK]
|
|
||||||
create_clock -name rx_div_clk -period 8.00 [get_pins i_system_wrapper/system_i/axi_pzslb_gt/inst/g_lane_1[1].i_channel/i_gt/i_gtxe2_channel/RXOUTCLK]
|
|
||||||
create_clock -name tx_div_clk -period 8.00 [get_pins i_system_wrapper/system_i/axi_pzslb_gt/inst/g_lane_1[2].i_channel/i_gt/i_gtxe2_channel/TXOUTCLK]
|
|
||||||
create_clock -name rx_div_clk -period 8.00 [get_pins i_system_wrapper/system_i/axi_pzslb_gt/inst/g_lane_1[2].i_channel/i_gt/i_gtxe2_channel/RXOUTCLK]
|
|
||||||
create_clock -name tx_div_clk -period 8.00 [get_pins i_system_wrapper/system_i/axi_pzslb_gt/inst/g_lane_1[3].i_channel/i_gt/i_gtxe2_channel/TXOUTCLK]
|
|
||||||
create_clock -name rx_div_clk -period 8.00 [get_pins i_system_wrapper/system_i/axi_pzslb_gt/inst/g_lane_1[3].i_channel/i_gt/i_gtxe2_channel/RXOUTCLK]
|
|
||||||
|
|
||||||
## MIO loopbacks (fixed-io)
|
|
||||||
## the following are connected to AD9361 GPIO
|
|
||||||
|
|
||||||
## JX4.86 A23 PS_MIO12_500_JX4 <==> JX4.2 NA AD9361_GPO1
|
|
||||||
## JX4.88 B26 PS_MIO11_500_JX4 <==> JX4.1 NA AD9361_GPO0
|
|
||||||
## JX4.91 B25 PS_MIO13_500_JX4 <==> JX4.3 NA AD9361_GPO2
|
|
||||||
## JX4.93 D23 PS_MIO14_500_JX4 <==> JX4.4 NA AD9361_GPO3
|
|
||||||
|
|
||||||
## the following are mio-to-mio loopback (excluding Push-Buttons to LED)
|
|
||||||
|
|
||||||
## JX4.92 E17 PS_MIO46_501_JX4 <==> JX4.94 B19 PS_MIO47_501_JX4
|
|
||||||
|
|
||||||
## the following are mio-to-pl loopback
|
|
||||||
|
|
||||||
## JX4.97 E26 PS_MIO00_500_JX4 <==> JX1.76 K3 IO_L11N_T1_SRCC_33
|
|
||||||
## JX4.100 B20 PS_MIO51_501_JX4 <==> JX4.67 A9 IO_L17P_T2_34
|
|
||||||
## JX4.85 C24 PS_MIO15_500_JX4 <==> JX4.37 E5 IO_L7N_T1_34
|
|
||||||
## JX4.87 A25 PS_MIO10_500_JX4 <==> JX4.42 E6 IO_L10P_T1_34
|
|
||||||
|
|
||||||
set_property -dict {PACKAGE_PIN K3 IOSTANDARD LVCMOS18} [get_ports gp_in_mio[0]] ; ## IO_L11N_T1_SRCC_33
|
|
||||||
set_property -dict {PACKAGE_PIN A9 IOSTANDARD LVCMOS18} [get_ports gp_in_mio[1]] ; ## IO_L17P_T2_34
|
|
||||||
set_property -dict {PACKAGE_PIN E5 IOSTANDARD LVCMOS18} [get_ports gp_in_mio[2]] ; ## IO_L7N_T1_34
|
|
||||||
set_property -dict {PACKAGE_PIN E6 IOSTANDARD LVCMOS18} [get_ports gp_in_mio[3]] ; ## IO_L10P_T1_34
|
|
||||||
|
|
||||||
|
|
@ -5,17 +5,14 @@ source ../../scripts/adi_env.tcl
|
||||||
source $ad_hdl_dir/projects/scripts/adi_project.tcl
|
source $ad_hdl_dir/projects/scripts/adi_project.tcl
|
||||||
source $ad_hdl_dir/projects/scripts/adi_board.tcl
|
source $ad_hdl_dir/projects/scripts/adi_board.tcl
|
||||||
|
|
||||||
adi_project_create ccbrk_pzsdr
|
adi_project_create ccbrk_cmos_pzsdr
|
||||||
adi_project_files ccbrk_pzsdr [list \
|
adi_project_files ccbrk_cmos_pzsdr [list \
|
||||||
"system_top.v" \
|
"system_top.v" \
|
||||||
"system_constr.xdc"\
|
"../ccbrk/system_constr.xdc"\
|
||||||
"$ad_hdl_dir/library/common/ad_iobuf.v" \
|
"$ad_hdl_dir/library/common/ad_iobuf.v" \
|
||||||
"$ad_hdl_dir/projects/common/pzsdr/pzsdr_system_constr.xdc" \
|
"$ad_hdl_dir/projects/common/pzsdr/pzsdr_system_constr.xdc" \
|
||||||
"$ad_hdl_dir/projects/common/pzsdr/pzsdr_lvds_system_constr.xdc" ]
|
"$ad_hdl_dir/projects/common/pzsdr/pzsdr_cmos_system_constr.xdc" ]
|
||||||
|
|
||||||
set_property PROCESSING_ORDER EARLY [get_files $ad_hdl_dir/projects/common/pzsdr/pzsdr_system_constr.xdc]
|
adi_project_run ccbrk_cmos_pzsdr
|
||||||
set_property PROCESSING_ORDER EARLY [get_files system_constr.xdc]
|
|
||||||
|
|
||||||
adi_project_run ccbrk_pzsdr
|
|
||||||
|
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -67,18 +67,13 @@ module system_top (
|
||||||
|
|
||||||
gpio_bd,
|
gpio_bd,
|
||||||
|
|
||||||
rx_clk_in_p,
|
rx_clk_in,
|
||||||
rx_clk_in_n,
|
rx_frame_in,
|
||||||
rx_frame_in_p,
|
rx_data_in,
|
||||||
rx_frame_in_n,
|
tx_clk_out,
|
||||||
rx_data_in_p,
|
tx_frame_out,
|
||||||
rx_data_in_n,
|
tx_data_out,
|
||||||
tx_clk_out_p,
|
tx_gnd,
|
||||||
tx_clk_out_n,
|
|
||||||
tx_frame_out_p,
|
|
||||||
tx_frame_out_n,
|
|
||||||
tx_data_out_p,
|
|
||||||
tx_data_out_n,
|
|
||||||
|
|
||||||
enable,
|
enable,
|
||||||
txnrx,
|
txnrx,
|
||||||
|
|
@ -136,18 +131,13 @@ module system_top (
|
||||||
|
|
||||||
inout [11:0] gpio_bd;
|
inout [11:0] gpio_bd;
|
||||||
|
|
||||||
input rx_clk_in_p;
|
input rx_clk_in;
|
||||||
input rx_clk_in_n;
|
input rx_frame_in;
|
||||||
input rx_frame_in_p;
|
input [11:0] rx_data_in;
|
||||||
input rx_frame_in_n;
|
output tx_clk_out;
|
||||||
input [ 5:0] rx_data_in_p;
|
output tx_frame_out;
|
||||||
input [ 5:0] rx_data_in_n;
|
output [11:0] tx_data_out;
|
||||||
output tx_clk_out_p;
|
output [ 1:0] tx_gnd;
|
||||||
output tx_clk_out_n;
|
|
||||||
output tx_frame_out_p;
|
|
||||||
output tx_frame_out_n;
|
|
||||||
output [ 5:0] tx_data_out_p;
|
|
||||||
output [ 5:0] tx_data_out_n;
|
|
||||||
|
|
||||||
output enable;
|
output enable;
|
||||||
output txnrx;
|
output txnrx;
|
||||||
|
|
@ -188,6 +178,8 @@ module system_top (
|
||||||
|
|
||||||
// assignments
|
// assignments
|
||||||
|
|
||||||
|
assign tx_gnd = 2'd0;
|
||||||
|
|
||||||
assign gp_out[87:43] = gp_out_s[87:43];
|
assign gp_out[87:43] = gp_out_s[87:43];
|
||||||
assign gp_out[42:42] = (gpio_o[61] == 1'b1) ? clk_out : gp_out_s[42:42];
|
assign gp_out[42:42] = (gpio_o[61] == 1'b1) ? clk_out : gp_out_s[42:42];
|
||||||
assign gp_out[41: 0] = gp_out_s[41: 0];
|
assign gp_out[41: 0] = gp_out_s[41: 0];
|
||||||
|
|
@ -288,12 +280,9 @@ module system_top (
|
||||||
.ps_intr_10 (1'b0),
|
.ps_intr_10 (1'b0),
|
||||||
.ps_intr_11 (1'b0),
|
.ps_intr_11 (1'b0),
|
||||||
.ps_intr_15 (1'b0),
|
.ps_intr_15 (1'b0),
|
||||||
.rx_clk_in_n (rx_clk_in_n),
|
.rx_clk_in (rx_clk_in),
|
||||||
.rx_clk_in_p (rx_clk_in_p),
|
.rx_data_in (rx_data_in),
|
||||||
.rx_data_in_n (rx_data_in_n),
|
.rx_frame_in (rx_frame_in),
|
||||||
.rx_data_in_p (rx_data_in_p),
|
|
||||||
.rx_frame_in_n (rx_frame_in_n),
|
|
||||||
.rx_frame_in_p (rx_frame_in_p),
|
|
||||||
.spi0_clk_i (1'b0),
|
.spi0_clk_i (1'b0),
|
||||||
.spi0_clk_o (spi_clk),
|
.spi0_clk_o (spi_clk),
|
||||||
.spi0_csn_0_o (spi_csn),
|
.spi0_csn_0_o (spi_csn),
|
||||||
|
|
@ -315,12 +304,9 @@ module system_top (
|
||||||
.tdd_sync_i (1'b0),
|
.tdd_sync_i (1'b0),
|
||||||
.tdd_sync_o (),
|
.tdd_sync_o (),
|
||||||
.tdd_sync_t (),
|
.tdd_sync_t (),
|
||||||
.tx_clk_out_n (tx_clk_out_n),
|
.tx_clk_out (tx_clk_out),
|
||||||
.tx_clk_out_p (tx_clk_out_p),
|
.tx_data_out (tx_data_out),
|
||||||
.tx_data_out_n (tx_data_out_n),
|
.tx_frame_out (tx_frame_out),
|
||||||
.tx_data_out_p (tx_data_out_p),
|
|
||||||
.tx_frame_out_n (tx_frame_out_n),
|
|
||||||
.tx_frame_out_p (tx_frame_out_p),
|
|
||||||
.txnrx (txnrx),
|
.txnrx (txnrx),
|
||||||
.up_enable (gpio_o[47]),
|
.up_enable (gpio_o[47]),
|
||||||
.up_txnrx (gpio_o[48]));
|
.up_txnrx (gpio_o[48]));
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue