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axi_ad9361: : Update for CORDIC algorithm 

Add the new files to the IP list
Propagate DDS parameters to top file
main
AndreiGrozav 2018-02-07 14:42:35 +02:00 committed by AndreiGrozav
parent 8dd1687094
commit ca81397410
5 changed files with 22 additions and 0 deletions
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4
library/axi_ad9361/axi_ad9361.v
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@ -56,6 +56,8 @@ module axi_ad9361 #(
parameter DAC_IODELAY_ENABLE = 0,
parameter DAC_DATAPATH_DISABLE = 0,
parameter DAC_DDS_DISABLE = 0,
parameter DAC_DDS_TYPE = 1,
parameter DAC_DDS_CORDIC_DW = 16,
parameter DAC_USERPORTS_DISABLE = 0,
parameter DAC_IQCORRECTION_DISABLE = 0,
parameter IO_DELAY_GROUP = "dev_if_delay_group") (
@ -634,6 +636,8 @@ module axi_ad9361 #(
.PPS_RECEIVER_ENABLE (PPS_RECEIVER_ENABLE),
.INIT_DELAY (DAC_INIT_DELAY),
.DDS_DISABLE (DAC_DDS_DISABLE_INT),
.DDS_TYPE (DAC_DDS_TYPE),
.CORDIC_DW (DAC_DDS_CORDIC_DW),
.USERPORTS_DISABLE (DAC_USERPORTS_DISABLE_INT),
.DELAYCNTRL_DISABLE (DAC_DELAYCNTRL_DISABLE_INT),
.IQCORRECTION_DISABLE (DAC_IQCORRECTION_DISABLE_INT))

2
library/axi_ad9361/axi_ad9361_hw.tcl
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@ -9,6 +9,8 @@ ad_ip_files axi_ad9361 [list\
$ad_hdl_dir/library/altera/common/ad_dcfilter.v \
$ad_hdl_dir/library/common/ad_rst.v \
$ad_hdl_dir/library/common/ad_pnmon.v \
$ad_hdl_dir/library/common/ad_dds_cordic_pipe.v \
$ad_hdl_dir/library/common/ad_dds_sine_cordic.v \
$ad_hdl_dir/library/common/ad_dds_sine.v \
$ad_hdl_dir/library/common/ad_dds_1.v \
$ad_hdl_dir/library/common/ad_dds.v \

2
library/axi_ad9361/axi_ad9361_ip.tcl
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@ -12,6 +12,8 @@ adi_ip_files axi_ad9361 [list \
"$ad_hdl_dir/library/xilinx/common/ad_dcfilter.v" \
"$ad_hdl_dir/library/xilinx/common/ad_mul.v" \
"$ad_hdl_dir/library/common/ad_pnmon.v" \
"$ad_hdl_dir/library/common/ad_dds_cordic_pipe.v" \
"$ad_hdl_dir/library/common/ad_dds_sine_cordic.v" \
"$ad_hdl_dir/library/common/ad_dds_sine.v" \
"$ad_hdl_dir/library/common/ad_dds_1.v" \
"$ad_hdl_dir/library/common/ad_dds.v" \

10
library/axi_ad9361/axi_ad9361_tx.v
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@ -46,6 +46,8 @@ module axi_ad9361_tx #(
parameter PPS_RECEIVER_ENABLE = 0,
parameter INIT_DELAY = 0,
parameter DDS_DISABLE = 0,
parameter DDS_TYPE = 1,
parameter CORDIC_DW = 16,
parameter USERPORTS_DISABLE = 0,
parameter DELAYCNTRL_DISABLE = 0,
parameter IQCORRECTION_DISABLE = 0) (
@ -214,6 +216,8 @@ module axi_ad9361_tx #(
.Q_OR_I_N (0),
.DISABLE (0),
.DDS_DISABLE (DDS_DISABLE),
.DDS_TYPE (DDS_TYPE),
.CORDIC_DW (CORDIC_DW),
.USERPORTS_DISABLE (USERPORTS_DISABLE),
.IQCORRECTION_DISABLE (IQCORRECTION_DISABLE))
i_tx_channel_0 (
@ -246,6 +250,8 @@ module axi_ad9361_tx #(
.Q_OR_I_N (1),
.DISABLE (0),
.DDS_DISABLE (DDS_DISABLE),
.DDS_TYPE (DDS_TYPE),
.CORDIC_DW (CORDIC_DW),
.USERPORTS_DISABLE (USERPORTS_DISABLE),
.IQCORRECTION_DISABLE (IQCORRECTION_DISABLE))
i_tx_channel_1 (
@ -278,6 +284,8 @@ module axi_ad9361_tx #(
.Q_OR_I_N (0),
.DISABLE (MODE_1R1T),
.DDS_DISABLE (DDS_DISABLE),
.DDS_TYPE (DDS_TYPE),
.CORDIC_DW (CORDIC_DW),
.USERPORTS_DISABLE (USERPORTS_DISABLE),
.IQCORRECTION_DISABLE (IQCORRECTION_DISABLE))
i_tx_channel_2 (
@ -310,6 +318,8 @@ module axi_ad9361_tx #(
.Q_OR_I_N (1),
.DISABLE (MODE_1R1T),
.DDS_DISABLE (DDS_DISABLE),
.DDS_TYPE (DDS_TYPE),
.CORDIC_DW (CORDIC_DW),
.USERPORTS_DISABLE (USERPORTS_DISABLE),
.IQCORRECTION_DISABLE (IQCORRECTION_DISABLE))
i_tx_channel_3 (

4
library/axi_ad9361/axi_ad9361_tx_channel.v
View File

@ -43,6 +43,8 @@ module axi_ad9361_tx_channel #(
parameter CHANNEL_ID = 32'h0,
parameter DISABLE = 0,
parameter DDS_DISABLE = 0,
parameter DDS_TYPE = 1,
parameter CORDIC_DW = 16,
parameter USERPORTS_DISABLE = 0,
parameter IQCORRECTION_DISABLE = 0) (
@ -337,6 +339,8 @@ module axi_ad9361_tx_channel #(
// dds
ad_dds #(
.DDS_TYPE (DDS_TYPE),
.CORDIC_DW (CORDIC_DW),
.DISABLE (DDS_DISABLE))
i_dds (
.clk (dac_clk),