diff --git a/library/axi_ad9361/axi_ad9361.v b/library/axi_ad9361/axi_ad9361.v
index af7c68188..7028230f9 100644
--- a/library/axi_ad9361/axi_ad9361.v
+++ b/library/axi_ad9361/axi_ad9361.v
@@ -56,6 +56,8 @@ module axi_ad9361 #(
   parameter   DAC_IODELAY_ENABLE = 0,
   parameter   DAC_DATAPATH_DISABLE = 0,
   parameter   DAC_DDS_DISABLE = 0,
+  parameter   DAC_DDS_TYPE = 1,
+  parameter   DAC_DDS_CORDIC_DW = 16,
   parameter   DAC_USERPORTS_DISABLE = 0,
   parameter   DAC_IQCORRECTION_DISABLE = 0,
   parameter   IO_DELAY_GROUP = "dev_if_delay_group") (
@@ -634,6 +636,8 @@ module axi_ad9361 #(
     .PPS_RECEIVER_ENABLE (PPS_RECEIVER_ENABLE),
     .INIT_DELAY (DAC_INIT_DELAY),
     .DDS_DISABLE (DAC_DDS_DISABLE_INT),
+    .DDS_TYPE (DAC_DDS_TYPE),
+    .CORDIC_DW (DAC_DDS_CORDIC_DW),
     .USERPORTS_DISABLE (DAC_USERPORTS_DISABLE_INT),
     .DELAYCNTRL_DISABLE (DAC_DELAYCNTRL_DISABLE_INT),
     .IQCORRECTION_DISABLE (DAC_IQCORRECTION_DISABLE_INT))
diff --git a/library/axi_ad9361/axi_ad9361_hw.tcl b/library/axi_ad9361/axi_ad9361_hw.tcl
index dc1eabdcb..dace36789 100644
--- a/library/axi_ad9361/axi_ad9361_hw.tcl
+++ b/library/axi_ad9361/axi_ad9361_hw.tcl
@@ -9,6 +9,8 @@ ad_ip_files axi_ad9361 [list\
   $ad_hdl_dir/library/altera/common/ad_dcfilter.v \
   $ad_hdl_dir/library/common/ad_rst.v \
   $ad_hdl_dir/library/common/ad_pnmon.v \
+  $ad_hdl_dir/library/common/ad_dds_cordic_pipe.v \
+  $ad_hdl_dir/library/common/ad_dds_sine_cordic.v \
   $ad_hdl_dir/library/common/ad_dds_sine.v \
   $ad_hdl_dir/library/common/ad_dds_1.v \
   $ad_hdl_dir/library/common/ad_dds.v \
diff --git a/library/axi_ad9361/axi_ad9361_ip.tcl b/library/axi_ad9361/axi_ad9361_ip.tcl
index 2b90fe5d8..1d5f38e81 100644
--- a/library/axi_ad9361/axi_ad9361_ip.tcl
+++ b/library/axi_ad9361/axi_ad9361_ip.tcl
@@ -12,6 +12,8 @@ adi_ip_files axi_ad9361 [list \
   "$ad_hdl_dir/library/xilinx/common/ad_dcfilter.v" \
   "$ad_hdl_dir/library/xilinx/common/ad_mul.v" \
   "$ad_hdl_dir/library/common/ad_pnmon.v" \
+  "$ad_hdl_dir/library/common/ad_dds_cordic_pipe.v" \
+  "$ad_hdl_dir/library/common/ad_dds_sine_cordic.v" \
   "$ad_hdl_dir/library/common/ad_dds_sine.v" \
   "$ad_hdl_dir/library/common/ad_dds_1.v" \
   "$ad_hdl_dir/library/common/ad_dds.v" \
diff --git a/library/axi_ad9361/axi_ad9361_tx.v b/library/axi_ad9361/axi_ad9361_tx.v
index 712cf2853..bc6433955 100644
--- a/library/axi_ad9361/axi_ad9361_tx.v
+++ b/library/axi_ad9361/axi_ad9361_tx.v
@@ -46,6 +46,8 @@ module axi_ad9361_tx #(
   parameter   PPS_RECEIVER_ENABLE = 0,
   parameter   INIT_DELAY = 0,
   parameter   DDS_DISABLE = 0,
+  parameter   DDS_TYPE = 1,
+  parameter   CORDIC_DW = 16,
   parameter   USERPORTS_DISABLE = 0,
   parameter   DELAYCNTRL_DISABLE = 0,
   parameter   IQCORRECTION_DISABLE = 0) (
@@ -214,6 +216,8 @@ module axi_ad9361_tx #(
     .Q_OR_I_N (0),
     .DISABLE (0),
     .DDS_DISABLE (DDS_DISABLE),
+    .DDS_TYPE (DDS_TYPE),
+    .CORDIC_DW (CORDIC_DW),
     .USERPORTS_DISABLE (USERPORTS_DISABLE),
     .IQCORRECTION_DISABLE (IQCORRECTION_DISABLE))
   i_tx_channel_0 (
@@ -246,6 +250,8 @@ module axi_ad9361_tx #(
     .Q_OR_I_N (1),
     .DISABLE (0),
     .DDS_DISABLE (DDS_DISABLE),
+    .DDS_TYPE (DDS_TYPE),
+    .CORDIC_DW (CORDIC_DW),
     .USERPORTS_DISABLE (USERPORTS_DISABLE),
     .IQCORRECTION_DISABLE (IQCORRECTION_DISABLE))
   i_tx_channel_1 (
@@ -278,6 +284,8 @@ module axi_ad9361_tx #(
     .Q_OR_I_N (0),
     .DISABLE (MODE_1R1T),
     .DDS_DISABLE (DDS_DISABLE),
+    .DDS_TYPE (DDS_TYPE),
+    .CORDIC_DW (CORDIC_DW),
     .USERPORTS_DISABLE (USERPORTS_DISABLE),
     .IQCORRECTION_DISABLE (IQCORRECTION_DISABLE))
   i_tx_channel_2 (
@@ -310,6 +318,8 @@ module axi_ad9361_tx #(
     .Q_OR_I_N (1),
     .DISABLE (MODE_1R1T),
     .DDS_DISABLE (DDS_DISABLE),
+    .DDS_TYPE (DDS_TYPE),
+    .CORDIC_DW (CORDIC_DW),
     .USERPORTS_DISABLE (USERPORTS_DISABLE),
     .IQCORRECTION_DISABLE (IQCORRECTION_DISABLE))
   i_tx_channel_3 (
diff --git a/library/axi_ad9361/axi_ad9361_tx_channel.v b/library/axi_ad9361/axi_ad9361_tx_channel.v
index cda203a97..36e99789d 100644
--- a/library/axi_ad9361/axi_ad9361_tx_channel.v
+++ b/library/axi_ad9361/axi_ad9361_tx_channel.v
@@ -43,6 +43,8 @@ module axi_ad9361_tx_channel #(
   parameter   CHANNEL_ID = 32'h0,
   parameter   DISABLE = 0,
   parameter   DDS_DISABLE = 0,
+  parameter   DDS_TYPE = 1,
+  parameter   CORDIC_DW = 16,
   parameter   USERPORTS_DISABLE = 0,
   parameter   IQCORRECTION_DISABLE = 0) (
 
@@ -337,6 +339,8 @@ module axi_ad9361_tx_channel #(
   // dds
 
   ad_dds #(
+    .DDS_TYPE (DDS_TYPE),
+    .CORDIC_DW (CORDIC_DW),
     .DISABLE (DDS_DISABLE))
   i_dds (
     .clk (dac_clk),