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Revert "data_offload: Fix oversized inputs in TX mode" 

This reverts commit 0e8f55b2d7.
main
David Winter 2021-10-15 14:23:06 +02:00 committed by Laszlo Nagy
parent d4126739b4
commit cd6024b341
1 changed files with 5 additions and 4 deletions
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9
library/data_offload/data_offload_fsm.v
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@ -55,7 +55,7 @@ module data_offload_fsm #(
output reg wr_resetn_out, output reg wr_resetn_out,
input wr_valid_in, input wr_valid_in,
output wr_valid_out, output wr_valid_out,
output reg wr_ready, output wr_ready,
output reg [WR_ADDRESS_WIDTH-1:0] wr_addr, output reg [WR_ADDRESS_WIDTH-1:0] wr_addr,
input wr_last, input wr_last,
input [WR_DATA_WIDTH/8-1:0] wr_tkeep, input [WR_DATA_WIDTH/8-1:0] wr_tkeep,
@ -260,11 +260,12 @@ module data_offload_fsm #(
always @(posedge wr_clk) begin always @(posedge wr_clk) begin
wr_ready_d <= wr_ready; wr_ready_d <= wr_ready;
// flush out the DMA if the transfer is bigger than the storage size
wr_ready <= ((wr_fsm_state == WR_WRITE_TO_MEM) ||
((wr_fsm_state == WR_WAIT_TO_END) && wr_ready_d && !(wr_valid_in && wr_last))) ? 1'b1 : 1'b0;
end end
// flush out the DMA if the transfer is bigger than the storage size
assign wr_ready = ((wr_fsm_state == WR_WRITE_TO_MEM) ||
((wr_fsm_state == WR_WAIT_TO_END) && wr_valid_in && wr_ready_d && wr_full)) ? 1'b1 : 1'b0;
// write control // write control
assign wr_valid_out = (wr_fsm_state == WR_WRITE_TO_MEM) & wr_valid_in; assign wr_valid_out = (wr_fsm_state == WR_WRITE_TO_MEM) & wr_valid_in;