diff --git a/library/axi_ad9361/axi_ad9361.v b/library/axi_ad9361/axi_ad9361.v
index ca6fbe314..6e325384d 100644
--- a/library/axi_ad9361/axi_ad9361.v
+++ b/library/axi_ad9361/axi_ad9361.v
@@ -252,6 +252,7 @@ module axi_ad9361 #(
   wire            dac_data_q0_s;
   wire            dac_data_i1_s;
   wire            dac_data_q1_s;
+  wire            dac_sync_enable;
   wire    [12:0]  up_adc_dld_s;
   wire    [64:0]  up_adc_dwdata_s;
   wire    [64:0]  up_adc_drdata_s;
@@ -506,6 +507,7 @@ module axi_ad9361 #(
   assign up_wack_tdd_s  = 1'b0;
   assign up_rack_tdd_s  = 1'b0;
   assign up_rdata_tdd_s = 32'b0;
+  assign dac_sync_enable = adc_valid_s;
   end
   endgenerate
 
@@ -545,6 +547,9 @@ module axi_ad9361 #(
     .up_raddr (up_raddr_s),
     .up_rdata (up_rdata_tdd_s),
     .up_rack (up_rack_tdd_s));
+
+  assign dac_sync_enable = adc_valid_s || tdd_mode_s;
+
   end
   endgenerate
 
@@ -673,6 +678,7 @@ module axi_ad9361 #(
     .delay_clk (delay_clk),
     .delay_rst (),
     .delay_locked (delay_locked_s),
+    .dac_sync_enable (dac_sync_enable),
     .dac_sync_in (dac_sync_in),
     .dac_sync_out (dac_sync_out),
     .dac_enable_i0 (dac_enable_i0),
diff --git a/library/axi_ad9361/axi_ad9361_tx.v b/library/axi_ad9361/axi_ad9361_tx.v
index 434db47f8..8f21fddb2 100644
--- a/library/axi_ad9361/axi_ad9361_tx.v
+++ b/library/axi_ad9361/axi_ad9361_tx.v
@@ -77,6 +77,7 @@ module axi_ad9361_tx #(
 
   // master/slave
 
+  input           dac_sync_enable,
   input           dac_sync_in,
   output          dac_sync_out,
 
@@ -160,6 +161,7 @@ module axi_ad9361_tx #(
   // master/slave
 
   assign dac_data_sync_s = (ID == 0) ? dac_sync_out : dac_sync_in;
+  assign dac_sync_out = dac_sync & dac_sync_enable;
 
   always @(posedge dac_clk) begin
     dac_data_sync <= dac_data_sync_s;
@@ -371,7 +373,7 @@ module axi_ad9361_tx #(
     .mmcm_rst (),
     .dac_clk (dac_clk),
     .dac_rst (dac_rst),
-    .dac_sync (dac_sync_out),
+    .dac_sync (dac_sync),
     .dac_frame (),
     .dac_clksel (dac_clksel),
     .dac_par_type (),