fmcadc2- add adf4355 access

main
Rejeesh Kutty 2016-02-18 16:17:33 -05:00
parent a8e9d72273
commit ce760eb691
3 changed files with 69 additions and 56 deletions

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@ -39,33 +39,47 @@
module fmcadc2_spi ( module fmcadc2_spi (
spi_adf4355,
spi_adf4355_ce,
spi_clk, spi_clk,
spi_csn,
spi_adc_csn,
spi_ext_csn_0,
spi_ext_csn_1,
spi_mosi, spi_mosi,
spi_miso, spi_miso,
spi_adc_csn,
spi_adc_clk,
spi_adc_sdio, spi_adc_sdio,
spi_ext_sdio);
spi_adf4355_data_or_csn_0,
spi_adf4355_clk_or_csn_1,
spi_adf4355_le_or_clk,
spi_adf4355_ce_or_sdio);
// select (adf4355 = 0x1), (normal = 0x0)
input spi_adf4355;
input spi_adf4355_ce;
// 4 wire // 4 wire
input spi_clk; input spi_clk;
input [ 2:0] spi_csn;
input spi_adc_csn;
input spi_ext_csn_0;
input spi_ext_csn_1;
input spi_mosi; input spi_mosi;
output spi_miso; output spi_miso;
// 3 wire // adc interface (3 wire)
output spi_adc_csn;
output spi_adc_clk;
inout spi_adc_sdio; inout spi_adc_sdio;
inout spi_ext_sdio;
// adf4355 or normal (AMP/EXT)
output spi_adf4355_data_or_csn_0;
output spi_adf4355_clk_or_csn_1;
output spi_adf4355_le_or_clk;
inout spi_adf4355_ce_or_sdio;
// internal registers // internal registers
@ -77,12 +91,10 @@ module fmcadc2_spi (
wire spi_csn_s; wire spi_csn_s;
wire spi_enable_s; wire spi_enable_s;
wire spi_adc_miso_s;
wire spi_ext_miso_s;
// check on rising edge and change on falling edge // check on rising edge and change on falling edge
assign spi_csn_s = spi_adc_csn & spi_ext_csn_0 & spi_ext_csn_1; assign spi_csn_s = & spi_csn;
assign spi_enable_s = spi_enable & ~spi_csn_s; assign spi_enable_s = spi_enable & ~spi_csn_s;
always @(posedge spi_clk or posedge spi_csn_s) begin always @(posedge spi_clk or posedge spi_csn_s) begin
@ -107,23 +119,22 @@ module fmcadc2_spi (
end end
end end
assign spi_miso = ((spi_adc_miso_s & ~spi_adc_csn) | assign spi_miso = ((spi_adc_sdio & ~spi_csn[0]) | (~spi_adf4355 &
(spi_ext_miso_s & ~spi_ext_csn_0) | spi_adf4355_ce_or_sdio & ~(spi_csn[1] & spi_csn[2])));
(spi_ext_miso_s & ~spi_ext_csn_1));
// io butter // adc interface (3 wire)
IOBUF i_iobuf_adc_sdio ( assign spi_adc_csn = spi_csn[0];
.T (spi_enable_s), assign spi_adc_clk = spi_clk;
.I (spi_mosi), assign spi_adc_sdio = (spi_enable_s == 1'b0) ? spi_mosi : 1'bz;
.O (spi_adc_miso_s),
.IO (spi_adc_sdio));
IOBUF i_iobuf_clk_sdio ( // adf4355 or normal (AMP/EXT)
.T (spi_enable_s),
.I (spi_mosi), assign spi_adf4355_data_or_csn_0 = (spi_adf4355 == 1'b1) ? spi_mosi : spi_csn[1];
.O (spi_ext_miso_s), assign spi_adf4355_clk_or_csn_1 = (spi_adf4355 == 1'b1) ? spi_clk : spi_csn[2];
.IO (spi_ext_sdio)); assign spi_adf4355_le_or_clk = (spi_adf4355 == 1'b1) ? spi_csn[1] : spi_clk;
assign spi_adf4355_ce_or_sdio = (spi_adf4355 == 1'b1) ? spi_adf4355_ce :
((spi_enable_s == 1'b0) ? spi_mosi : 1'bz);
endmodule endmodule

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@ -27,10 +27,10 @@ set_property -dict {PACKAGE_PIN AH24 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_
set_property -dict {PACKAGE_PIN AK18 IOSTANDARD LVCMOS25} [get_ports spi_adc_csn] ; ## H08 FMC_HPC_LA02_N set_property -dict {PACKAGE_PIN AK18 IOSTANDARD LVCMOS25} [get_ports spi_adc_csn] ; ## H08 FMC_HPC_LA02_N
set_property -dict {PACKAGE_PIN AG21 IOSTANDARD LVCMOS25} [get_ports spi_adc_clk] ; ## D08 FMC_HPC_LA01_CC_P set_property -dict {PACKAGE_PIN AG21 IOSTANDARD LVCMOS25} [get_ports spi_adc_clk] ; ## D08 FMC_HPC_LA01_CC_P
set_property -dict {PACKAGE_PIN AH21 IOSTANDARD LVCMOS25} [get_ports spi_adc_sdio] ; ## D09 FMC_HPC_LA01_CC_N set_property -dict {PACKAGE_PIN AH21 IOSTANDARD LVCMOS25} [get_ports spi_adc_sdio] ; ## D09 FMC_HPC_LA01_CC_N
set_property -dict {PACKAGE_PIN AK17 IOSTANDARD LVCMOS25} [get_ports spi_ext_csn_0] ; ## H07 FMC_HPC_LA02_P set_property -dict {PACKAGE_PIN AK17 IOSTANDARD LVCMOS25} [get_ports spi_adf4355_data_or_csn_0] ; ## H07 FMC_HPC_LA02_P
set_property -dict {PACKAGE_PIN AG22 IOSTANDARD LVCMOS25} [get_ports spi_ext_csn_1] ; ## C10 FMC_HPC_LA06_P set_property -dict {PACKAGE_PIN AG22 IOSTANDARD LVCMOS25} [get_ports spi_adf4355_clk_or_csn_1] ; ## C10 FMC_HPC_LA06_P
set_property -dict {PACKAGE_PIN AF20 IOSTANDARD LVCMOS25} [get_ports spi_ext_clk] ; ## G06 FMC_HPC_LA00_CC_P set_property -dict {PACKAGE_PIN AF20 IOSTANDARD LVCMOS25} [get_ports spi_adf4355_le_or_clk] ; ## G06 FMC_HPC_LA00_CC_P
set_property -dict {PACKAGE_PIN AG20 IOSTANDARD LVCMOS25} [get_ports spi_ext_sdio] ; ## G07 FMC_HPC_LA00_CC_N set_property -dict {PACKAGE_PIN AG20 IOSTANDARD LVCMOS25} [get_ports spi_adf4355_ce_or_sdio] ; ## G07 FMC_HPC_LA00_CC_N
set_property -dict {PACKAGE_PIN AH19 IOSTANDARD LVCMOS25} [get_ports adc_irq] ; ## G09 FMC_HPC_LA03_P set_property -dict {PACKAGE_PIN AH19 IOSTANDARD LVCMOS25} [get_ports adc_irq] ; ## G09 FMC_HPC_LA03_P
set_property -dict {PACKAGE_PIN AJ19 IOSTANDARD LVCMOS25} [get_ports adc_fd] ; ## G10 FMC_HPC_LA03_N set_property -dict {PACKAGE_PIN AJ19 IOSTANDARD LVCMOS25} [get_ports adc_fd] ; ## G10 FMC_HPC_LA03_N

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@ -112,10 +112,11 @@ module system_top (
spi_adc_csn, spi_adc_csn,
spi_adc_clk, spi_adc_clk,
spi_adc_sdio, spi_adc_sdio,
spi_ext_csn_0,
spi_ext_csn_1, spi_adf4355_data_or_csn_0,
spi_ext_clk, spi_adf4355_clk_or_csn_1,
spi_ext_sdio); spi_adf4355_le_or_clk,
spi_adf4355_ce_or_sdio);
inout [14:0] ddr_addr; inout [14:0] ddr_addr;
inout [ 2:0] ddr_ba; inout [ 2:0] ddr_ba;
@ -188,10 +189,11 @@ module system_top (
output spi_adc_csn; output spi_adc_csn;
output spi_adc_clk; output spi_adc_clk;
inout spi_adc_sdio; inout spi_adc_sdio;
output spi_ext_csn_0;
output spi_ext_csn_1; output spi_adf4355_data_or_csn_0;
output spi_ext_clk; output spi_adf4355_clk_or_csn_1;
inout spi_ext_sdio; output spi_adf4355_le_or_clk;
inout spi_adf4355_ce_or_sdio;
// internal signals // internal signals
@ -210,14 +212,6 @@ module system_top (
wire rx_sysref; wire rx_sysref;
wire rx_sync; wire rx_sync;
// spi
assign spi_adc_csn = spi0_csn[0];
assign spi_adc_clk = spi0_clk;
assign spi_ext_csn_0 = spi0_csn[1];
assign spi_ext_csn_1 = spi0_csn[2];
assign spi_ext_clk = spi0_clk;
// instantiations // instantiations
IBUFDS_GTE2 i_ibufds_rx_ref_clk ( IBUFDS_GTE2 i_ibufds_rx_ref_clk (
@ -237,22 +231,30 @@ module system_top (
.O (rx_sync_p), .O (rx_sync_p),
.OB (rx_sync_n)); .OB (rx_sync_n));
// spi
assign gpio_i[37:36] = gpio_o[37:36];
fmcadc2_spi i_fmcadc2_spi ( fmcadc2_spi i_fmcadc2_spi (
.spi_adc_csn (spi_adc_csn), .spi_adf4355 (gpio_o[36]),
.spi_ext_csn_0 (spi_ext_csn_0), .spi_adf4355_ce (gpio_o[37]),
.spi_ext_csn_1 (spi_ext_csn_1),
.spi_clk (spi0_clk), .spi_clk (spi0_clk),
.spi_csn (spi0_csn),
.spi_mosi (spi0_mosi), .spi_mosi (spi0_mosi),
.spi_miso (spi0_miso), .spi_miso (spi0_miso),
.spi_adc_csn (spi_adc_csn),
.spi_adc_clk (spi_adc_clk),
.spi_adc_sdio (spi_adc_sdio), .spi_adc_sdio (spi_adc_sdio),
.spi_ext_sdio (spi_ext_sdio)); .spi_adf4355_data_or_csn_0 (spi_adf4355_data_or_csn_0),
.spi_adf4355_clk_or_csn_1 (spi_adf4355_clk_or_csn_1),
.spi_adf4355_le_or_clk (spi_adf4355_le_or_clk),
.spi_adf4355_ce_or_sdio (spi_adf4355_ce_or_sdio));
ad_iobuf #(.DATA_WIDTH(2)) i_iobuf ( ad_iobuf #(.DATA_WIDTH(2)) i_iobuf (
.dio_t (gpio_t[33:32]), .dio_t (gpio_t[33:32]),
.dio_i (gpio_o[33:32]), .dio_i (gpio_o[33:32]),
.dio_o (gpio_i[33:32]), .dio_o (gpio_i[33:32]),
.dio_p ({ adc_irq, // 33 .dio_p ({adc_irq, adc_fd}));
adc_fd})); // 32
ad_iobuf #(.DATA_WIDTH(15)) i_iobuf_bd ( ad_iobuf #(.DATA_WIDTH(15)) i_iobuf_bd (
.dio_t (gpio_t[14:0]), .dio_t (gpio_t[14:0]),