zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

up-dac- support iq mode

main
Rejeesh Kutty 2016-07-21 11:57:03 -04:00
parent 3a1ecb7463
commit ced36f6159
1 changed files with 13 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
library/common/up_dac_channel.v
View File

@ -34,8 +34,6 @@
// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// ***************************************************************************
// ***************************************************************************
// ***************************************************************************
// ***************************************************************************
`timescale 1ns/100ps
@ -54,6 +52,7 @@ module up_dac_channel (
dac_pat_data_1,
dac_pat_data_2,
dac_data_sel,
dac_iq_mode,
dac_iqcor_enb,
dac_iqcor_coeff_1,
dac_iqcor_coeff_2,
@ -106,6 +105,7 @@ module up_dac_channel (
output [15:0] dac_pat_data_1;
output [15:0] dac_pat_data_2;
output [ 3:0] dac_data_sel;
output dac_iq_mode;
output dac_iqcor_enb;
output [15:0] dac_iqcor_coeff_1;
output [15:0] dac_iqcor_coeff_2;
@ -164,6 +164,7 @@ module up_dac_channel (
reg [ 7:0] up_usr_datatype_bits = 'd0;
reg [15:0] up_usr_interpolation_m = 'd0;
reg [15:0] up_usr_interpolation_n = 'd0;
reg up_dac_iq_mode = 'd0;
reg up_rack = 'd0;
reg [31:0] up_rdata = 'd0;
reg [15:0] up_dac_dds_scale_tc_1 = 'd0;
@ -223,6 +224,7 @@ module up_dac_channel (
up_usr_datatype_bits <= 'd0;
up_usr_interpolation_m <= 'd0;
up_usr_interpolation_n <= 'd0;
up_dac_iq_mode <= 'd0;
end else begin
up_wack <= up_wreq_s;
if ((up_wreq_s == 1'b1) && (up_waddr[3:0] == 4'h0)) begin
@ -266,6 +268,9 @@ module up_dac_channel (
up_usr_interpolation_m <= up_wdata[31:16];
up_usr_interpolation_n <= up_wdata[15:0];
end
if ((up_wreq_s == 1'b1) && (up_waddr[3:0] == 4'ha)) begin
up_dac_iq_mode <= up_wdata[0];
end
end
end
@ -291,6 +296,7 @@ module up_dac_channel (
dac_usr_datatype_shift, dac_usr_datatype_total_bits,
dac_usr_datatype_bits};
4'h9: up_rdata <= {dac_usr_interpolation_m, dac_usr_interpolation_n};
4'ha: up_rdata <= {31'd0, up_dac_iq_mode};
default: up_rdata <= 0;
endcase
end else begin
@ -331,10 +337,11 @@ module up_dac_channel (
// dac control & status
up_xfer_cntrl #(.DATA_WIDTH(165)) i_xfer_cntrl (
up_xfer_cntrl #(.DATA_WIDTH(166)) i_xfer_cntrl (
.up_rstn (up_rstn),
.up_clk (up_clk),
.up_data_cntrl ({ up_dac_iqcor_enb,
.up_data_cntrl ({ up_dac_iq_mode,
up_dac_iqcor_enb,
up_dac_iqcor_coeff_tc_1,
up_dac_iqcor_coeff_tc_2,
up_dac_dds_scale_tc_1,
@ -349,7 +356,8 @@ module up_dac_channel (
.up_xfer_done (),
.d_rst (dac_rst),
.d_clk (dac_clk),
.d_data_cntrl ({ dac_iqcor_enb,
.d_data_cntrl ({ dac_iq_mode,
dac_iqcor_enb,
dac_iqcor_coeff_1,
dac_iqcor_coeff_2,
dac_dds_scale_1,