From cf5208122ae808841fec99eab3627315bad7032e Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Tue, 29 May 2018 11:04:34 +0200 Subject: [PATCH] axi_dmac: Increase default store-and-forward memory size to 8 bursts A larger store-and-forward memory provides better protection against worst case memory interface latencies by being able to store more data before over-/underflowing. Based on empirical testing it was found that using a size of 4 bursts can still result in underflows/overflows under certain conditions. These do not happen when using a size of 8 bursts. This change does not significantly increase resource consumption. Both on Intel and Xilinx the block RAM has a minimum depth of 512 entries. With a default burst length of 16 beats that allows for up to 32 bursts without requiring additional block RAM. Signed-off-by: Lars-Peter Clausen --- library/axi_dmac/axi_dmac.v | 2 +- library/axi_dmac/axi_dmac_hw.tcl | 2 +- library/axi_dmac/request_arb.v | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/library/axi_dmac/axi_dmac.v b/library/axi_dmac/axi_dmac.v index 8a75cb338..90c553196 100644 --- a/library/axi_dmac/axi_dmac.v +++ b/library/axi_dmac/axi_dmac.v @@ -53,7 +53,7 @@ module axi_dmac #( parameter DMA_TYPE_SRC = 2, parameter DMA_AXI_ADDR_WIDTH = 32, parameter MAX_BYTES_PER_BURST = 128, - parameter FIFO_SIZE = 4, // In bursts + parameter FIFO_SIZE = 8, // In bursts parameter AXI_ID_WIDTH_SRC = 4, parameter AXI_ID_WIDTH_DEST = 4, parameter DISABLE_DEBUG_REGISTERS = 0)( diff --git a/library/axi_dmac/axi_dmac_hw.tcl b/library/axi_dmac/axi_dmac_hw.tcl index 8898796d2..853bcb3f0 100644 --- a/library/axi_dmac/axi_dmac_hw.tcl +++ b/library/axi_dmac/axi_dmac_hw.tcl @@ -66,7 +66,7 @@ set_parameter_property DMA_LENGTH_WIDTH HDL_PARAMETER true set_parameter_property DMA_LENGTH_WIDTH ALLOWED_RANGES {8:32} set_parameter_property DMA_LENGTH_WIDTH GROUP $group -add_parameter FIFO_SIZE INTEGER 4 +add_parameter FIFO_SIZE INTEGER 8 set_parameter_property FIFO_SIZE DISPLAY_NAME "Store-and-Forward Memory Size (In Bursts)" set_parameter_property FIFO_SIZE HDL_PARAMETER true set_parameter_property FIFO_SIZE ALLOWED_RANGES {2 4 8 16 32} diff --git a/library/axi_dmac/request_arb.v b/library/axi_dmac/request_arb.v index 1345b5261..a5e5670ea 100644 --- a/library/axi_dmac/request_arb.v +++ b/library/axi_dmac/request_arb.v @@ -49,7 +49,7 @@ module dmac_request_arb #( parameter AXI_SLICE_DEST = 0, parameter AXI_SLICE_SRC = 0, parameter MAX_BYTES_PER_BURST = 128, - parameter FIFO_SIZE = 4, + parameter FIFO_SIZE = 8, parameter ID_WIDTH = $clog2(FIFO_SIZE*2), parameter AXI_LENGTH_WIDTH_SRC = 8, parameter AXI_LENGTH_WIDTH_DEST = 8)(