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kcu105: GTH updates

main
Rejeesh Kutty 2014-06-05 14:27:18 -04:00
parent ea22d29862
commit cf56a568c6
6 changed files with 903 additions and 11 deletions
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21
library/axi_jesd_gt/axi_jesd_gt.v
View File

@ -415,13 +415,31 @@ module axi_jesd_gt (
// clock buffers
generate
if (PCORE_DEVICE_TYPE == 0) begin
BUFG i_bufg_rx_clk (
.I (rx_out_clk[0]),
.O (rx_clk_g));
end
if (PCORE_DEVICE_TYPE == 0) begin
BUFG i_bufg_tx_clk (
.I (tx_out_clk[0]),
.O (tx_clk_g));
end
if (PCORE_DEVICE_TYPE == 1) begin
BUFG_GT i_bufg_rx_clk (
.I (rx_out_clk[0]),
.O (rx_clk_g));
end
if (PCORE_DEVICE_TYPE == 1) begin
BUFG_GT i_bufg_tx_clk (
.I (tx_out_clk[0]),
.O (tx_clk_g));
end
endgenerate
// transceivers
@ -431,6 +449,7 @@ module axi_jesd_gt (
ad_gt_common_1 #(
.DRP_ID (14),
.GTH_GTX_N (PCORE_DEVICE_TYPE),
.QPLL_REFCLK_DIV (PCORE_QPLL_REFCLK_DIV),
.QPLL_CFG (PCORE_QPLL_CFG),
.QPLL_FBDIV_RATIO (PCORE_QPLL_FBDIV_RATIO),
@ -453,6 +472,7 @@ module axi_jesd_gt (
ad_gt_common_1 #(
.DRP_ID (15),
.GTH_GTX_N (PCORE_DEVICE_TYPE),
.QPLL_REFCLK_DIV (PCORE_QPLL_REFCLK_DIV),
.QPLL_CFG (PCORE_QPLL_CFG),
.QPLL_FBDIV_RATIO (PCORE_QPLL_FBDIV_RATIO),
@ -485,6 +505,7 @@ module axi_jesd_gt (
ad_gt_channel_1 #(
.DRP_ID (n),
.GTH_GTX_N (PCORE_DEVICE_TYPE),
.CPLL_FBDIV (PCORE_CPLL_FBDIV),
.RX_OUT_DIV (PCORE_RX_OUT_DIV),
.TX_OUT_DIV (PCORE_TX_OUT_DIV),

728
library/common/ad_gt_channel_1.v
View File

@ -103,6 +103,7 @@ module ad_gt_channel_1 (
// parameters
parameter DRP_ID = 0;
parameter GTH_GTX_N = 0;
parameter CPLL_FBDIV = 2;
parameter RX_OUT_DIV = 1;
parameter TX_OUT_DIV = 1;
@ -312,6 +313,8 @@ module ad_gt_channel_1 (
// instantiations
generate
if (GTH_GTX_N == 0) begin
GTXE2_CHANNEL #(
.SIM_RECEIVER_DETECT_PASS ("TRUE"),
.SIM_TX_EIDLE_DRIVE_LEVEL ("X"),
@ -743,7 +746,730 @@ module ad_gt_channel_1 (
.TXPRBSSEL (3'd0),
.TXQPISENP (),
.TXQPISENN ());
end
if (GTH_GTX_N == 1) begin
GTHE3_CHANNEL #(
.ACJTAG_DEBUG_MODE (1'b0),
.ACJTAG_MODE (1'b0),
.ACJTAG_RESET (1'b0),
.ADAPT_CFG0 (16'b1111100000000000),
.ADAPT_CFG1 (16'b0000000000000000),
.ALIGN_COMMA_DOUBLE ("FALSE"),
.ALIGN_COMMA_ENABLE (10'b1111111111),
.ALIGN_COMMA_WORD (1),
.ALIGN_MCOMMA_DET ("TRUE"),
.ALIGN_MCOMMA_VALUE (10'b1010000011),
.ALIGN_PCOMMA_DET ("TRUE"),
.ALIGN_PCOMMA_VALUE (10'b0101111100),
.A_RXOSCALRESET (1'b0),
.A_RXPROGDIVRESET (1'b0),
.A_TXPROGDIVRESET (1'b0),
.CBCC_DATA_SOURCE_SEL ("DECODED"),
.CDR_SWAP_MODE_EN (1'b0),
.CHAN_BOND_KEEP_ALIGN ("FALSE"),
.CHAN_BOND_MAX_SKEW (1),
.CHAN_BOND_SEQ_1_1 (10'b0000000000),
.CHAN_BOND_SEQ_1_2 (10'b0000000000),
.CHAN_BOND_SEQ_1_3 (10'b0000000000),
.CHAN_BOND_SEQ_1_4 (10'b0000000000),
.CHAN_BOND_SEQ_1_ENABLE (4'b1111),
.CHAN_BOND_SEQ_2_1 (10'b0000000000),
.CHAN_BOND_SEQ_2_2 (10'b0000000000),
.CHAN_BOND_SEQ_2_3 (10'b0000000000),
.CHAN_BOND_SEQ_2_4 (10'b0000000000),
.CHAN_BOND_SEQ_2_ENABLE (4'b1111),
.CHAN_BOND_SEQ_2_USE ("FALSE"),
.CHAN_BOND_SEQ_LEN (1),
.CLK_CORRECT_USE ("FALSE"),
.CLK_COR_KEEP_IDLE ("FALSE"),
.CLK_COR_MAX_LAT (12),
.CLK_COR_MIN_LAT (8),
.CLK_COR_PRECEDENCE ("TRUE"),
.CLK_COR_REPEAT_WAIT (0),
.CLK_COR_SEQ_1_1 (10'b0100000000),
.CLK_COR_SEQ_1_2 (10'b0100000000),
.CLK_COR_SEQ_1_3 (10'b0100000000),
.CLK_COR_SEQ_1_4 (10'b0100000000),
.CLK_COR_SEQ_1_ENABLE (4'b1111),
.CLK_COR_SEQ_2_1 (10'b0100000000),
.CLK_COR_SEQ_2_2 (10'b0100000000),
.CLK_COR_SEQ_2_3 (10'b0100000000),
.CLK_COR_SEQ_2_4 (10'b0100000000),
.CLK_COR_SEQ_2_ENABLE (4'b1111),
.CLK_COR_SEQ_2_USE ("FALSE"),
.CLK_COR_SEQ_LEN (1),
.CPLL_CFG0 (16'b0010001111111110),
.CPLL_CFG1 (16'b1010010010010100),
.CPLL_CFG2 (16'b1111000000000100),
.CPLL_CFG3 (6'b000000),
.CPLL_FBDIV (CPLL_FBDIV),
.CPLL_FBDIV_45 (5),
.CPLL_INIT_CFG0 (16'b0000000000011110),
.CPLL_INIT_CFG1 (8'b00000000),
.CPLL_LOCK_CFG (16'b0000000111101000),
.CPLL_REFCLK_DIV (1),
.DDI_CTRL (2'b00),
.DDI_REALIGN_WAIT (15),
.DEC_MCOMMA_DETECT ("TRUE"),
.DEC_PCOMMA_DETECT ("TRUE"),
.DEC_VALID_COMMA_ONLY ("FALSE"),
.DFE_D_X_REL_POS (1'b0),
.DFE_VCM_COMP_EN (1'b0),
.DMONITOR_CFG0 (10'b0000000000),
.DMONITOR_CFG1 (8'b00000000),
.ES_CLK_PHASE_SEL (1'b0),
.ES_CONTROL (6'b000000),
.ES_ERRDET_EN ("TRUE"),
.ES_EYE_SCAN_EN ("TRUE"),
.ES_HORZ_OFFSET (12'b000000000000),
.ES_PMA_CFG (10'b0000000000),
.ES_PRESCALE (5'b00000),
.ES_QUALIFIER0 (16'b0000000000000000),
.ES_QUALIFIER1 (16'b0000000000000000),
.ES_QUALIFIER2 (16'b0000000000000000),
.ES_QUALIFIER3 (16'b0000000000000000),
.ES_QUALIFIER4 (16'b0000000000000000),
.ES_QUAL_MASK0 (16'b0000000000000000),
.ES_QUAL_MASK1 (16'b0000000000000000),
.ES_QUAL_MASK2 (16'b0000000000000000),
.ES_QUAL_MASK3 (16'b0000000000000000),
.ES_QUAL_MASK4 (16'b0000000000000000),
.ES_SDATA_MASK0 (16'b0000000000000000),
.ES_SDATA_MASK1 (16'b0000000000000000),
.ES_SDATA_MASK2 (16'b0000000000000000),
.ES_SDATA_MASK3 (16'b0000000000000000),
.ES_SDATA_MASK4 (16'b0000000000000000),
.EVODD_PHI_CFG (11'b00000000000),
.EYE_SCAN_SWAP_EN (1'b0),
.FTS_DESKEW_SEQ_ENABLE (4'b1111),
.FTS_LANE_DESKEW_CFG (4'b1111),
.FTS_LANE_DESKEW_EN ("FALSE"),
.GEARBOX_MODE (5'b00000),
.GM_BIAS_SELECT (1'b0),
.LOCAL_MASTER (1'b1),
.OOBDIVCTL (2'b00),
.OOB_PWRUP (1'b0),
.PCI3_AUTO_REALIGN ("OVR_1K_BLK"),
.PCI3_PIPE_RX_ELECIDLE (1'b0),
.PCI3_RX_ASYNC_EBUF_BYPASS (2'b00),
.PCI3_RX_ELECIDLE_EI2_ENABLE (1'b0),
.PCI3_RX_ELECIDLE_H2L_COUNT (6'b000000),
.PCI3_RX_ELECIDLE_H2L_DISABLE (3'b000),
.PCI3_RX_ELECIDLE_HI_COUNT (6'b000000),
.PCI3_RX_ELECIDLE_LP4_DISABLE (1'b0),
.PCI3_RX_FIFO_DISABLE (1'b0),
.PCIE_BUFG_DIV_CTRL (16'b0011010100001001),
.PCIE_RXPCS_CFG_GEN3 (16'b0000001010100100),
.PCIE_RXPMA_CFG (16'b0000000000001010),
.PCIE_TXPCS_CFG_GEN3 (16'b0010010010100000),
.PCIE_TXPMA_CFG (16'b0000000000001010),
.PCS_PCIE_EN ("FALSE"),
.PCS_RSVD0 (16'b0000000000000000),
.PCS_RSVD1 (3'b000),
.PD_TRANS_TIME_FROM_P2 (12'b000000111100),
.PD_TRANS_TIME_NONE_P2 (8'b00011001),
.PD_TRANS_TIME_TO_P2 (8'b01100100),
.PLL_SEL_MODE_GEN12 (2'b11),
.PLL_SEL_MODE_GEN3 (2'b11),
.PMA_RSV1 (16'b0000000000000000),
.PROCESS_PAR (3'b010),
.RATE_SW_USE_DRP (1'b0),
.RESET_POWERSAVE_DISABLE (1'b0),
.RXBUFRESET_TIME (5'b00011),
.RXBUF_ADDR_MODE ("FAST"),
.RXBUF_EIDLE_HI_CNT (4'b1000),
.RXBUF_EIDLE_LO_CNT (4'b0000),
.RXBUF_EN ("TRUE"),
.RXBUF_RESET_ON_CB_CHANGE ("TRUE"),
.RXBUF_RESET_ON_COMMAALIGN ("FALSE"),
.RXBUF_RESET_ON_EIDLE ("FALSE"),
.RXBUF_RESET_ON_RATE_CHANGE ("FALSE"),
.RXBUF_THRESH_OVFLW (57),
.RXBUF_THRESH_OVRD ("TRUE"),
.RXBUF_THRESH_UNDFLW (3),
.RXCDRFREQRESET_TIME (5'b00001),
.RXCDRPHRESET_TIME (5'b00001),
.RXCDR_CFG0 (16'b0000000000000000),
.RXCDR_CFG0_GEN3 (16'b0000000000000000),
.RXCDR_CFG1 (16'b0000000000000000),
.RXCDR_CFG1_GEN3 (16'b0000000000000000),
.RXCDR_CFG2 (16'b0000011101100110),
.RXCDR_CFG2_GEN3 (16'b0000011101100110),
.RXCDR_CFG3 (16'b0000000000000000),
.RXCDR_CFG3_GEN3 (16'b0000000000000000),
.RXCDR_CFG4 (16'b0000000000000000),
.RXCDR_CFG4_GEN3 (16'b0000000000000000),
.RXCDR_CFG5 (16'b0000000000000000),
.RXCDR_CFG5_GEN3 (16'b0000000000000000),
.RXCDR_FR_RESET_ON_EIDLE (1'b0),
.RXCDR_HOLD_DURING_EIDLE (1'b0),
.RXCDR_LOCK_CFG0 (16'b0100010010000000),
.RXCDR_LOCK_CFG1 (16'b0101111111111111),
.RXCDR_LOCK_CFG2 (16'b0111011111000011),
.RXCDR_PH_RESET_ON_EIDLE (1'b0),
.RXCFOK_CFG0 (16'b0100000000000000),
.RXCFOK_CFG1 (16'b0000000001100101),
.RXCFOK_CFG2 (16'b0000000000101110),
.RXDFELPMRESET_TIME (7'b0001111),
.RXDFELPM_KL_CFG0 (16'b0000000000000000),
.RXDFELPM_KL_CFG1 (16'b0000000000000010),
.RXDFELPM_KL_CFG2 (16'b0000000000000000),
.RXDFE_CFG0 (16'b0000101000000000),
.RXDFE_CFG1 (16'b0000000000000000),
.RXDFE_GC_CFG0 (16'b0000000000000000),
.RXDFE_GC_CFG1 (16'b0111100001100000),
.RXDFE_GC_CFG2 (16'b0000000000000000),
.RXDFE_H2_CFG0 (16'b0000000000000000),
.RXDFE_H2_CFG1 (16'b0000000000000000),
.RXDFE_H3_CFG0 (16'b0100000000000000),
.RXDFE_H3_CFG1 (16'b0000000000000000),
.RXDFE_H4_CFG0 (16'b0010000000000000),
.RXDFE_H4_CFG1 (16'b0000000000000011),
.RXDFE_H5_CFG0 (16'b0010000000000000),
.RXDFE_H5_CFG1 (16'b0000000000000011),
.RXDFE_H6_CFG0 (16'b0010000000000000),
.RXDFE_H6_CFG1 (16'b0000000000000000),
.RXDFE_H7_CFG0 (16'b0010000000000000),
.RXDFE_H7_CFG1 (16'b0000000000000000),
.RXDFE_H8_CFG0 (16'b0010000000000000),
.RXDFE_H8_CFG1 (16'b0000000000000000),
.RXDFE_H9_CFG0 (16'b0010000000000000),
.RXDFE_H9_CFG1 (16'b0000000000000000),
.RXDFE_HA_CFG0 (16'b0010000000000000),
.RXDFE_HA_CFG1 (16'b0000000000000000),
.RXDFE_HB_CFG0 (16'b0010000000000000),
.RXDFE_HB_CFG1 (16'b0000000000000000),
.RXDFE_HC_CFG0 (16'b0000000000000000),
.RXDFE_HC_CFG1 (16'b0000000000000000),
.RXDFE_HD_CFG0 (16'b0000000000000000),
.RXDFE_HD_CFG1 (16'b0000000000000000),
.RXDFE_HE_CFG0 (16'b0000000000000000),
.RXDFE_HE_CFG1 (16'b0000000000000000),
.RXDFE_HF_CFG0 (16'b0000000000000000),
.RXDFE_HF_CFG1 (16'b0000000000000000),
.RXDFE_OS_CFG0 (16'b1000000000000000),
.RXDFE_OS_CFG1 (16'b0000000000000000),
.RXDFE_UT_CFG0 (16'b1000000000000000),
.RXDFE_UT_CFG1 (16'b0000000000000011),
.RXDFE_VP_CFG0 (16'b1010101000000000),
.RXDFE_VP_CFG1 (16'b0000000000110011),
.RXDLY_CFG (16'b0000000000011111),
.RXDLY_LCFG (16'b0000000000110000),
.RXELECIDLE_CFG ("Sigcfg_4"),
.RXGBOX_FIFO_INIT_RD_ADDR (4),
.RXGEARBOX_EN ("FALSE"),
.RXISCANRESET_TIME (5'b00001),
.RXLPM_CFG (16'b0000000000000000),
.RXLPM_GC_CFG (16'b0000000000000000),
.RXLPM_KH_CFG0 (16'b0000000000000000),
.RXLPM_KH_CFG1 (16'b0000000000000010),
.RXLPM_OS_CFG0 (16'b1000000000000000),
.RXLPM_OS_CFG1 (16'b0000000000000010),
.RXOOB_CFG (9'b000000110),
.RXOOB_CLK_CFG ("PMA"),
.RXOSCALRESET_TIME (5'b00011),
.RXOUT_DIV (RX_OUT_DIV),
.RXPCSRESET_TIME (5'b00011),
.RXPHBEACON_CFG (16'b0000000000000000),
.RXPHDLY_CFG (16'b0010000000100000),
.RXPHSAMP_CFG (16'b0010000100000000),
.RXPHSLIP_CFG (16'b0110011000100010),
.RXPH_MONITOR_SEL (5'b00000),
.RXPI_CFG0 (2'b00),
.RXPI_CFG1 (2'b00),
.RXPI_CFG2 (2'b00),
.RXPI_CFG3 (2'b00),
.RXPI_CFG4 (1'b0),
.RXPI_CFG5 (1'b1),
.RXPI_CFG6 (3'b000),
.RXPI_LPM (1'b0),
.RXPI_VREFSEL (1'b0),
.RXPMACLK_SEL ("DATA"),
.RXPMARESET_TIME (5'b00011),
.RXPRBS_ERR_LOOPBACK (1'b0),
.RXPRBS_LINKACQ_CNT (15),
.RXSLIDE_AUTO_WAIT (7),
.RXSLIDE_MODE ("OFF"),
.RXSYNC_MULTILANE (1'b1),
.RXSYNC_OVRD (1'b0),
.RXSYNC_SKIP_DA (1'b0),
.RX_AFE_CM_EN (1'b0),
.RX_BIAS_CFG0 (16'b0000101010110100),
.RX_BUFFER_CFG (6'b000000),
.RX_CAPFF_SARC_ENB (1'b0),
.RX_CLK25_DIV (RX_CLK25_DIV),
.RX_CLKMUX_EN (1'b1),
.RX_CLK_SLIP_OVRD (5'b00000),
.RX_CM_BUF_CFG (4'b1010),
.RX_CM_BUF_PD (1'b0),
.RX_CM_SEL (2'b11),
.RX_CM_TRIM (4'b1010),
.RX_CTLE3_LPF (8'b00000001),
.RX_DATA_WIDTH (40),
.RX_DDI_SEL (6'b000000),
.RX_DEFER_RESET_BUF_EN ("TRUE"),
.RX_DFELPM_CFG0 (4'b0110),
.RX_DFELPM_CFG1 (1'b1),
.RX_DFELPM_KLKH_AGC_STUP_EN (1'b1),
.RX_DFE_AGC_CFG0 (2'b10),
.RX_DFE_AGC_CFG1 (3'b100),
.RX_DFE_KL_LPM_KH_CFG0 (2'b01),
.RX_DFE_KL_LPM_KH_CFG1 (3'b100),
.RX_DFE_KL_LPM_KL_CFG0 (2'b01),
.RX_DFE_KL_LPM_KL_CFG1 (3'b100),
.RX_DFE_LPM_HOLD_DURING_EIDLE (1'b0),
.RX_DISPERR_SEQ_MATCH ("TRUE"),
.RX_DIVRESET_TIME (5'b00001),
.RX_EN_HI_LR (1'b1),
.RX_EYESCAN_VS_CODE (7'b0000000),
.RX_EYESCAN_VS_NEG_DIR (1'b0),
.RX_EYESCAN_VS_RANGE (2'b00),
.RX_EYESCAN_VS_UT_SIGN (1'b0),
.RX_FABINT_USRCLK_FLOP (1'b0),
.RX_INT_DATAWIDTH (1),
.RX_PMA_POWER_SAVE (1'b0),
.RX_PROGDIV_CFG (20.000000),
.RX_SAMPLE_PERIOD (3'b101),
.RX_SIG_VALID_DLY (11),
.RX_SUM_DFETAPREP_EN (1'b0),
.RX_SUM_IREF_TUNE (4'b0000),
.RX_SUM_RES_CTRL (2'b00),
.RX_SUM_VCMTUNE (4'b0000),
.RX_SUM_VCM_OVWR (1'b0),
.RX_SUM_VREF_TUNE (3'b000),
.RX_TUNE_AFE_OS (2'b10),
.RX_WIDEMODE_CDR (1'b1),
.RX_XCLK_SEL ("RXDES"),
.SAS_MAX_COM (64),
.SAS_MIN_COM (36),
.SATA_BURST_SEQ_LEN (4'b1111),
.SATA_BURST_VAL (3'b100),
.SATA_CPLL_CFG ("VCO_3000MHZ"),
.SATA_EIDLE_VAL (3'b100),
.SATA_MAX_BURST (8),
.SATA_MAX_INIT (21),
.SATA_MAX_WAKE (7),
.SATA_MIN_BURST (4),
.SATA_MIN_INIT (12),
.SATA_MIN_WAKE (4),
.SHOW_REALIGN_COMMA ("TRUE"),
.SIM_RECEIVER_DETECT_PASS ("TRUE"),
.SIM_RESET_SPEEDUP ("TRUE"),
.SIM_TX_EIDLE_DRIVE_LEVEL (1'b0),
.SIM_VERSION ("Ver_1"),
.TAPDLY_SET_TX (2'b00),
.TEMPERATUR_PAR (4'b0010),
.TERM_RCAL_CFG (15'b100001000010000),
.TERM_RCAL_OVRD (3'b000),
.TRANS_TIME_RATE (8'b00001110),
.TST_RSV0 (8'b00000000),
.TST_RSV1 (8'b00000000),
.TXBUF_EN ("TRUE"),
.TXBUF_RESET_ON_RATE_CHANGE ("TRUE"),
.TXDLY_CFG (16'b0000000000001001),
.TXDLY_LCFG (16'b0000000001010000),
.TXDRVBIAS_N (4'b1010),
.TXDRVBIAS_P (4'b1010),
.TXFIFO_ADDR_CFG ("LOW"),
.TXGBOX_FIFO_INIT_RD_ADDR (4),
.TXGEARBOX_EN ("FALSE"),
.TXOUT_DIV (TX_OUT_DIV),
.TXPCSRESET_TIME (5'b00011),
.TXPHDLY_CFG0 (16'b0010000000100000),
.TXPHDLY_CFG1 (16'b0000000011010101),
.TXPH_CFG (16'b0000100110000000),
.TXPH_MONITOR_SEL (5'b00000),
.TXPI_CFG0 (2'b00),
.TXPI_CFG1 (2'b00),
.TXPI_CFG2 (2'b00),
.TXPI_CFG3 (1'b0),
.TXPI_CFG4 (1'b1),
.TXPI_CFG5 (3'b000),
.TXPI_GRAY_SEL (1'b0),
.TXPI_INVSTROBE_SEL (1'b0),
.TXPI_LPM (1'b0),
.TXPI_PPMCLK_SEL ("TXUSRCLK2"),
.TXPI_PPM_CFG (8'b00000000),
.TXPI_SYNFREQ_PPM (3'b000),
.TXPI_VREFSEL (1'b0),
.TXPMARESET_TIME (5'b00011),
.TXSYNC_MULTILANE (1'b1),
.TXSYNC_OVRD (1'b0),
.TXSYNC_SKIP_DA (1'b0),
.TX_CLK25_DIV (TX_CLK25_DIV),
.TX_CLKMUX_EN (1'b1),
.TX_DATA_WIDTH (40),
.TX_DCD_CFG (6'b000010),
.TX_DCD_EN (1'b0),
.TX_DEEMPH0 (6'b000000),
.TX_DEEMPH1 (6'b000000),
.TX_DIVRESET_TIME (5'b00001),
.TX_DRIVE_MODE ("DIRECT"),
.TX_EIDLE_ASSERT_DELAY (3'b100),
.TX_EIDLE_DEASSERT_DELAY (3'b011),
.TX_EML_PHI_TUNE (1'b0),
.TX_FABINT_USRCLK_FLOP (1'b0),
.TX_IDLE_DATA_ZERO (1'b0),
.TX_INT_DATAWIDTH (1),
.TX_LOOPBACK_DRIVE_HIZ ("FALSE"),
.TX_MAINCURSOR_SEL (1'b0),
.TX_MARGIN_FULL_0 (7'b1001111),
.TX_MARGIN_FULL_1 (7'b1001110),
.TX_MARGIN_FULL_2 (7'b1001100),
.TX_MARGIN_FULL_3 (7'b1001010),
.TX_MARGIN_FULL_4 (7'b1001000),
.TX_MARGIN_LOW_0 (7'b1000110),
.TX_MARGIN_LOW_1 (7'b1000101),
.TX_MARGIN_LOW_2 (7'b1000011),
.TX_MARGIN_LOW_3 (7'b1000010),
.TX_MARGIN_LOW_4 (7'b1000000),
.TX_MODE_SEL (3'b000),
.TX_PMADATA_OPT (1'b0),
.TX_PMA_POWER_SAVE (1'b0),
.TX_PROGCLK_SEL ("PREPI"),
.TX_PROGDIV_CFG (20.000000),
.TX_QPI_STATUS_EN (1'b0),
.TX_RXDETECT_CFG (14'b00000000110010),
.TX_RXDETECT_REF (3'b100),
.TX_SAMPLE_PERIOD (3'b101),
.TX_SARC_LPBK_ENB (1'b0),
.TX_XCLK_SEL ("TXOUT"),
.USE_PCS_CLK_PHASE_SEL (1'b0),
.WB_MODE (2'b00))
i_gthe3_channel (
.CFGRESET (1'd0),
.CLKRSVD0 (1'd0),
.CLKRSVD1 (1'd0),
.CPLLLOCKDETCLK (1'd0),
.CPLLLOCKEN (1'd1),
.CPLLPD (cpll_pd),
.CPLLREFCLKSEL (3'b001),
.CPLLRESET (cpll_rst),
.DMONFIFORESET (1'd0),
.DMONITORCLK (1'd0),
.DRPADDR (drp_addr_int[8:0]),
.DRPCLK (drp_clk),
.DRPDI (drp_wdata_int),
.DRPEN (drp_sel_int),
.DRPWE (drp_wr_int),
.EVODDPHICALDONE (1'd0),
.EVODDPHICALSTART (1'd0),
.EVODDPHIDRDEN (1'd0),
.EVODDPHIDWREN (1'd0),
.EVODDPHIXRDEN (1'd0),
.EVODDPHIXWREN (1'd0),
.EYESCANMODE (1'd0),
.EYESCANRESET (1'd0),
.EYESCANTRIGGER (1'd0),
.GTGREFCLK (1'd0),
.GTHRXN (rx_n),
.GTHRXP (rx_p),
.GTNORTHREFCLK0 (1'd0),
.GTNORTHREFCLK1 (1'd0),
.GTREFCLK0 (ref_clk),
.GTREFCLK1 (1'd0),
.GTRESETSEL (1'd0),
.GTRSVD (15'd0),
.GTRXRESET (rx_rst),
.GTSOUTHREFCLK0 (1'd0),
.GTSOUTHREFCLK1 (1'd0),
.GTTXRESET (tx_rst),
.LOOPBACK (3'd0),
.LPBKRXTXSEREN (1'd0),
.LPBKTXRXSEREN (1'd0),
.PCIEEQRXEQADAPTDONE (1'd0),
.PCIERSTIDLE (1'd0),
.PCIERSTTXSYNCSTART (1'd0),
.PCIEUSERRATEDONE (1'd0),
.PCSRSVDIN (16'd0),
.PCSRSVDIN2 (5'd0),
.PMARSVDIN (5'd0),
.QPLL0CLK (qpll_clk),
.QPLL0REFCLK (qpll_ref_clk),
.QPLL1CLK (1'd0),
.QPLL1REFCLK (1'd0),
.RESETOVRD (1'd0),
.RSTCLKENTX (1'd0),
.RXBUFRESET (1'd0),
.RXCDRFREQRESET (1'd0),
.RXCDRHOLD (1'd0),
.RXCDROVRDEN (1'd0),
.RXCDRRESET (1'd0),
.RXCDRRESETRSV (1'd0),
.RXCHBONDEN (1'd0),
.RXCHBONDI (5'd0),
.RXCHBONDLEVEL (2'd0),
.RXCHBONDMASTER (1'd0),
.RXCHBONDSLAVE (1'd0),
.RXCOMMADETEN (1'd1),
.RXDFEAGCCTRL (2'b01),
.RXDFEAGCHOLD (1'd0),
.RXDFEAGCOVRDEN (1'd0),
.RXDFELFHOLD (1'd0),
.RXDFELFOVRDEN (1'd0),
.RXDFELPMRESET (1'd0),
.RXDFETAP10HOLD (1'd0),
.RXDFETAP10OVRDEN (1'd0),
.RXDFETAP11HOLD (1'd0),
.RXDFETAP11OVRDEN (1'd0),
.RXDFETAP12HOLD (1'd0),
.RXDFETAP12OVRDEN (1'd0),
.RXDFETAP13HOLD (1'd0),
.RXDFETAP13OVRDEN (1'd0),
.RXDFETAP14HOLD (1'd0),
.RXDFETAP14OVRDEN (1'd0),
.RXDFETAP15HOLD (1'd0),
.RXDFETAP15OVRDEN (1'd0),
.RXDFETAP2HOLD (1'd0),
.RXDFETAP2OVRDEN (1'd0),
.RXDFETAP3HOLD (1'd0),
.RXDFETAP3OVRDEN (1'd0),
.RXDFETAP4HOLD (1'd0),
.RXDFETAP4OVRDEN (1'd0),
.RXDFETAP5HOLD (1'd0),
.RXDFETAP5OVRDEN (1'd0),
.RXDFETAP6HOLD (1'd0),
.RXDFETAP6OVRDEN (1'd0),
.RXDFETAP7HOLD (1'd0),
.RXDFETAP7OVRDEN (1'd0),
.RXDFETAP8HOLD (1'd0),
.RXDFETAP8OVRDEN (1'd0),
.RXDFETAP9HOLD (1'd0),
.RXDFETAP9OVRDEN (1'd0),
.RXDFEUTHOLD (1'd0),
.RXDFEUTOVRDEN (1'd0),
.RXDFEVPHOLD (1'd0),
.RXDFEVPOVRDEN (1'd0),
.RXDFEVSEN (1'd0),
.RXDFEXYDEN (1'd1),
.RXDLYBYPASS (1'd1),
.RXDLYEN (1'd0),
.RXDLYOVRDEN (1'd0),
.RXDLYSRESET (1'd0),
.RXELECIDLEMODE (2'b11),
.RXGEARBOXSLIP (1'd0),
.RXLATCLK (1'd0),
.RXLPMEN (1'd0),
.RXLPMGCHOLD (1'd0),
.RXLPMGCOVRDEN (1'd0),
.RXLPMHFHOLD (1'd0),
.RXLPMHFOVRDEN (1'd0),
.RXLPMLFHOLD (1'd0),
.RXLPMLFKLOVRDEN (1'd0),
.RXLPMOSHOLD (1'd0),
.RXLPMOSOVRDEN (1'd0),
.RXMCOMMAALIGNEN (rx_comma_align_enb),
.RXMONITORSEL (2'd0),
.RXOOBRESET (1'd0),
.RXOSCALRESET (1'd0),
.RXOSHOLD (1'd0),
.RXOSINTCFG (4'b1101),
.RXOSINTEN (1'd1),
.RXOSINTHOLD (1'd0),
.RXOSINTOVRDEN (1'd0),
.RXOSINTSTROBE (1'd0),
.RXOSINTTESTOVRDEN (1'd0),
.RXOSOVRDEN (1'd0),
.RXOUTCLKSEL (rx_out_clk_sel),
.RXPCOMMAALIGNEN (rx_comma_align_enb),
.RXPCSRESET (1'd0),
.RXPD (2'd0),
.RXPHALIGN (1'd0),
.RXPHALIGNEN (1'd0),
.RXPHDLYPD (1'd1),
.RXPHDLYRESET (1'd0),
.RXPHOVRDEN (1'd0),
.RXPLLCLKSEL (2'b11),
.RXPMARESET (1'd0),
.RXPOLARITY (1'd0),
.RXPRBSCNTRESET (1'd0),
.RXPRBSSEL (4'd0),
.RXPROGDIVRESET (rx_rst),
.RXQPIEN (1'd0),
.RXRATE (rx_rate_p_s),
.RXRATEMODE (1'd0),
.RXSLIDE (1'd0),
.RXSLIPOUTCLK (1'd0),
.RXSLIPPMA (1'd0),
.RXSYNCALLIN (1'd0),
.RXSYNCIN (1'd0),
.RXSYNCMODE (1'd0),
.RXSYSCLKSEL (rx_sys_clk_sel),
.RXUSERRDY (rx_user_ready[3]),
.RXUSRCLK (rx_clk),
.RXUSRCLK2 (rx_clk),
.RX8B10BEN (1'd1),
.SIGVALIDCLK (1'd0),
.TSTIN (20'd0),
.TXBUFDIFFCTRL (3'd0),
.TXCOMINIT (1'd0),
.TXCOMSAS (1'd0),
.TXCOMWAKE (1'd0),
.TXCTRL0 (16'd0),
.TXCTRL1 (16'd0),
.TXCTRL2 ({4'd0, tx_charisk}),
.TXDATA ({32'd0, tx_data}),
.TXDATAEXTENDRSVD (8'd0),
.TXDEEMPH (1'd0),
.TXDETECTRX (1'd0),
.TXDIFFCTRL (4'b1100),
.TXDIFFPD (1'd0),
.TXDLYBYPASS (1'd1),
.TXDLYEN (1'd0),
.TXDLYHOLD (1'd0),
.TXDLYOVRDEN (1'd0),
.TXDLYSRESET (1'd0),
.TXDLYUPDOWN (1'd0),
.TXELECIDLE (1'd0),
.TXHEADER (6'd0),
.TXINHIBIT (1'd0),
.TXLATCLK (1'd0),
.TXMAINCURSOR (7'b1000000),
.TXMARGIN (3'd0),
.TXOUTCLKSEL (tx_out_clk_sel),
.TXPCSRESET (1'd0),
.TXPD (2'd0),
.TXPDELECIDLEMODE (1'd0),
.TXPHALIGN (1'd0),
.TXPHALIGNEN (1'd0),
.TXPHDLYPD (1'd1),
.TXPHDLYRESET (1'd0),
.TXPHDLYTSTCLK (1'd0),
.TXPHINIT (1'd0),
.TXPHOVRDEN (1'd0),
.TXPIPPMEN (1'd0),
.TXPIPPMOVRDEN (1'd0),
.TXPIPPMPD (1'd0),
.TXPIPPMSEL (1'd0),
.TXPIPPMSTEPSIZE (5'd0),
.TXPISOPD (1'd0),
.TXPLLCLKSEL (2'd0),
.TXPMARESET (1'd0),
.TXPOLARITY (1'd0),
.TXPOSTCURSOR (5'd0),
.TXPOSTCURSORINV (1'd0),
.TXPRBSFORCEERR (1'd0),
.TXPRBSSEL (4'd0),
.TXPRECURSOR (5'd0),
.TXPRECURSORINV (1'd0),
.TXPROGDIVRESET (tx_rst),
.TXQPIBIASEN (1'd0),
.TXQPISTRONGPDOWN (1'd0),
.TXQPIWEAKPUP (1'd0),
.TXRATE (3'd0),
.TXRATEMODE (1'd0),
.TXSEQUENCE (7'd0),
.TXSWING (1'd0),
.TXSYNCALLIN (1'd0),
.TXSYNCIN (1'd0),
.TXSYNCMODE (1'd0),
.TXSYSCLKSEL (tx_sys_clk_sel),
.TXUSERRDY (tx_user_ready[3]),
.TXUSRCLK (tx_clk),
.TXUSRCLK2 (tx_clk),
.TX8B10BBYPASS (8'd0),
.TX8B10BEN (1'd1),
.BUFGTCE (),
.BUFGTCEMASK (),
.BUFGTDIV (),
.BUFGTRESET (),
.BUFGTRSTMASK (),
.CPLLFBCLKLOST (),
.CPLLLOCK (cpll_locked_s),
.CPLLREFCLKLOST (),
.DMONITOROUT (),
.DRPDO (drp_rdata_s),
.DRPRDY (drp_ready_s),
.EYESCANDATAERROR (),
.GTHTXN (tx_n),
.GTHTXP (tx_p),
.GTPOWERGOOD (),
.GTREFCLKMONITOR (),
.PCIERATEGEN3 (),
.PCIERATEIDLE (),
.PCIERATEQPLLPD (),
.PCIERATEQPLLRESET (),
.PCIESYNCTXSYNCDONE (),
.PCIEUSERGEN3RDY (),
.PCIEUSERPHYSTATUSRST (),
.PCIEUSERRATESTART (),
.PCSRSVDOUT (),
.PHYSTATUS (),
.PINRSRVDAS (),
.RESETEXCEPTION (),
.RXBUFSTATUS (),
.RXBYTEISALIGNED (),
.RXBYTEREALIGN (),
.RXCDRLOCK (),
.RXCDRPHDONE (),
.RXCHANBONDSEQ (),
.RXCHANISALIGNED (),
.RXCHANREALIGN (),
.RXCHBONDO (),
.RXCLKCORCNT (),
.RXCOMINITDET (),
.RXCOMMADET (),
.RXCOMSASDET (),
.RXCOMWAKEDET (),
.RXCTRL0 ({rx_charisk_open_s, rx_charisk}),
.RXCTRL1 ({rx_disperr_open_s, rx_disperr}),
.RXCTRL2 (),
.RXCTRL3 ({rx_notintable_open_s, rx_notintable}),
.RXDATA ({rx_data_open_s, rx_data}),
.RXDATAEXTENDRSVD (),
.RXDATAVALID (),
.RXDLYSRESETDONE (),
.RXELECIDLE (),
.RXHEADER (),
.RXHEADERVALID (),
.RXMONITOROUT (),
.RXOSINTDONE (),
.RXOSINTSTARTED (),
.RXOSINTSTROBEDONE (),
.RXOSINTSTROBESTARTED (),
.RXOUTCLK (rx_out_clk),
.RXOUTCLKFABRIC (),
.RXOUTCLKPCS (),
.RXPHALIGNDONE (),
.RXPHALIGNERR (),
.RXPMARESETDONE (),
.RXPRBSERR (),
.RXPRBSLOCKED (),
.RXPRGDIVRESETDONE (),
.RXQPISENN (),
.RXQPISENP (),
.RXRATEDONE (),
.RXRECCLKOUT (),
.RXRESETDONE (rx_rst_done),
.RXSLIDERDY (),
.RXSLIPDONE (),
.RXSLIPOUTCLKRDY (),
.RXSLIPPMARDY (),
.RXSTARTOFSEQ (),
.RXSTATUS (),
.RXSYNCDONE (),
.RXSYNCOUT (),
.RXVALID (),
.TXBUFSTATUS (),
.TXCOMFINISH (),
.TXDLYSRESETDONE (),
.TXOUTCLK (tx_out_clk),
.TXOUTCLKFABRIC (),
.TXOUTCLKPCS (),
.TXPHALIGNDONE (),
.TXPHINITDONE (),
.TXPMARESETDONE (),
.TXPRGDIVRESETDONE (),
.TXQPISENN (),
.TXQPISENP (),
.TXRATEDONE (),
.TXRESETDONE (tx_rst_done),
.TXSYNCDONE (),
.TXSYNCOUT ());
end
endgenerate
endmodule
// ***************************************************************************

148
library/common/ad_gt_common_1.v
View File

@ -62,6 +62,7 @@ module ad_gt_common_1 (
// parameters
parameter DRP_ID = 0;
parameter GTH_GTX_N = 0;
parameter QPLL_REFCLK_DIV = 2;
parameter QPLL_CFG = 27'h06801C1;
parameter QPLL_FBDIV_RATIO = 1'b1;
@ -126,6 +127,8 @@ module ad_gt_common_1 (
// instantiations
generate
if (GTH_GTX_N == 0) begin
GTXE2_COMMON #(
.SIM_RESET_SPEEDUP ("TRUE"),
.SIM_QPLLREFCLK_SEL (3'b001),
@ -182,6 +185,151 @@ module ad_gt_common_1 (
.BGRCALOVRD (5'b00000),
.PMARSVD (8'b00000000),
.RCALENB (1'd1));
end
if (GTH_GTX_N == 1) begin
GTHE3_COMMON #(
.SIM_RESET_SPEEDUP ("TRUE"),
.SIM_VERSION ("Ver_1"),
.SARC_EN (1'b1),
.SARC_SEL (1'b0),
.SDM0_DATA_PIN_SEL (1'b0),
.SDM0_WIDTH_PIN_SEL (1'b0),
.SDM1_DATA_PIN_SEL (1'b0),
.SDM1_WIDTH_PIN_SEL (1'b0),
.BIAS_CFG0 (16'b0000000000000000),
.BIAS_CFG1 (16'b0000000000000000),
.BIAS_CFG2 (16'b0000000000000000),
.BIAS_CFG3 (16'b0000000001000000),
.BIAS_CFG4 (16'b0000000000000000),
.COMMON_CFG0 (16'b0000000000000000),
.COMMON_CFG1 (16'b0000000000000000),
.POR_CFG (16'b0000000000000100),
.QPLL0_CFG0 (16'b0011000000011100),
.QPLL0_CFG1 (16'b0000000000011000),
.QPLL0_CFG1_G3 (16'b0000000000011000),
.QPLL0_CFG2 (16'b0000000001001000),
.QPLL0_CFG2_G3 (16'b0000000001001000),
.QPLL0_CFG3 (16'b0000000100100000),
.QPLL0_CFG4 (16'b0000000000001001),
.QPLL0_INIT_CFG0 (16'b0000000000000000),
.QPLL0_LOCK_CFG (16'b0010010111101000),
.QPLL0_LOCK_CFG_G3 (16'b0010010111101000),
.QPLL0_SDM_CFG0 (16'b0000000000000000),
.QPLL0_SDM_CFG1 (16'b0000000000000000),
.QPLL0_SDM_CFG2 (16'b0000000000000000),
.QPLL1_CFG0 (16'b0011000000011100),
.QPLL1_CFG1 (16'b0000000000011000),
.QPLL1_CFG1_G3 (16'b0000000000011000),
.QPLL1_CFG2 (16'b0000000001000000),
.QPLL1_CFG2_G3 (16'b0000000001000000),
.QPLL1_CFG3 (16'b0000000100100000),
.QPLL1_CFG4 (16'b0000000000001001),
.QPLL1_INIT_CFG0 (16'b0000000000000000),
.QPLL1_LOCK_CFG (16'b0010010111101000),
.QPLL1_LOCK_CFG_G3 (16'b0010010111101000),
.QPLL1_SDM_CFG0 (16'b0000000000000000),
.QPLL1_SDM_CFG1 (16'b0000000000000000),
.QPLL1_SDM_CFG2 (16'b0000000000000000),
.RSVD_ATTR0 (16'b0000000000000000),
.RSVD_ATTR1 (16'b0000000000000000),
.RSVD_ATTR2 (16'b0000000000000000),
.RSVD_ATTR3 (16'b0000000000000000),
.SDM0DATA1_0 (16'b0000000000000000),
.SDM0INITSEED0_0 (16'b0000000000000000),
.SDM1DATA1_0 (16'b0000000000000000),
.SDM1INITSEED0_0 (16'b0000000000000000),
.RXRECCLKOUT0_SEL (2'b00),
.RXRECCLKOUT1_SEL (2'b00),
.QPLL0_INIT_CFG1 (8'b00000000),
.QPLL1_INIT_CFG1 (8'b00000000),
.SDM0DATA1_1 (9'b000000000),
.SDM0INITSEED0_1 (9'b000000000),
.SDM1DATA1_1 (9'b000000000),
.SDM1INITSEED0_1 (9'b000000000),
.BIAS_CFG_RSVD (10'b0000000000),
.QPLL0_CP (10'b0000011111),
.QPLL0_CP_G3 (10'b1111111111),
.QPLL0_LPF (10'b1111111111),
.QPLL0_LPF_G3 (10'b0000010101),
.QPLL1_CP (10'b0000011111),
.QPLL1_CP_G3 (10'b1111111111),
.QPLL1_LPF (10'b1111111111),
.QPLL1_LPF_G3 (10'b0000010101),
.QPLL0_FBDIV (QPLL_FBDIV),
.QPLL0_FBDIV_G3 (80),
.QPLL0_REFCLK_DIV (QPLL_REFCLK_DIV),
.QPLL1_FBDIV (QPLL_FBDIV),
.QPLL1_FBDIV_G3 (80),
.QPLL1_REFCLK_DIV (QPLL_REFCLK_DIV))
i_gthe3_common (
.BGBYPASSB (1'd1),
.BGMONITORENB (1'd1),
.BGPDB (1'd1),
.BGRCALOVRD (5'b11111),
.BGRCALOVRDENB (1'd1),
.DRPADDR (drp_addr_int[8:0]),
.DRPCLK (drp_clk),
.DRPDI (drp_wdata_int),
.DRPEN (drp_sel_int),
.DRPWE (drp_wr_int),
.GTGREFCLK0 (1'd0),
.GTGREFCLK1 (1'd0),
.GTNORTHREFCLK00 (1'd0),
.GTNORTHREFCLK01 (1'd0),
.GTNORTHREFCLK10 (1'd0),
.GTNORTHREFCLK11 (1'd0),
.GTREFCLK00 (ref_clk),
.GTREFCLK01 (1'd0),
.GTREFCLK10 (1'd0),
.GTREFCLK11 (1'd0),
.GTSOUTHREFCLK00 (1'd0),
.GTSOUTHREFCLK01 (1'd0),
.GTSOUTHREFCLK10 (1'd0),
.GTSOUTHREFCLK11 (1'd0),
.PMARSVD0 (8'd0),
.PMARSVD1 (8'd0),
.QPLLRSVD1 (8'd0),
.QPLLRSVD2 (5'd0),
.QPLLRSVD3 (5'd0),
.QPLLRSVD4 (8'd0),
.QPLL0CLKRSVD0 (1'd0),
.QPLL0CLKRSVD1 (1'd0),
.QPLL0LOCKDETCLK (1'd0),
.QPLL0LOCKEN (1'd1),
.QPLL0PD (1'd0),
.QPLL0REFCLKSEL (3'b001),
.QPLL0RESET (rst),
.QPLL1CLKRSVD0 (1'd0),
.QPLL1CLKRSVD1 (1'd0),
.QPLL1LOCKDETCLK (1'd0),
.QPLL1LOCKEN (1'd0),
.QPLL1PD (1'd1),
.QPLL1REFCLKSEL (3'b001),
.QPLL1RESET (1'd1),
.RCALENB (1'd1),
.DRPDO (drp_rdata_s),
.DRPRDY (drp_ready_s),
.PMARSVDOUT0 (),
.PMARSVDOUT1 (),
.QPLLDMONITOR0 (),
.QPLLDMONITOR1 (),
.QPLL0FBCLKLOST (),
.QPLL0LOCK (qpll_locked),
.QPLL0OUTCLK (qpll_clk),
.QPLL0OUTREFCLK (qpll_ref_clk),
.QPLL0REFCLKLOST (),
.QPLL1FBCLKLOST (),
.QPLL1LOCK (),
.QPLL1OUTCLK (),
.QPLL1OUTREFCLK (),
.QPLL1REFCLKLOST (),
.REFCLKOUTMONITOR0 (),
.REFCLKOUTMONITOR1 (),
.RXRECCLK0_SEL (),
.RXRECCLK1_SEL ());
end
endgenerate
endmodule

5
projects/adv7511/kcu105/system_top.v
View File

@ -157,8 +157,9 @@ module system_top (
// default logic
assign fan_pwm = 1'b1;
//assign sys_reset_req = mdm_reset | mig_reset | ~mig_ready;
assign sys_reset_req = mdm_reset;
// assign sys_reset_req = mdm_reset | mig_reset | ~mig_ready;
// assign sys_reset_req = mdm_reset;
assign sys_reset_req = 1'b0;
always @(posedge sys_cpu_clk) begin
if (sys_reset_req == 1'b1) begin

8
projects/common/kcu105/kcu105_system_bd.tcl
View File

@ -86,10 +86,6 @@ set_property -dict [list CONFIG.Memory_Type {True_Dual_Port_RAM} CONFIG.use_bram
set sys_mb_debug [create_bd_cell -type ip -vlnv xilinx.com:ip:mdm:3.1 sys_mb_debug]
set_property -dict [list CONFIG.C_USE_UART {1}] $sys_mb_debug
# instance: system reset/clocks
set sys_const_vcc [create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.0 sys_const_vcc]
# instance: ddr (mig)
set axi_ddr_cntrl [create_bd_cell -type ip -vlnv xilinx.com:ip:mig:5.0 axi_ddr_cntrl]
@ -145,11 +141,11 @@ set_property -dict [list CONFIG.C_INTERRUPT_PRESENT {1}] $axi_gpio_sw_led
set axi_intc [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_intc:4.1 axi_intc]
set_property -dict [list CONFIG.C_HAS_FAST {0}] $axi_intc
set sys_concat_aux_intc [create_bd_cell -type ip -vlnv xilinx.com:ip:xlconcat:2.0 sys_concat_aux_intc]
set sys_concat_aux_intc [create_bd_cell -type ip -vlnv xilinx.com:ip:xlconcat:2.1 sys_concat_aux_intc]
set_property -dict [list CONFIG.NUM_PORTS {9}] $sys_concat_aux_intc
set_property -dict [list CONFIG.IN8_WIDTH {5}] $sys_concat_aux_intc
set sys_concat_intc [create_bd_cell -type ip -vlnv xilinx.com:ip:xlconcat:2.0 sys_concat_intc]
set sys_concat_intc [create_bd_cell -type ip -vlnv xilinx.com:ip:xlconcat:2.1 sys_concat_intc]
set_property -dict [list CONFIG.NUM_PORTS {5}] $sys_concat_intc
# hdmi peripherals

4
projects/common/kcu105/kcu105_system_mig.tcl
View File

@ -2,12 +2,12 @@
# ddr controller
set_property -dict [list CONFIG.C0.ControllerType {DDR4_SDRAM}] [get_bd_cells axi_ddr_cntrl]
set_property -dict [list CONFIG.C0.DDR4_TimePeriod {1000}] [get_bd_cells axi_ddr_cntrl]
set_property -dict [list CONFIG.C0.DDR4_TimePeriod {833}] [get_bd_cells axi_ddr_cntrl]
set_property -dict [list CONFIG.C0.DDR4_InputClockPeriod {3333}] [get_bd_cells axi_ddr_cntrl]
set_property -dict [list CONFIG.C0.DDR4_MemoryPart {MT40A256M16HA-083}] [get_bd_cells axi_ddr_cntrl]
set_property -dict [list CONFIG.C0.DDR4_DataWidth {64}] [get_bd_cells axi_ddr_cntrl]
set_property -dict [list CONFIG.C0.DDR4_Mem_Add_Map {ROW_BANK_COLUMN}] [get_bd_cells axi_ddr_cntrl]
set_property -dict [list CONFIG.C0.DDR4_CasWriteLatency {14}] [get_bd_cells axi_ddr_cntrl]
set_property -dict [list CONFIG.C0.DDR4_CasWriteLatency {12}] [get_bd_cells axi_ddr_cntrl]
set_property -dict [list CONFIG.C0.DDR4_AxiDataWidth {512}] [get_bd_cells axi_ddr_cntrl]
set_property -dict [list CONFIG.C0.DDR4_AxiNarrowBurst {true}] [get_bd_cells axi_ddr_cntrl]