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daq2/a10gx- ddr-ref @133

main
Rejeesh Kutty 2015-06-04 10:52:22 -04:00
parent 886c24f597
commit d111692608
3 changed files with 34 additions and 10 deletions
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2
projects/common/a10gx/a10gx_system_assign.tcl
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@ -233,7 +233,7 @@ set_global_assignment -name ENABLE_ADVANCED_IO_TIMING ON
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER ON
set_global_assignment -name TIMEQUEST_DO_REPORT_TIMING ON
set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL ON
set_global_assignment -name TIMEQUEST_REPORT_SCRIPT system_timing.tcl
set_global_assignment -name TIMEQUEST_REPORT_SCRIPT $ad_hdl_dir/projects/scripts/adi_tquest.tcl
set_global_assignment -name ON_CHIP_BITSTREAM_DECOMPRESSION OFF

25
projects/daq2/a10gx/system_bd.qsys
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@ -685,6 +685,21 @@
type="reset"
dir="end" />
<interface name="sys_spi" internal="sys_spi.external" type="conduit" dir="end" />
<interface
name="sys_xcvr_rstcntrl_pll_locked"
internal="sys_xcvr_rstcntrl.pll_locked"
type="conduit"
dir="end" />
<interface
name="sys_xcvr_rstcntrl_rx_ready"
internal="sys_xcvr_rstcntrl.rx_ready"
type="conduit"
dir="end" />
<interface
name="sys_xcvr_rstcntrl_tx_ready"
internal="sys_xcvr_rstcntrl.tx_ready"
type="conduit"
dir="end" />
<interface
name="sys_xcvr_rx_ref_clk"
internal="sys_xcvr_rx_ref_clk.clk_in"
@ -1485,9 +1500,9 @@
<parameter name="PHY_DDR3_CONFIG_ENUM">CONFIG_PHY_AND_HARD_CTRL</parameter>
<parameter name="PHY_DDR3_CORE_CLKS_SHARING_ENUM">CORE_CLKS_SHARING_DISABLED</parameter>
<parameter name="PHY_DDR3_DEFAULT_IO" value="false" />
<parameter name="PHY_DDR3_DEFAULT_REF_CLK_FREQ" value="true" />
<parameter name="PHY_DDR3_DEFAULT_REF_CLK_FREQ" value="false" />
<parameter name="PHY_DDR3_IO_VOLTAGE" value="1.5" />
<parameter name="PHY_DDR3_MEM_CLK_FREQ_MHZ" value="933.3333" />
<parameter name="PHY_DDR3_MEM_CLK_FREQ_MHZ" value="533.3333" />
<parameter name="PHY_DDR3_RATE_ENUM" value="RATE_QUARTER" />
<parameter name="PHY_DDR3_REF_CLK_JITTER_PS" value="10.0" />
<parameter name="PHY_DDR3_USER_AC_IO_STD_ENUM" value="IO_STD_SSTL_15_C1" />
@ -1501,7 +1516,7 @@
<parameter name="PHY_DDR3_USER_DATA_OUT_MODE_ENUM" value="OUT_OCT_34_CAL" />
<parameter name="PHY_DDR3_USER_PING_PONG_EN" value="false" />
<parameter name="PHY_DDR3_USER_PLL_REF_CLK_IO_STD_ENUM" value="IO_STD_LVDS" />
<parameter name="PHY_DDR3_USER_REF_CLK_FREQ_MHZ" value="100.0" />
<parameter name="PHY_DDR3_USER_REF_CLK_FREQ_MHZ" value="133.333" />
<parameter name="PHY_DDR3_USER_RZQ_IO_STD_ENUM" value="IO_STD_CMOS_15" />
<parameter name="PHY_DDR4_CONFIG_ENUM">CONFIG_PHY_AND_HARD_CTRL</parameter>
<parameter name="PHY_DDR4_CORE_CLKS_SHARING_ENUM">CORE_CLKS_SHARING_DISABLED</parameter>
@ -1708,7 +1723,7 @@
<parameter name="AUTO_MM_READ_ADDRESS_MAP" value="" />
<parameter name="AUTO_MM_READ_ADDRESS_WIDTH" value="" />
<parameter name="AUTO_MM_WRITE_ADDRESS_MAP"><![CDATA[<address-map><slave name='sys_ddr3_cntrl.ctrl_amm_0' start='0x80000000' end='0x100000000' /></address-map>]]></parameter>
<parameter name="AUTO_MM_WRITE_ADDRESS_WIDTH">com.altera.entityinterfaces.moduleext.AddressWidthType@1725efb7</parameter>
<parameter name="AUTO_MM_WRITE_ADDRESS_WIDTH">com.altera.entityinterfaces.moduleext.AddressWidthType@4e75700d</parameter>
<parameter name="BURST_ENABLE" value="1" />
<parameter name="BURST_WRAPPING_SUPPORT" value="0" />
<parameter name="CHANNEL_ENABLE" value="0" />
@ -1738,7 +1753,7 @@
<parameter name="AUTO_DEVICE_FAMILY" value="Arria 10" />
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="2" />
<parameter name="AUTO_MM_READ_ADDRESS_MAP"><![CDATA[<address-map><slave name='sys_ddr3_cntrl.ctrl_amm_0' start='0x80000000' end='0x100000000' /></address-map>]]></parameter>
<parameter name="AUTO_MM_READ_ADDRESS_WIDTH">com.altera.entityinterfaces.moduleext.AddressWidthType@10cf986e</parameter>
<parameter name="AUTO_MM_READ_ADDRESS_WIDTH">com.altera.entityinterfaces.moduleext.AddressWidthType@7671b727</parameter>
<parameter name="AUTO_MM_WRITE_ADDRESS_MAP" value="" />
<parameter name="AUTO_MM_WRITE_ADDRESS_WIDTH" value="" />
<parameter name="BURST_ENABLE" value="1" />

17
projects/daq2/a10gx/system_top.v
View File

@ -191,6 +191,9 @@ module system_top (
wire spi_miso_s;
wire spi_mosi_s;
wire [ 7:0] spi_csn_s;
wire xcvr_pll_locked;
wire [ 3:0] xcvr_rx_ready;
wire [ 3:0] xcvr_tx_ready;
// daq2
@ -206,10 +209,13 @@ module system_top (
.spi_sdio (spi_sdio),
.spi_dir (spi_dir));
assign gpio_i[63:44] = 19'd0;
assign gpio_i[43] = trig;
assign gpio_i[39] = 1'd0;
assign gpio_i[37] = 1'd0;
assign gpio_i[63:60] = xcvr_tx_ready;
assign gpio_i[59:56] = xcvr_rx_ready;
assign gpio_i[55:55] = xcvr_pll_locked;
assign gpio_i[54:44] = 11'd0;
assign gpio_i[43:43] = trig;
assign gpio_i[39:39] = 1'd0;
assign gpio_i[37:37] = 1'd0;
ad_iobuf #(.DATA_WIDTH(9)) i_iobuf (
.dio_t ({3'h0, 1'h0, 5'h1f}),
@ -277,6 +283,9 @@ module system_top (
.sys_spi_MOSI (spi_mosi_s),
.sys_spi_SCLK (spi_clk),
.sys_spi_SS_n (spi_csn_s),
.sys_xcvr_rstcntrl_pll_locked_pll_locked (xcvr_pll_locked),
.sys_xcvr_rstcntrl_rx_ready_rx_ready (xcvr_rx_ready),
.sys_xcvr_rstcntrl_tx_ready_tx_ready (xcvr_tx_ready),
.sys_xcvr_rx_ref_clk_clk (rx_ref_clk),
.sys_xcvr_rx_sync_n_export (rx_sync),
.sys_xcvr_rx_sysref_export (rx_sysref),