ad_serdes_clk : The reference clock selection line should by tied to 1

Just the CLKIN1 is used in the MMCM.
2016-01-19 11:18:00 +02:00 · 2016-01-19 11:18:00 +02:00 · d1e638349b
parent c6cfd1a2b6
commit d1e638349b
1 changed files with 1 additions and 0 deletions
--- a/library/common/ad_serdes_clk.v
+++ b/library/common/ad_serdes_clk.v
@ -115,6 +115,7 @@ module ad_serdes_clk (
    .MMCM_CLK1_DIV (MMCM_CLK1_DIV))
  i_mmcm_drp (
    .clk (clk_in_s),
+    .clk_sel (1'b1),
    .mmcm_rst (mmcm_rst),
    .mmcm_clk_0 (clk),
    .mmcm_clk_1 (div_clk),