From d2b26720e60a6e65cb41f929550365d46040ce03 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Wed, 13 Jan 2016 20:09:35 +0100 Subject: [PATCH] common: microzed: Add clock, reset and interrupt support In order for the base project to be usable by other projects it needs to create the clock, reset and interrupt signals that are expected to exist. Signed-off-by: Lars-Peter Clausen --- .../common/microzed/microzed_system_bd.tcl | 55 +++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/projects/common/microzed/microzed_system_bd.tcl b/projects/common/microzed/microzed_system_bd.tcl index 304e9b23f..f0d3eb673 100644 --- a/projects/common/microzed/microzed_system_bd.tcl +++ b/projects/common/microzed/microzed_system_bd.tcl @@ -40,6 +40,43 @@ set_property -dict [list CONFIG.PCW_SPI0_PERIPHERAL_ENABLE {1}] $sys_ps7 set_property -dict [list CONFIG.PCW_SPI0_SPI0_IO {EMIO}] $sys_ps7 set_property -dict [list CONFIG.PCW_SPI1_PERIPHERAL_ENABLE {1}] $sys_ps7 set_property -dict [list CONFIG.PCW_SPI1_SPI1_IO {EMIO}] $sys_ps7 +set_property -dict [list CONFIG.PCW_FPGA0_PERIPHERAL_FREQMHZ {100.0}] $sys_ps7 +set_property -dict [list CONFIG.PCW_USE_FABRIC_INTERRUPT {1}] $sys_ps7 +set_property -dict [list CONFIG.PCW_IRQ_F2P_INTR {1}] $sys_ps7 +set_property -dict [list CONFIG.PCW_IRQ_F2P_MODE {REVERSE}] $sys_ps7 + +set sys_concat_intc [create_bd_cell -type ip -vlnv xilinx.com:ip:xlconcat:2.1 sys_concat_intc] +set_property -dict [list CONFIG.NUM_PORTS {16}] $sys_concat_intc + +set sys_rstgen [create_bd_cell -type ip -vlnv xilinx.com:ip:proc_sys_reset:5.0 sys_rstgen] +set_property -dict [list CONFIG.C_EXT_RST_WIDTH {1}] $sys_rstgen + +# interrupts + +create_bd_port -dir I -type intr ps_intr_00 +create_bd_port -dir I -type intr ps_intr_01 +create_bd_port -dir I -type intr ps_intr_02 +create_bd_port -dir I -type intr ps_intr_03 +create_bd_port -dir I -type intr ps_intr_04 +create_bd_port -dir I -type intr ps_intr_05 +create_bd_port -dir I -type intr ps_intr_06 +create_bd_port -dir I -type intr ps_intr_07 +create_bd_port -dir I -type intr ps_intr_08 +create_bd_port -dir I -type intr ps_intr_09 +create_bd_port -dir I -type intr ps_intr_10 +create_bd_port -dir I -type intr ps_intr_11 +create_bd_port -dir I -type intr ps_intr_12 +create_bd_port -dir I -type intr ps_intr_13 +create_bd_port -dir I -type intr ps_intr_14 +create_bd_port -dir I -type intr ps_intr_15 + +# system reset/clock definitions + +ad_connect sys_cpu_clk sys_ps7/FCLK_CLK0 +ad_connect sys_cpu_reset sys_rstgen/peripheral_reset +ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn +ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk +ad_connect sys_rstgen/ext_reset_in sys_ps7/FCLK_RESET0_N # interface connections @@ -71,4 +108,22 @@ ad_connect spi1_sdo_i sys_ps7/SPI1_MOSI_I ad_connect spi1_sdo_o sys_ps7/SPI1_MOSI_O ad_connect spi1_sdi_i sys_ps7/SPI1_MISO_I +# interrupts +ad_connect sys_concat_intc/dout sys_ps7/IRQ_F2P +ad_connect sys_concat_intc/In15 ps_intr_15 +ad_connect sys_concat_intc/In14 ps_intr_14 +ad_connect sys_concat_intc/In13 ps_intr_13 +ad_connect sys_concat_intc/In12 ps_intr_12 +ad_connect sys_concat_intc/In11 ps_intr_11 +ad_connect sys_concat_intc/In10 ps_intr_10 +ad_connect sys_concat_intc/In9 ps_intr_09 +ad_connect sys_concat_intc/In8 ps_intr_08 +ad_connect sys_concat_intc/In7 ps_intr_07 +ad_connect sys_concat_intc/In6 ps_intr_06 +ad_connect sys_concat_intc/In5 ps_intr_05 +ad_connect sys_concat_intc/In4 ps_intr_04 +ad_connect sys_concat_intc/In3 ps_intr_03 +ad_connect sys_concat_intc/In2 ps_intr_02 +ad_connect sys_concat_intc/In1 ps_intr_01 +ad_connect sys_concat_intc/In0 ps_intr_00