diff --git a/docs/index.rst b/docs/index.rst index 506fb7661..1b5e23a54 100755 --- a/docs/index.rst +++ b/docs/index.rst @@ -23,6 +23,7 @@ HDL Reference Designs AD469X-FMC AD5766-SDZ AD719X-ASDZ + AD738X-FMC AD7616-SDZ AD9081-FMCA-EBZ/AD9082-FMCA-EBZ AD9434-FMC diff --git a/docs/projects/ad738x_fmc/ad738x_spi_engine_hdl.svg b/docs/projects/ad738x_fmc/ad738x_spi_engine_hdl.svg new file mode 100644 index 000000000..03763d3b3 --- /dev/null +++ b/docs/projects/ad738x_fmc/ad738x_spi_engine_hdl.svg @@ -0,0 +1,2027 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + image/svg+xml + + + + + + + + + + + + + + + + + + + + + Ethernet + UART + DDRx + SPI + I2C + Interrupts + + Timer + + + MEMORY INTERCONNECT + Zedboard + + + FMC CONNECTOR + + + AD738X_DMA + 80MHz + + + + ARM (Zynq) + Zynq SoC + + + + + + MISO/SDI + SPI ENGINE FRAMEWORK + CS + MOSI/SDO + SCLK + + + + + + AXIREGMAP + + INTER-CONNECT + + + EXECUTION + + OFFLOAD + + + + + AXI PULSEGEN + + AXI CLKGEN + spi_clk = 160MHz + sys_clk = 100MHz + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 64b + + + 32b + trigger + + diff --git a/docs/projects/ad738x_fmc/index.rst b/docs/projects/ad738x_fmc/index.rst new file mode 100644 index 000000000..d62378bf4 --- /dev/null +++ b/docs/projects/ad738x_fmc/index.rst @@ -0,0 +1,287 @@ +.. _ad738x_fmc: + +AD738x_FMC HDL project +================================================================================ + +Overview +-------------------------------------------------------------------------------- + +The :adi:`AD7380`/ :adi:`AD7381` are a 16-bit and 14-bit pin-compatible family +of dual simultaneous sampling, high speed, low power, successive approximation +register (SAR) analog-to-digital converters (ADCs) that operate from a 3.3 V +power supply and feature throughput rates up to 4 MSPS.The analog input type is +differential for the :adi:`AD7380`, :adi:`AD7381`, :adi:`AD4680`, :adi:`AD4681`, +:adi:`AD7380-4`, :adi:`AD7389-4`, :adi:`AD7381-4` can accepts a wide common-mode +input voltage, and is sampled and converted on the falling edge of CS. + +The :adi:`AD7383`, :adi:`AD7384`, :adi:`AD4682` and :adi:`AD4683` have the +pseudo-differential input while the :adi:`AD7386`, :adi:`AD7387`, :adi:`AD7388`, +:adi:`AD4684` and :adi:`AD4685` have single-ended input. The AD7380 family has +optional integrated on-chip oversampling blocks to improve dynamic range and +reduce noise at lower bandwidths. An internal 2.5 V reference is included. +Alternatively, an external reference up to 3.3 V can be used. + +The conversion process and data acquisition use standard control inputs allowing +for easy interfacing to microprocessors or DSPs. It is compatible with 1.8 V, +2.5 V, and 3.3 V interfaces, using a separate logic supply. + +The dual :adi:`AD7380`, :adi:`AD7381`, :adi:`AD4680`, :adi:`AD4681`, +:adi:`AD7383`, :adi:`AD7384`, :adi:`AD4682`, :adi:`AD4683`, :adi:`AD7386`, +:adi:`AD7387`, :adi:`AD7388`, :adi:`AD4684` and :adi:`AD4685` family are +available in a 16-lead 3mm x 3mm LFCSP package while the quad generics +:adi:`AD7380-4`, :adi:`AD7389-4`, and :adi:`AD7381-4` are available in +4mmx4mm LFCSP package. Both the duals and quad generic operate in specified +from -40°C to +125°C temperature range. + +Applications: + * Motor control position feedback + * Motor control current sense + * Data acquisition system + * EDFA applications + * I and Q demodulation + * SONAR + * Power Quality + +Supported boards +------------------------------------------------------------------------------- + +- :adi:`EVAL-AD7380FMCZ ` +- :adi:`EVAL-AD7381FMCZ ` +- :adi:`EVAL-AD7386FMCZ ` +- :adi:`EVAL-AD7383FMCZ ` +- :adi:`EVAL-AD7380-4FMCZ ` + +Supported devices +------------------------------------------------------------------------------- + +- :adi:`AD7380` +- :adi:`AD7381` +- :adi:`AD7383` +- :adi:`AD7384` +- :adi:`AD7386` +- :adi:`AD7387` +- :adi:`AD7388` +- :adi:`AD4680` +- :adi:`AD4681` +- :adi:`AD4682` +- :adi:`AD4683` +- :adi:`AD4684` +- :adi:`AD4685` + +Supported carriers +------------------------------------------------------------------------------- + +- :xilinx:`ZedBoard ` on FMC slot + +Block design +------------------------------------------------------------------------------- + +Block diagram +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +The data path and clock domains are depicted in the below diagram: + +.. image:: ad738x_spi_engine_hdl.svg + :width: 800 + :align: center + :alt: AD738X_FMC block diagram + +Jumper setup +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +================== ================= ========================================== +Jumper/Solder link Default Position Description +================== ================= ========================================== +LK1 1 Use internal -2.5 V from U9 for AMP_PWR- +LK2 1 Use internal 5 V from U8 for AMP_PWR+. +LK3 1 Use 12 V power supply from FMC +LK4 3 Use internal +3V3 from U3 for VREF +LK5 3 Use internal 2.3 V from U6 for VLOGIC +JP1 1 (SMD RES) Connect external SubMiniature Version B + (SMB) Connector J1 to the A1 buffer + amplifier +JP2 1 (SMD RES) Connect internal signal from A2 to ADC U10 + input AINA- +JP3 1 (SMD RES) Connect internal signal from A2 to ADC U10 + input AINA+ +JP4 3 (SMD RES) The REFIO pin is driven with the external + on board reference +JP5 1 (SMD RES) Use internal +3V3 from U2 for VCC. +JP6 1 (SMD RES) Connect external SMB Connector J2 to the + A1 buffer amplifier +================== ================= ========================================== + +CPU/Memory interconnects addresses +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +The addresses are dependent on the architecture of the FPGA, having an offset +added to the base address from HDL (see more at :ref:`architecture`). + +========================= =========== +Instance Address +========================= =========== +spi_ad738x_adc_axi_regmap 0x44A0_0000 +axi_ad738x_dma 0x44A3_0000 +spi_clkgen 0x44A7_0000 +spi_trigger_gen 0x44B0_0000 +========================= =========== + +I2C connections +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +.. list-table:: + :widths: 20 20 20 20 20 + :header-rows: 1 + + * - I2C type + - I2C manager instance + - Alias + - Address + - I2C subordinate + * - PL + - iic_fmc + - axi_iic_fmc + - 0x4162_0000 + - --- + * - PL + - iic_main + - axi_iic_main + - 0x4160_0000 + - --- + +SPI connections +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +.. list-table:: + :widths: 25 25 25 25 + :header-rows: 1 + + * - SPI type + - SPI manager instance + - SPI subordinate + - CS + * - PL + - axi_spi_engine + - ad738x + - 0 + +Interrupts +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Below are the Programmable Logic interrupts used in this project. + +=================== === ========== =========== +Instance name HDL Linux Zynq Actual Zynq +=================== === ========== =========== +axi_ad738x_dma 13 57 89 +spi_ad738x_adc 12 56 88 +=================== === ========== =========== + +Building the HDL project +------------------------------------------------------------------------------- + +The design is built upon ADI's generic HDL reference design framework. +ADI does not distribute the bit/elf files of these projects so they +must be built from the sources available :git-hdl:`here `. To get +the source you must +`clone `__ +the HDL repository, and then build the project as follows: + +**Linux/Cygwin/WSL** + +.. code-block:: + :linenos: + + user@analog:~$ cd hdl/projects/ad738x_fmc/zed + user@analog:~/hdl/projects/ad738x_fmc/zed$ make + +A more comprehensive build guide can be found in the :ref:`build_hdl` user guide. + +Resources +------------------------------------------------------------------------------- + +Hardware related +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +- Product datasheets: + + - :adi:`AD7380` + - :adi:`AD7381` + - :adi:`AD7383` + - :adi:`AD7384` + - :adi:`AD7386` + - :adi:`AD7387` + - :adi:`AD7388` + - :adi:`AD4680` + - :adi:`AD4681` + - :adi:`AD4682` + - :adi:`AD4683` + - :adi:`AD4684` + - :adi:`AD4685` +- `UG-1304, Evaluation Board User Guide `__ + +HDL related +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +- :git-hdl:`AD738x_FMC HDL project source code ` + +.. list-table:: + :widths: 30 35 35 + :header-rows: 1 + + * - IP name + - Source code link + - Documentation link + * - AXI_CLKGEN + - :git-hdl:`library/axi_dmac ` + - :dokuwiki:`[Wiki] ` + * - AXI_DMAC + - :git-hdl:`library/axi_dmac ` + - :ref:`here ` + * - AXI_HDMI_TX + - :git-hdl:`library/axi_hdmi_tx ` + - :dokuwiki:`[Wiki] ` + * - AXI_I2S_ADI + - :git-hdl:`library/axi_i2s_adi ` + - --- + * - AXI_PWM_GEN + - :git-hdl:`library/axi_pwm_gen ` + - :dokuwiki:`[Wiki] ` + * - AXI_SPDIF_TX + - :git-hdl:`library/axi_spdif_tx ` + - --- + * - AXI_SYSID + - :git-hdl:`library/axi_sysid ` + - :dokuwiki:`[Wiki] ` + * - AXI_SPI_ENGINE + - :git-hdl:`library/spi_engine/axi_spi_engine ` + - :ref:`here ` + * - SPI_ENGINE_EXECUTION + - :git-hdl:`library/spi_engine/spi_engine_execution ` + - :ref:`here ` + * - SPI_ENGINE_INTERCONNECT + - :git-hdl:`library/spi_engine/spi_engine_interconnect ` + - :ref:`here ` + * - SPI_ENGINE_OFFLOAD + - :git-hdl:`library/spi_engine/spi_engine_offload ` + - :ref:`here ` + * - SYSID_ROM + - :git-hdl:`library/sysid_rom ` + - :dokuwiki:`[Wiki] ` + * - UTIL_I2C-MIXER + - :git-hdl:`library/util_i2c_mixer ` + - --- + +- :ref:`SPI Engine Framework documentation ` + +Software related +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +- :git-no-os:`AD738X_FMC No-OS project ` +- :dokuwiki:`AD738X_FMC - No-OS Driver [Wiki] ` + +- :dokuwiki:`How to build No-OS ` + +.. include:: ../common/more_information.rst + +.. include:: ../common/support.rst