From d7edd71aef0d40d7d1897ebb7ea0431b2bf61353 Mon Sep 17 00:00:00 2001 From: Adrian Costina Date: Tue, 14 Mar 2017 15:25:00 +0200 Subject: [PATCH] axi_logic_analyzer: Triggering changes on valid data --- library/axi_logic_analyzer/axi_logic_analyzer.v | 1 + .../axi_logic_analyzer_trigger.v | 15 +++++++++------ 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/library/axi_logic_analyzer/axi_logic_analyzer.v b/library/axi_logic_analyzer/axi_logic_analyzer.v index 1e3b15827..d0dfdab58 100644 --- a/library/axi_logic_analyzer/axi_logic_analyzer.v +++ b/library/axi_logic_analyzer/axi_logic_analyzer.v @@ -215,6 +215,7 @@ module axi_logic_analyzer ( .reset (reset), .data (adc_data), + .data_valid(sample_valid_la), .trigger (trigger_m2), .edge_detect_enable (edge_detect_enable), diff --git a/library/axi_logic_analyzer/axi_logic_analyzer_trigger.v b/library/axi_logic_analyzer/axi_logic_analyzer_trigger.v index b634a1f45..7b15f83da 100644 --- a/library/axi_logic_analyzer/axi_logic_analyzer_trigger.v +++ b/library/axi_logic_analyzer/axi_logic_analyzer_trigger.v @@ -43,6 +43,7 @@ module axi_logic_analyzer_trigger ( input reset, input [15:0] data, + input data_valid, input [ 1:0] trigger, input [17:0] edge_detect_enable, @@ -98,12 +99,14 @@ module axi_logic_analyzer_trigger ( low_level <= 'd0; high_level <= 'd0; end else begin - data_m1 <= {trigger, data} ; - edge_detect <= data_m1 ^ {trigger, data}; - rise_edge <= (data_m1 ^ {trigger, data} ) & {trigger, data}; - fall_edge <= (data_m1 ^ {trigger, data}) & ~{trigger, data}; - low_level <= ~{trigger, data}; - high_level <= {trigger, data}; + if (data_valid == 1'b1) begin + data_m1 <= {trigger, data} ; + edge_detect <= data_m1 ^ {trigger, data}; + rise_edge <= (data_m1 ^ {trigger, data} ) & {trigger, data}; + fall_edge <= (data_m1 ^ {trigger, data}) & ~{trigger, data}; + low_level <= ~{trigger, data}; + high_level <= {trigger, data}; + end end end