adi_board: fixed ddr memory mapping for microblaze projects
parent
53cb087b9c
commit
d86fbb2a08
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@ -547,6 +547,7 @@ proc ad_mem_hpx_interconnect {p_sel p_clk p_name} {
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ad_connect $p_clk $p_intf_clock
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}
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} else {
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set_property CONFIG.NUM_SI $m_interconnect_index $m_interconnect_cell
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if {[lsearch [get_bd_nets -of_object [get_bd_pins $m_interconnect_cell/ACLK*]] [get_bd_nets $p_clk]] == -1 } {
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incr sys_mem_clk_index
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@ -557,7 +558,15 @@ proc ad_mem_hpx_interconnect {p_sel p_clk p_name} {
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if {$p_intf_clock ne ""} {
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ad_connect $p_clk $p_intf_clock
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}
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assign_bd_address $m_addr_seg
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set mem_mapped [get_bd_addr_segs -of [get_bd_addr_spaces -of [get_bd_intf_pins -filter {NAME=~ *DLMB*} -of [get_bd_cells /sys_mb]]] -filter {NAME=~ *DDR* || NAME=~ *ddr*}]
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if {$mem_mapped eq ""} {
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assign_bd_address $m_addr_seg
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} else {
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assign_bd_address -offset [get_property OFFSET $mem_mapped] \
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-range [get_property RANGE $mem_mapped] $m_addr_seg
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}
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}
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if {$p_sel eq "MEM"} {set sys_mem_interconnect_index $m_interconnect_index}
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