daq2/3: update DAC TPL base addresses

The TPL for DACs can be relocated to addresses which match the software
expectations.
main
Laszlo Nagy 2018-11-20 14:00:55 +00:00 committed by Laszlo Nagy
parent 8bce4c5b0a
commit d8e11cfce5
4 changed files with 4 additions and 4 deletions

View File

@ -157,7 +157,7 @@ ad_connect axi_ad9680_fifo/dma_xfer_req axi_ad9680_dma/s_axis_xfer_req
# interconnect (cpu)
ad_cpu_interconnect 0x44A60000 axi_ad9144_xcvr
ad_cpu_interconnect 0x44A00000 axi_ad9144_core
ad_cpu_interconnect 0x44A04000 axi_ad9144_core
ad_cpu_interconnect 0x44A90000 axi_ad9144_jesd
ad_cpu_interconnect 0x7c420000 axi_ad9144_dma
ad_cpu_interconnect 0x44A50000 axi_ad9680_xcvr

View File

@ -184,7 +184,7 @@ ad_cpu_interconnect 0x00029000 avl_adxcfg_1.rcfg_s0
ad_cpu_interconnect 0x0002a000 avl_adxcfg_2.rcfg_s0
ad_cpu_interconnect 0x0002b000 avl_adxcfg_3.rcfg_s0
ad_cpu_interconnect 0x0002c000 axi_ad9144_dma.s_axi
ad_cpu_interconnect 0x00030000 axi_ad9144_core.s_axi
ad_cpu_interconnect 0x00034000 axi_ad9144_core.s_axi
ad_cpu_interconnect 0x00040000 ad9680_jesd204.link_reconfig
ad_cpu_interconnect 0x00044000 ad9680_jesd204.link_management

View File

@ -156,7 +156,7 @@ for {set i 0} {$i < 2} {incr i} {
# interconnect (cpu)
ad_cpu_interconnect 0x44A60000 axi_ad9152_xcvr
ad_cpu_interconnect 0x44A00000 axi_ad9152_core
ad_cpu_interconnect 0x44A04000 axi_ad9152_core
ad_cpu_interconnect 0x44A90000 axi_ad9152_jesd
ad_cpu_interconnect 0x7c420000 axi_ad9152_dma
ad_cpu_interconnect 0x44A50000 axi_ad9680_xcvr

View File

@ -177,7 +177,7 @@ ad_cpu_interconnect 0x00429000 avl_adxcfg_1.rcfg_s0
ad_cpu_interconnect 0x0042a000 avl_adxcfg_2.rcfg_s0
ad_cpu_interconnect 0x0042b000 avl_adxcfg_3.rcfg_s0
ad_cpu_interconnect 0x0042c000 axi_ad9152_dma.s_axi
ad_cpu_interconnect 0x00430000 axi_ad9152_core.s_axi
ad_cpu_interconnect 0x00434000 axi_ad9152_core.s_axi
ad_cpu_interconnect 0x00440000 ad9680_jesd204.link_reconfig
ad_cpu_interconnect 0x00444000 ad9680_jesd204.link_management