adi_ip- a little rearrangement
Rejeesh Kutty
parent
fd56b5a6d3
commit
d916697263
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@ -1,5 +1,6 @@
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## ###############################################################################################
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# check tool version
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## ###############################################################################################
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## check tool version
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if {![info exists REQUIRED_VIVADO_VERSION]} {
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if {![info exists REQUIRED_VIVADO_VERSION]} {
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set REQUIRED_VIVADO_VERSION "2016.2"
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set REQUIRED_VIVADO_VERSION "2016.2"
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@ -11,61 +12,9 @@ if {[info exists ::env(ADI_IGNORE_VERSION_CHECK)]} {
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set IGNORE_VERSION_CHECK 0
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set IGNORE_VERSION_CHECK 0
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}
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}
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# ip related stuff
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## ###############################################################################################
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## ###############################################################################################
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proc adi_ip_create {ip_name} {
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## ip related stuff
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global ad_hdl_dir
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global ad_phdl_dir
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global REQUIRED_VIVADO_VERSION
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global IGNORE_VERSION_CHECK
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if {!$IGNORE_VERSION_CHECK && [string compare [version -short] $REQUIRED_VIVADO_VERSION] != 0} {
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return -code error [format "ERROR: This library requires Vivado %s." $REQUIRED_VIVADO_VERSION]
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}
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create_project $ip_name . -force
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set_msg_config -id {IP_Flow 19-3656} -new_severity INFO
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set_msg_config -id {IP_Flow 19-2999} -new_severity INFO
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set_msg_config -id {IP_Flow 19-1654} -new_severity INFO
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set_msg_config -id {IP_Flow 19-459} -new_severity INFO
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set lib_dirs $ad_hdl_dir/library
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if {$ad_hdl_dir ne $ad_phdl_dir} {
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lappend lib_dirs $ad_phdl_dir/library
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}
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set_property ip_repo_paths $lib_dirs [current_fileset]
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update_ip_catalog
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set proj_dir [get_property directory [current_project]]
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set proj_name [get_projects $ip_name]
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}
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proc adi_ip_files {ip_name ip_files} {
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set proj_fileset [get_filesets sources_1]
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add_files -norecurse -scan_for_includes -fileset $proj_fileset $ip_files
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set_property "top" "$ip_name" $proj_fileset
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}
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proc adi_ip_constraints {ip_name ip_constr_files {processing_order late}} {
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set proj_filegroup [ipx::get_file_groups -of_objects [ipx::current_core] -filter {NAME =~ *synthesis*}]
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foreach f_name $ip_constr_files {
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ipx::add_file $f_name $proj_filegroup
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set_property type xdc [ipx::get_files $f_name -of_objects $proj_filegroup]
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set_property processing_order $processing_order [ipx::get_files $f_name -of_objects $proj_filegroup]
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puts [string range $f_name [expr [string last / $f_name] +1] \
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[expr [string last "_constr.xdc" $f_name] -1]]
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set_property SCOPED_TO_REF [string range $f_name [expr [string last / $f_name] +1] \
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[expr [string last "_constr.xdc" $f_name] -1]] \
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[ipx::get_files $f_name -of_objects $proj_filegroup]
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}
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ipx::save_core
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}
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proc adi_ip_ttcl {ip_name ip_constr_files} {
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proc adi_ip_ttcl {ip_name ip_constr_files} {
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@ -87,48 +36,6 @@ proc adi_ip_bd {ip_name ip_bd_files} {
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] $f
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] $f
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}
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}
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proc adi_ip_properties {ip_name} {
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adi_ip_properties_lite $ip_name
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ipx::infer_bus_interface {\
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s_axi_awvalid \
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s_axi_awaddr \
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s_axi_awprot \
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s_axi_awready \
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s_axi_wvalid \
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s_axi_wdata \
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s_axi_wstrb \
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s_axi_wready \
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s_axi_bvalid \
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s_axi_bresp \
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s_axi_bready \
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s_axi_arvalid \
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s_axi_araddr \
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s_axi_arprot \
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s_axi_arready \
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s_axi_rvalid \
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s_axi_rdata \
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s_axi_rresp \
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s_axi_rready} \
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xilinx.com:interface:aximm_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface s_axi_aclk xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface s_axi_aresetn xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::add_memory_map {s_axi} [ipx::current_core]
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set_property slave_memory_map_ref {s_axi} [ipx::get_bus_interfaces s_axi -of_objects [ipx::current_core]]
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ipx::add_address_block {axi_lite} [ipx::get_memory_maps s_axi -of_objects [ipx::current_core]]
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set_property range {65536} [ipx::get_address_blocks axi_lite \
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-of_objects [ipx::get_memory_maps s_axi -of_objects [ipx::current_core]]]
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ipx::add_bus_parameter ASSOCIATED_BUSIF [ipx::get_bus_interfaces s_axi_aclk \
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-of_objects [ipx::current_core]]
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set_property value s_axi [ipx::get_bus_parameters ASSOCIATED_BUSIF \
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-of_objects [ipx::get_bus_interfaces s_axi_aclk \
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-of_objects [ipx::current_core]]]
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ipx::save_core
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}
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proc adi_ip_infer_streaming_interfaces {ip_name} {
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proc adi_ip_infer_streaming_interfaces {ip_name} {
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ipx::infer_bus_interfaces xilinx.com:interface:axis_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interfaces xilinx.com:interface:axis_rtl:1.0 [ipx::current_core]
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@ -141,63 +48,6 @@ proc adi_ip_infer_mm_interfaces {ip_name} {
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}
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}
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proc adi_ip_properties_lite {ip_name} {
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ipx::package_project -root_dir . \
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-vendor analog.com \
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-library user \
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-taxonomy /Analog_Devices
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set_property vendor_display_name {Analog Devices} [ipx::current_core]
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set_property company_url {www.analog.com} [ipx::current_core]
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set_property supported_families {\
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virtex7 Production \
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qvirtex7 Production \
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kintex7 Production \
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kintex7l Production \
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qkintex7 Production \
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qkintex7l Production \
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artix7 Production \
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artix7l Production \
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aartix7 Production \
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qartix7 Production \
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zynq Production \
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qzynq Production \
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azynq Production \
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virtexu Production \
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kintexuplus Production \
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zynquplus Production \
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kintexu Production \
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virtex7 Beta \
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qvirtex7 Beta \
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kintex7 Beta \
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kintex7l Beta \
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qkintex7 Beta \
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qkintex7l Beta \
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artix7 Beta \
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artix7l Beta \
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aartix7 Beta \
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qartix7 Beta \
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zynq Beta \
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qzynq Beta \
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azynq Beta \
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virtexu Beta \
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virtexuplus Beta \
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kintexuplus Beta \
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zynquplus Beta \
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kintexu Beta}\
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[ipx::current_core]
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ipx::remove_all_bus_interface [ipx::current_core]
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set memory_maps [ipx::get_memory_maps * -of_objects [ipx::current_core]]
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foreach map $memory_maps {
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ipx::remove_memory_map [lindex $map 2] [ipx::current_core ]
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}
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ipx::save_core
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}
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proc adi_set_ports_dependency {port_prefix dependency} {
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proc adi_set_ports_dependency {port_prefix dependency} {
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foreach port [ipx::get_ports [format "%s%s" $port_prefix "*"]] {
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foreach port [ipx::get_ports [format "%s%s" $port_prefix "*"]] {
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set_property ENABLEMENT_DEPENDENCY $dependency $port
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set_property ENABLEMENT_DEPENDENCY $dependency $port
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@ -266,6 +116,165 @@ proc adi_ip_add_core_dependencies {vlnvs} {
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}
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}
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}
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}
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## ###############################################################################################
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## ###############################################################################################
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## ip related stuff
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proc adi_ip_create {ip_name} {
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global ad_hdl_dir
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global ad_phdl_dir
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global REQUIRED_VIVADO_VERSION
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global IGNORE_VERSION_CHECK
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if {!$IGNORE_VERSION_CHECK && [string compare [version -short] $REQUIRED_VIVADO_VERSION] != 0} {
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return -code error [format "ERROR: This library requires Vivado %s." $REQUIRED_VIVADO_VERSION]
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}
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create_project $ip_name . -force
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set_msg_config -id {IP_Flow 19-3656} -new_severity INFO
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set_msg_config -id {IP_Flow 19-2999} -new_severity INFO
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set_msg_config -id {IP_Flow 19-1654} -new_severity INFO
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set_msg_config -id {IP_Flow 19-459} -new_severity INFO
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set lib_dirs $ad_hdl_dir/library
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if {$ad_hdl_dir ne $ad_phdl_dir} {
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lappend lib_dirs $ad_phdl_dir/library
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}
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set_property ip_repo_paths $lib_dirs [current_fileset]
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update_ip_catalog
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set proj_dir [get_property directory [current_project]]
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set proj_name [get_projects $ip_name]
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}
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proc adi_ip_files {ip_name ip_files} {
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set proj_fileset [get_filesets sources_1]
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add_files -norecurse -scan_for_includes -fileset $proj_fileset $ip_files
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set_property "top" "$ip_name" $proj_fileset
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}
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proc adi_ip_constraints {ip_name ip_constr_files {processing_order late}} {
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set proj_filegroup [ipx::get_file_groups -of_objects [ipx::current_core] -filter {NAME =~ *synthesis*}]
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foreach f_name $ip_constr_files {
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ipx::add_file $f_name $proj_filegroup
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set_property type xdc [ipx::get_files $f_name -of_objects $proj_filegroup]
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set_property processing_order $processing_order [ipx::get_files $f_name -of_objects $proj_filegroup]
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puts [string range $f_name [expr [string last / $f_name] +1] \
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[expr [string last "_constr.xdc" $f_name] -1]]
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set_property SCOPED_TO_REF [string range $f_name [expr [string last / $f_name] +1] \
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[expr [string last "_constr.xdc" $f_name] -1]] \
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[ipx::get_files $f_name -of_objects $proj_filegroup]
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}
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ipx::save_core
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}
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proc adi_ip_properties_lite {ip_name} {
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ipx::package_project -root_dir . \
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-vendor analog.com \
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-library user \
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-taxonomy /Analog_Devices
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set_property vendor_display_name {Analog Devices} [ipx::current_core]
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set_property company_url {www.analog.com} [ipx::current_core]
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set_property supported_families {\
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virtex7 Production \
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qvirtex7 Production \
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kintex7 Production \
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kintex7l Production \
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qkintex7 Production \
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qkintex7l Production \
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artix7 Production \
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artix7l Production \
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aartix7 Production \
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qartix7 Production \
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zynq Production \
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qzynq Production \
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azynq Production \
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virtexu Production \
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kintexuplus Production \
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zynquplus Production \
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kintexu Production \
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virtex7 Beta \
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qvirtex7 Beta \
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kintex7 Beta \
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kintex7l Beta \
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qkintex7 Beta \
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qkintex7l Beta \
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artix7 Beta \
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artix7l Beta \
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aartix7 Beta \
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qartix7 Beta \
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zynq Beta \
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qzynq Beta \
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azynq Beta \
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virtexu Beta \
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virtexuplus Beta \
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kintexuplus Beta \
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zynquplus Beta \
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kintexu Beta}\
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[ipx::current_core]
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ipx::remove_all_bus_interface [ipx::current_core]
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set memory_maps [ipx::get_memory_maps * -of_objects [ipx::current_core]]
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foreach map $memory_maps {
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ipx::remove_memory_map [lindex $map 2] [ipx::current_core ]
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}
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ipx::save_core
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}
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proc adi_ip_properties {ip_name} {
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adi_ip_properties_lite $ip_name
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ipx::infer_bus_interface {\
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s_axi_awvalid \
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s_axi_awaddr \
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s_axi_awprot \
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s_axi_awready \
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s_axi_wvalid \
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s_axi_wdata \
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s_axi_wstrb \
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s_axi_wready \
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s_axi_bvalid \
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s_axi_bresp \
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s_axi_bready \
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s_axi_arvalid \
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s_axi_araddr \
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s_axi_arprot \
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s_axi_arready \
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s_axi_rvalid \
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s_axi_rdata \
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s_axi_rresp \
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s_axi_rready} \
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xilinx.com:interface:aximm_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface s_axi_aclk xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface s_axi_aresetn xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::add_memory_map {s_axi} [ipx::current_core]
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set_property slave_memory_map_ref {s_axi} [ipx::get_bus_interfaces s_axi -of_objects [ipx::current_core]]
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ipx::add_address_block {axi_lite} [ipx::get_memory_maps s_axi -of_objects [ipx::current_core]]
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set_property range {65536} [ipx::get_address_blocks axi_lite \
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-of_objects [ipx::get_memory_maps s_axi -of_objects [ipx::current_core]]]
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ipx::add_bus_parameter ASSOCIATED_BUSIF [ipx::get_bus_interfaces s_axi_aclk \
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-of_objects [ipx::current_core]]
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set_property value s_axi [ipx::get_bus_parameters ASSOCIATED_BUSIF \
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-of_objects [ipx::get_bus_interfaces s_axi_aclk \
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-of_objects [ipx::current_core]]]
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ipx::save_core
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}
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## ###############################################################################################
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## ###############################################################################################
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||||||
|
## interface related stuff
|
||||||
|
|
||||||
proc adi_if_define {name} {
|
proc adi_if_define {name} {
|
||||||
|
|
||||||
ipx::create_abstraction_definition ADI user ${name}_rtl 1.0
|
ipx::create_abstraction_definition ADI user ${name}_rtl 1.0
|
||||||
|
|
@ -322,3 +331,5 @@ proc adi_if_infer_bus {if_name mode name maps} {
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
## ###############################################################################################
|
||||||
|
## ###############################################################################################
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue