fmcomms2_zc706: TDD integration, initial commit.

projects/fmcomms2/common/fmcomms2_bd.tcl

@@ -15,6 +15,9 @@ create_bd_port -dir O tx_frame_out_n
 create_bd_port -dir O -from 5 -to 0 tx_data_out_p
 create_bd_port -dir O -from 5 -to 0 tx_data_out_n
 
+create_bd_port -dir O axi_ad9361_enable
+create_bd_port -dir O axi_ad9361_txnrx
+
 # ad9361 core
 
 set axi_ad9361 [create_bd_cell -type ip -vlnv analog.com:user:axi_ad9361:1.0 axi_ad9361]
@@ -71,6 +74,8 @@ ad_connect  tx_frame_out_p axi_ad9361/tx_frame_out_p
 ad_connect  tx_frame_out_n axi_ad9361/tx_frame_out_n
 ad_connect  tx_data_out_p axi_ad9361/tx_data_out_p
 ad_connect  tx_data_out_n axi_ad9361/tx_data_out_n
+ad_connect  axi_ad9361/tdd_enable axi_ad9361_enable
+ad_connect  axi_ad9361/tdd_txnrx axi_ad9361_txnrx
 ad_connect  axi_ad9361_clk util_adc_pack/clk
 ad_connect  axi_ad9361/adc_valid_i0 util_adc_pack/chan_valid_0
 ad_connect  axi_ad9361/adc_valid_q0 util_adc_pack/chan_valid_1
@@ -124,6 +129,28 @@ ad_mem_hp2_interconnect sys_cpu_clk axi_ad9361_dac_dma/m_src_axi
 ad_cpu_interrupt ps-13 mb-12 axi_ad9361_adc_dma/irq
 ad_cpu_interrupt ps-12 mb-13 axi_ad9361_dac_dma/irq
 
+set ila_tdd [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:5.0 ila_tdd]
+set_property -dict [list CONFIG.C_MONITOR_TYPE {Native}] $ila_tdd
+set_property -dict [list CONFIG.C_NUM_OF_PROBES {7}] $ila_tdd
+set_property -dict [list CONFIG.C_TRIGIN_EN {false}] $ila_tdd
+set_property -dict [list CONFIG.C_EN_STRG_QUAL {1}] $ila_tdd
+set_property -dict [list CONFIG.C_PROBE0_WIDTH {1}] $ila_tdd
+set_property -dict [list CONFIG.C_PROBE1_WIDTH {1}] $ila_tdd
+set_property -dict [list CONFIG.C_PROBE2_WIDTH {35}] $ila_tdd
+set_property -dict [list CONFIG.C_PROBE3_WIDTH {1}] $ila_tdd
+set_property -dict [list CONFIG.C_PROBE4_WIDTH {1}] $ila_tdd
+set_property -dict [list CONFIG.C_PROBE5_WIDTH {1}] $ila_tdd
+set_property -dict [list CONFIG.C_PROBE6_WIDTH {64}] $ila_tdd
+
+ad_connect  axi_ad9361_clk ila_tdd/clk
+ad_connect  axi_ad9361/tdd_enable ila_tdd/probe0
+ad_connect  axi_ad9361/tdd_txnrx  ila_tdd/probe1
+ad_connect  axi_ad9361/tdd_dbg  ila_tdd/probe2
+ad_connect  util_dac_unpack/fifo_valid ila_tdd/probe3
+ad_connect  util_dac_unpack/dma_rd ila_tdd/probe4
+ad_connect  axi_ad9361/dac_dunf ila_tdd/probe5
+ad_connect  util_dac_unpack/dma_data ila_tdd/probe6
+
 # ila (adc)
 
 set ila_adc [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:5.0 ila_adc]

projects/fmcomms2/zc706/system_bd.tcl

@@ -2,5 +2,4 @@
 source $ad_hdl_dir/projects/common/zc706/zc706_system_bd.tcl
 source $ad_hdl_dir/projects/common/xilinx/sys_wfifo.tcl
 source ../common/fmcomms2_bd.tcl
-source ../common/prcfg_bd.tcl
 

projects/fmcomms2/zc706/system_constr.xdc

@@ -50,8 +50,10 @@ set_property  -dict {PACKAGE_PIN  AG29  IOSTANDARD LVCMOS25} [get_ports gpio_ctl
 set_property  -dict {PACKAGE_PIN  AH26  IOSTANDARD LVCMOS25} [get_ports gpio_en_agc]                      ; ## H22  FMC_LPC_LA19_P
 set_property  -dict {PACKAGE_PIN  AH27  IOSTANDARD LVCMOS25} [get_ports gpio_sync]                        ; ## H23  FMC_LPC_LA19_N
 set_property  -dict {PACKAGE_PIN  AD25  IOSTANDARD LVCMOS25} [get_ports gpio_resetb]                      ; ## H31  FMC_LPC_LA28_P
-set_property  -dict {PACKAGE_PIN  AE18  IOSTANDARD LVCMOS25} [get_ports gpio_enable]                      ; ## G18  FMC_LPC_LA16_P
+set_property  -dict {PACKAGE_PIN  AE18  IOSTANDARD LVCMOS25} [get_ports ad9361_enable]                    ; ## G18  FMC_LPC_LA16_P
-set_property  -dict {PACKAGE_PIN  AE17  IOSTANDARD LVCMOS25} [get_ports gpio_txnrx]                       ; ## G19  FMC_LPC_LA16_N
+set_property  -dict {PACKAGE_PIN  AE17  IOSTANDARD LVCMOS25} [get_ports ad9361_txnrx]                     ; ## G19  FMC_LPC_LA16_N
+
+set_property  -dict {IOB TRUE} [get_ports {ad9361_enable ad9361_txnrx}]
 
 set_property  -dict {PACKAGE_PIN  AJ30  IOSTANDARD LVCMOS25  PULLTYPE PULLUP} [get_ports spi_csn]         ; ## D26  FMC_LPC_LA26_P
 set_property  -dict {PACKAGE_PIN  AK30  IOSTANDARD LVCMOS25} [get_ports spi_clk]                          ; ## D27  FMC_LPC_LA26_N

projects/fmcomms2/zc706/system_top.v

@@ -90,14 +90,15 @@ module system_top (
   tx_data_out_p,
   tx_data_out_n,
 
-  gpio_txnrx,
-  gpio_enable,
   gpio_resetb,
   gpio_sync,
   gpio_en_agc,
   gpio_ctl,
   gpio_status,
 
+  ad9361_enable,
+  ad9361_txnrx,
+
   spi_csn,
   spi_clk,
   spi_mosi,
@@ -157,8 +158,6 @@ module system_top (
   output  [ 5:0]  tx_data_out_p;
   output  [ 5:0]  tx_data_out_n;
 
-  inout           gpio_txnrx;
-  inout           gpio_enable;
   inout           gpio_resetb;
   inout           gpio_sync;
   inout           gpio_en_agc;
@@ -175,6 +174,9 @@ module system_top (
   output          spi_udc_sclk;
   output          spi_udc_data;
 
+  output          ad9361_enable;
+  output          ad9361_txnrx;
+
   // internal signals
 
   wire    [63:0]  gpio_i;
@@ -202,15 +204,16 @@ module system_top (
   wire    [31:0]  dac_gpio_input;
   wire    [31:0]  dac_gpio_output;
 
+  wire            ad9361_enable_s;
+  wire            ad9361_txnrx_s;
+
   // instantiations
 
-  ad_iobuf #(.DATA_WIDTH(17)) i_iobuf (
+  ad_iobuf #(.DATA_WIDTH(15)) i_iobuf (
-    .dt (gpio_t[48:32]),
+    .dt (gpio_t[46:32]),
-    .di (gpio_o[48:32]),
+    .di (gpio_o[46:32]),
-    .do (gpio_i[48:32]),
+    .do (gpio_i[46:32]),
-    .dio({  gpio_txnrx,
+    .dio({  gpio_resetb,
-            gpio_enable,
-            gpio_resetb,
             gpio_sync,
             gpio_en_agc,
             gpio_ctl,
@@ -222,29 +225,6 @@ module system_top (
     .do (gpio_i[14:0]),
     .dio (gpio_bd));
 
-  prcfg i_prcfg (
-    .clk (clk),
-    .adc_gpio_input (adc_gpio_input),
-    .adc_gpio_output (adc_gpio_output),
-    .dac_gpio_input (dac_gpio_input),
-    .dac_gpio_output (dac_gpio_output),
-    .dma_dac_en (dma_dac_en),
-    .dma_dac_dunf (dma_dac_dunf),
-    .dma_dac_ddata (dma_dac_ddata),
-    .dma_dac_dvalid (dma_dac_dvalid),
-    .core_dac_en (core_dac_en),
-    .core_dac_dunf (core_dac_dunf),
-    .core_dac_ddata (core_dac_ddata),
-    .core_dac_dvalid (core_dac_dvalid),
-    .core_adc_dwr (core_adc_dwr),
-    .core_adc_dsync (core_adc_dsync),
-    .core_adc_ddata (core_adc_ddata),
-    .core_adc_ovf (core_adc_ovf),
-    .dma_adc_dwr (dma_adc_dwr),
-    .dma_adc_dsync (dma_adc_dsync),
-    .dma_adc_ddata (dma_adc_ddata),
-    .dma_adc_ovf (dma_adc_ovf));
-
   system_wrapper i_system_wrapper (
     .ddr_addr (ddr_addr),
     .ddr_ba (ddr_ba),
@@ -320,27 +300,9 @@ module system_top (
     .tx_data_out_p (tx_data_out_p),
     .tx_frame_out_n (tx_frame_out_n),
     .tx_frame_out_p (tx_frame_out_p),
-    .clk (clk),
+    .axi_ad9361_enable(ad9361_enable),
-    .dma_dac_en (dma_dac_en),
+    .axi_ad9361_txnrx(ad9361_txnrx));
-    .dma_dac_dunf (dma_dac_dunf),
+
-    .dma_dac_ddata (dma_dac_ddata),
-    .dma_dac_dvalid (dma_dac_dvalid),
-    .core_dac_en (core_dac_en),
-    .core_dac_dunf (core_dac_dunf),
-    .core_dac_ddata (core_dac_ddata),
-    .core_dac_dvalid (core_dac_dvalid),
-    .core_adc_dwr (core_adc_dwr),
-    .core_adc_dsync (core_adc_dsync),
-    .core_adc_ddata (core_adc_ddata),
-    .core_adc_ovf (core_adc_ovf),
-    .dma_adc_dwr (dma_adc_dwr),
-    .dma_adc_dsync (dma_adc_dsync),
-    .dma_adc_ddata (dma_adc_ddata),
-    .dma_adc_ovf (dma_adc_ovf),
-    .up_dac_gpio_in (dac_gpio_output),
-    .up_adc_gpio_in (adc_gpio_output),
-    .up_dac_gpio_out (dac_gpio_input),
-    .up_adc_gpio_out (adc_gpio_input));
 endmodule
 
 // ***************************************************************************