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altera- warnings about init values

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Rejeesh Kutty 2017-01-30 10:01:13 -05:00
parent 97d72d2f65
commit db924953bb
2 changed files with 4 additions and 4 deletions
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4
library/altera/avl_adxcfg/avl_adxcfg.v
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@ -80,8 +80,8 @@ module avl_adxcfg (
reg [ 9:0] rcfg_address_int = 'd0;
reg [31:0] rcfg_writedata_int = 'd0;
reg [31:0] rcfg_readdata_int = 'd0;
reg rcfg_waitrequest_int_0 = 'd0;
reg rcfg_waitrequest_int_1 = 'd0;
reg rcfg_waitrequest_int_0 = 'd1;
reg rcfg_waitrequest_int_1 = 'd1;
// internal signals

4
library/common/up_dac_common.v
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@ -104,8 +104,8 @@ module up_dac_common #(
// internal registers
reg up_core_preset = 'd0;
reg up_mmcm_preset = 'd0;
reg up_core_preset = 'd1;
reg up_mmcm_preset = 'd1;
reg up_wack_int = 'd0;
reg [31:0] up_scratch = 'd0;
reg up_mmcm_resetn = 'd0;