a10gx: updates--
parent
bdc3f3d807
commit
dc0eea5f0f
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@ -2,13 +2,13 @@
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load_package flow
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source ../../scripts/adi_env.tcl
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project_new fmcjesdadc1_a5gt -overwrite
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project_new daq2_a10gx -overwrite
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source $ad_hdl_dir/projects/common/a5gt/a5gt_system_assign.tcl
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source $ad_hdl_dir/projects/common/a10gx/a10gx_system_assign.tcl
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set_global_assignment -name VERILOG_FILE $ad_hdl_dir/library/common/altera/ad_jesd_align.v
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set_global_assignment -name VERILOG_FILE $ad_hdl_dir/library/common/altera/ad_xcvr_rx_rst.v
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set_global_assignment -name VERILOG_FILE ../common/fmcjesdadc1_spi.v
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set_global_assignment -name VERILOG_FILE ../common/daq2_spi.v
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# reference clock
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