diff --git a/projects/pzsdr/ccfmc/Makefile b/projects/pzsdr/ccfmc/Makefile index 3d51c29c6..09dac0fe2 100644 --- a/projects/pzsdr/ccfmc/Makefile +++ b/projects/pzsdr/ccfmc/Makefile @@ -27,10 +27,9 @@ M_DEPS += ../../../library/axi_dmac/axi_dmac.xpr M_DEPS += ../../../library/axi_gpreg/axi_gpreg.xpr M_DEPS += ../../../library/axi_hdmi_tx/axi_hdmi_tx.xpr M_DEPS += ../../../library/axi_i2s_adi/axi_i2s_adi.xpr -M_DEPS += ../../../library/axi_jesd_gt/axi_jesd_gt.xpr M_DEPS += ../../../library/axi_spdif_tx/axi_spdif_tx.xpr +M_DEPS += ../../../library/xilinx/axi_xcvrlb/axi_xcvrlb.xpr M_DEPS += ../../../library/util_cpack/util_cpack.xpr -M_DEPS += ../../../library/util_gtlb/util_gtlb.xpr M_DEPS += ../../../library/util_tdd_sync/util_tdd_sync.xpr M_DEPS += ../../../library/util_upack/util_upack.xpr M_DEPS += ../../../library/util_wfifo/util_wfifo.xpr @@ -68,10 +67,9 @@ clean-all:clean make -C ../../../library/axi_gpreg clean make -C ../../../library/axi_hdmi_tx clean make -C ../../../library/axi_i2s_adi clean - make -C ../../../library/axi_jesd_gt clean make -C ../../../library/axi_spdif_tx clean + make -C ../../../library/xilinx/axi_xcvrlb clean make -C ../../../library/util_cpack clean - make -C ../../../library/util_gtlb clean make -C ../../../library/util_tdd_sync clean make -C ../../../library/util_upack clean make -C ../../../library/util_wfifo clean @@ -89,10 +87,9 @@ lib: make -C ../../../library/axi_gpreg make -C ../../../library/axi_hdmi_tx make -C ../../../library/axi_i2s_adi - make -C ../../../library/axi_jesd_gt make -C ../../../library/axi_spdif_tx + make -C ../../../library/xilinx/axi_xcvrlb make -C ../../../library/util_cpack - make -C ../../../library/util_gtlb make -C ../../../library/util_tdd_sync make -C ../../../library/util_upack make -C ../../../library/util_wfifo diff --git a/projects/pzsdr/ccfmc/system_constr.xdc b/projects/pzsdr/ccfmc/system_constr.xdc index 8ddea307b..eb0702fb3 100644 --- a/projects/pzsdr/ccfmc/system_constr.xdc +++ b/projects/pzsdr/ccfmc/system_constr.xdc @@ -1,77 +1,77 @@ # rf-board -set_property -dict {PACKAGE_PIN K10 IOSTANDARD LVCMOS18} [get_ports gpio_rfpwr_enable] ; ## IO_25_VRP_34 -set_property -dict {PACKAGE_PIN AA20 IOSTANDARD LVCMOS25} [get_ports gpio_rf0] ; ## IO_L20_13_JX2_P -set_property -dict {PACKAGE_PIN AB20 IOSTANDARD LVCMOS25} [get_ports gpio_rf1] ; ## IO_L20_13_JX2_N -set_property -dict {PACKAGE_PIN AA14 IOSTANDARD LVCMOS25} [get_ports gpio_rf2] ; ## IO_L22_12_JX2_N -set_property -dict {PACKAGE_PIN J9 IOSTANDARD LVCMOS18} [get_ports gpio_rf3] ; ## IO_L05_34_JX4_N +set_property -dict {PACKAGE_PIN K10 IOSTANDARD LVCMOS18} [get_ports gpio_rfpwr_enable] ; ## IO_25_VRP_34 +set_property -dict {PACKAGE_PIN AA20 IOSTANDARD LVCMOS25} [get_ports gpio_rf0] ; ## IO_L20_13_JX2_P +set_property -dict {PACKAGE_PIN AB20 IOSTANDARD LVCMOS25} [get_ports gpio_rf1] ; ## IO_L20_13_JX2_N +set_property -dict {PACKAGE_PIN AA14 IOSTANDARD LVCMOS25} [get_ports gpio_rf2] ; ## IO_L22_12_JX2_N +set_property -dict {PACKAGE_PIN J9 IOSTANDARD LVCMOS18} [get_ports gpio_rf3] ; ## IO_L05_34_JX4_N # ethernet-1 -set_property -dict {PACKAGE_PIN B10 IOSTANDARD LVCMOS18} [get_ports eth1_mdc] ; ## IO_L16P_T2_34 -set_property -dict {PACKAGE_PIN A10 IOSTANDARD LVCMOS18} [get_ports eth1_mdio] ; ## IO_L16N_T2_34 -set_property -dict {PACKAGE_PIN G7 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_rxclk] ; ## IO_L12P_T1_MRCC_34 -set_property -dict {PACKAGE_PIN F7 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_rxctl] ; ## IO_L12N_T1_MRCC_34 -set_property -dict {PACKAGE_PIN E6 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_rxdata[0]] ; ## IO_L10P_T1_34 -set_property -dict {PACKAGE_PIN D5 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_rxdata[1]] ; ## IO_L10N_T1_34 -set_property -dict {PACKAGE_PIN F8 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_rxdata[2]] ; ## IO_L11P_T1_SRCC_34 -set_property -dict {PACKAGE_PIN E7 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_rxdata[3]] ; ## IO_L11N_T1_SRCC_34 -set_property -dict {PACKAGE_PIN C8 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_txclk] ; ## IO_L13P_T2_MRCC_34 -set_property -dict {PACKAGE_PIN C7 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_txctl] ; ## IO_L13N_T2_MRCC_34 -set_property -dict {PACKAGE_PIN D6 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_txdata[0]] ; ## IO_L14P_T2_SRCC_34 -set_property -dict {PACKAGE_PIN C6 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_txdata[1]] ; ## IO_L14N_T2_SRCC_34 -set_property -dict {PACKAGE_PIN C9 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_txdata[2]] ; ## IO_L15P_T2_DQS_34 -set_property -dict {PACKAGE_PIN B9 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_txdata[3]] ; ## IO_L15N_T2_DQS_34 +set_property -dict {PACKAGE_PIN B10 IOSTANDARD LVCMOS18} [get_ports eth1_mdc] ; ## IO_L16P_T2_34 +set_property -dict {PACKAGE_PIN A10 IOSTANDARD LVCMOS18} [get_ports eth1_mdio] ; ## IO_L16N_T2_34 +set_property -dict {PACKAGE_PIN G7 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_rxclk] ; ## IO_L12P_T1_MRCC_34 +set_property -dict {PACKAGE_PIN F7 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_rxctl] ; ## IO_L12N_T1_MRCC_34 +set_property -dict {PACKAGE_PIN E6 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_rxdata[0]] ; ## IO_L10P_T1_34 +set_property -dict {PACKAGE_PIN D5 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_rxdata[1]] ; ## IO_L10N_T1_34 +set_property -dict {PACKAGE_PIN F8 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_rxdata[2]] ; ## IO_L11P_T1_SRCC_34 +set_property -dict {PACKAGE_PIN E7 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_rxdata[3]] ; ## IO_L11N_T1_SRCC_34 +set_property -dict {PACKAGE_PIN C8 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_txclk] ; ## IO_L13P_T2_MRCC_34 +set_property -dict {PACKAGE_PIN C7 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_txctl] ; ## IO_L13N_T2_MRCC_34 +set_property -dict {PACKAGE_PIN D6 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_txdata[0]] ; ## IO_L14P_T2_SRCC_34 +set_property -dict {PACKAGE_PIN C6 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_txdata[1]] ; ## IO_L14N_T2_SRCC_34 +set_property -dict {PACKAGE_PIN C9 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_txdata[2]] ; ## IO_L15P_T2_DQS_34 +set_property -dict {PACKAGE_PIN B9 IOSTANDARD LVCMOS18} [get_ports eth1_rgmii_txdata[3]] ; ## IO_L15N_T2_DQS_34 # hdmi -set_property -dict {PACKAGE_PIN L3 IOSTANDARD LVCMOS18} [get_ports hdmi_out_clk] ; ## IO_L11P_T1_SRCC_33 -set_property -dict {PACKAGE_PIN D4 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_vsync] ; ## IO_L2P_T0_33 -set_property -dict {PACKAGE_PIN D3 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_hsync] ; ## IO_L2N_T0_33 -set_property -dict {PACKAGE_PIN K3 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data_e] ; ## IO_L11N_T1_SRCC_33 -set_property -dict {PACKAGE_PIN G2 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[0]] ; ## IO_L3P_T0_DQS_33 -set_property -dict {PACKAGE_PIN F2 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[1]] ; ## IO_L3N_T0_DQS_33 -set_property -dict {PACKAGE_PIN D1 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[2]] ; ## IO_L4P_T0_33 -set_property -dict {PACKAGE_PIN C1 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[3]] ; ## IO_L4N_T0_33 -set_property -dict {PACKAGE_PIN E2 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[4]] ; ## IO_L5P_T0_33 -set_property -dict {PACKAGE_PIN E1 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[5]] ; ## IO_L5N_T0_33 -set_property -dict {PACKAGE_PIN F3 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[6]] ; ## IO_L6P_T0_33 -set_property -dict {PACKAGE_PIN E3 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[7]] ; ## IO_L6N_T0_VREF_33 -set_property -dict {PACKAGE_PIN J1 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[8]] ; ## IO_L7P_T1_33 -set_property -dict {PACKAGE_PIN H1 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[9]] ; ## IO_L7N_T1_33 -set_property -dict {PACKAGE_PIN H4 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[10]] ; ## IO_L8P_T1_33 -set_property -dict {PACKAGE_PIN H3 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[11]] ; ## IO_L8N_T1_33 -set_property -dict {PACKAGE_PIN K2 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[12]] ; ## IO_L9P_T1_DQS_33 -set_property -dict {PACKAGE_PIN K1 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[13]] ; ## IO_L9N_T1_DQS_33 -set_property -dict {PACKAGE_PIN H2 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[14]] ; ## IO_L10P_T1_33 -set_property -dict {PACKAGE_PIN G1 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[15]] ; ## IO_L10N_T1_33 -set_property -dict {PACKAGE_PIN L9 IOSTANDARD LVCMOS18} [get_ports hdmi_pd] ; ## IO_0_VRN_33 -set_property -dict {PACKAGE_PIN N8 IOSTANDARD LVCMOS18} [get_ports hdmi_intn] ; ## IO_25_VRP_33 +set_property -dict {PACKAGE_PIN L3 IOSTANDARD LVCMOS18} [get_ports hdmi_out_clk] ; ## IO_L11P_T1_SRCC_33 +set_property -dict {PACKAGE_PIN D4 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_vsync] ; ## IO_L2P_T0_33 +set_property -dict {PACKAGE_PIN D3 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_hsync] ; ## IO_L2N_T0_33 +set_property -dict {PACKAGE_PIN K3 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data_e] ; ## IO_L11N_T1_SRCC_33 +set_property -dict {PACKAGE_PIN G2 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[0]] ; ## IO_L3P_T0_DQS_33 +set_property -dict {PACKAGE_PIN F2 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[1]] ; ## IO_L3N_T0_DQS_33 +set_property -dict {PACKAGE_PIN D1 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[2]] ; ## IO_L4P_T0_33 +set_property -dict {PACKAGE_PIN C1 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[3]] ; ## IO_L4N_T0_33 +set_property -dict {PACKAGE_PIN E2 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[4]] ; ## IO_L5P_T0_33 +set_property -dict {PACKAGE_PIN E1 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[5]] ; ## IO_L5N_T0_33 +set_property -dict {PACKAGE_PIN F3 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[6]] ; ## IO_L6P_T0_33 +set_property -dict {PACKAGE_PIN E3 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[7]] ; ## IO_L6N_T0_VREF_33 +set_property -dict {PACKAGE_PIN J1 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[8]] ; ## IO_L7P_T1_33 +set_property -dict {PACKAGE_PIN H1 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[9]] ; ## IO_L7N_T1_33 +set_property -dict {PACKAGE_PIN H4 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[10]] ; ## IO_L8P_T1_33 +set_property -dict {PACKAGE_PIN H3 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[11]] ; ## IO_L8N_T1_33 +set_property -dict {PACKAGE_PIN K2 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[12]] ; ## IO_L9P_T1_DQS_33 +set_property -dict {PACKAGE_PIN K1 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[13]] ; ## IO_L9N_T1_DQS_33 +set_property -dict {PACKAGE_PIN H2 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[14]] ; ## IO_L10P_T1_33 +set_property -dict {PACKAGE_PIN G1 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[15]] ; ## IO_L10N_T1_33 +set_property -dict {PACKAGE_PIN L9 IOSTANDARD LVCMOS18} [get_ports hdmi_pd] ; ## IO_0_VRN_33 +set_property -dict {PACKAGE_PIN N8 IOSTANDARD LVCMOS18} [get_ports hdmi_intn] ; ## IO_25_VRP_33 # hdmi-spdif -set_property -dict {PACKAGE_PIN G4 IOSTANDARD LVCMOS18} [get_ports spdif] ; ## IO_L1P_T0_33 -set_property -dict {PACKAGE_PIN F4 IOSTANDARD LVCMOS18} [get_ports spdif_in] ; ## IO_L1N_T0_33 +set_property -dict {PACKAGE_PIN G4 IOSTANDARD LVCMOS18} [get_ports spdif] ; ## IO_L1P_T0_33 +set_property -dict {PACKAGE_PIN F4 IOSTANDARD LVCMOS18} [get_ports spdif_in] ; ## IO_L1N_T0_33 # audio -set_property -dict {PACKAGE_PIN J8 IOSTANDARD LVCMOS18} [get_ports i2s_mclk] ; ## IO_L6P_T0_34 -set_property -dict {PACKAGE_PIN H8 IOSTANDARD LVCMOS18} [get_ports i2s_bclk] ; ## IO_L6N_T0_VREF_34 -set_property -dict {PACKAGE_PIN F5 IOSTANDARD LVCMOS18} [get_ports i2s_lrclk] ; ## IO_L7P_T1_34 -set_property -dict {PACKAGE_PIN E5 IOSTANDARD LVCMOS18} [get_ports i2s_sdata_out] ; ## IO_L7N_T1_34 -set_property -dict {PACKAGE_PIN D9 IOSTANDARD LVCMOS18} [get_ports i2s_sdata_in] ; ## IO_L8P_T1_34 +set_property -dict {PACKAGE_PIN J8 IOSTANDARD LVCMOS18} [get_ports i2s_mclk] ; ## IO_L6P_T0_34 +set_property -dict {PACKAGE_PIN H8 IOSTANDARD LVCMOS18} [get_ports i2s_bclk] ; ## IO_L6N_T0_VREF_34 +set_property -dict {PACKAGE_PIN F5 IOSTANDARD LVCMOS18} [get_ports i2s_lrclk] ; ## IO_L7P_T1_34 +set_property -dict {PACKAGE_PIN E5 IOSTANDARD LVCMOS18} [get_ports i2s_sdata_out] ; ## IO_L7N_T1_34 +set_property -dict {PACKAGE_PIN D9 IOSTANDARD LVCMOS18} [get_ports i2s_sdata_in] ; ## IO_L8P_T1_34 # ad9517 -set_property -dict {PACKAGE_PIN B4 IOSTANDARD LVCMOS18} [get_ports ad9517_csn] ; ## IO_L20N_T3_34 -set_property -dict {PACKAGE_PIN C4 IOSTANDARD LVCMOS18} [get_ports ad9517_clk] ; ## IO_L19P_T3_34 -set_property -dict {PACKAGE_PIN C3 IOSTANDARD LVCMOS18} [get_ports ad9517_mosi] ; ## IO_L19N_T3_VREF_34 -set_property -dict {PACKAGE_PIN B5 IOSTANDARD LVCMOS18} [get_ports ad9517_miso] ; ## IO_L20P_T3_34 -set_property -dict {PACKAGE_PIN B6 IOSTANDARD LVCMOS18} [get_ports ad9517_pdn] ; ## IO_L21P_T3_DQS_34 -set_property -dict {PACKAGE_PIN A5 IOSTANDARD LVCMOS18} [get_ports ad9517_ref_sel] ; ## IO_L21N_T3_DQS_34 -set_property -dict {PACKAGE_PIN A4 IOSTANDARD LVCMOS18} [get_ports ad9517_ld] ; ## IO_L22P_T3_34 -set_property -dict {PACKAGE_PIN A3 IOSTANDARD LVCMOS18} [get_ports ad9517_status] ; ## IO_L22N_T3_34 +set_property -dict {PACKAGE_PIN B4 IOSTANDARD LVCMOS18} [get_ports ad9517_csn] ; ## IO_L20N_T3_34 +set_property -dict {PACKAGE_PIN C4 IOSTANDARD LVCMOS18} [get_ports ad9517_clk] ; ## IO_L19P_T3_34 +set_property -dict {PACKAGE_PIN C3 IOSTANDARD LVCMOS18} [get_ports ad9517_mosi] ; ## IO_L19N_T3_VREF_34 +set_property -dict {PACKAGE_PIN B5 IOSTANDARD LVCMOS18} [get_ports ad9517_miso] ; ## IO_L20P_T3_34 +set_property -dict {PACKAGE_PIN B6 IOSTANDARD LVCMOS18} [get_ports ad9517_pdn] ; ## IO_L21P_T3_DQS_34 +set_property -dict {PACKAGE_PIN A5 IOSTANDARD LVCMOS18} [get_ports ad9517_ref_sel] ; ## IO_L21N_T3_DQS_34 +set_property -dict {PACKAGE_PIN A4 IOSTANDARD LVCMOS18} [get_ports ad9517_ld] ; ## IO_L22P_T3_34 +set_property -dict {PACKAGE_PIN A3 IOSTANDARD LVCMOS18} [get_ports ad9517_status] ; ## IO_L22N_T3_34 # clocks @@ -90,161 +90,158 @@ set_property IODELAY_GROUP gmii2rgmii_iodelay_group\ # fan control/sense -set_property -dict {PACKAGE_PIN B7 IOSTANDARD LVCMOS18} [get_ports fan_pwm] ; ## IO_L18P_T2_34 -set_property -dict {PACKAGE_PIN A7 IOSTANDARD LVCMOS18} [get_ports fan_tach] ; ## IO_L18N_T2_34 +set_property -dict {PACKAGE_PIN B7 IOSTANDARD LVCMOS18} [get_ports fan_pwm] ; ## IO_L18P_T2_34 +set_property -dict {PACKAGE_PIN A7 IOSTANDARD LVCMOS18} [get_ports fan_tach] ; ## IO_L18N_T2_34 # unused io (gpio/gt) -set_property -dict {PACKAGE_PIN AC14 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports clk_0_p] ; ## IO_L13P_T2_MRCC_12 (fmc_clk0_p) -set_property -dict {PACKAGE_PIN AD14 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports clk_0_n] ; ## IO_L13N_T2_MRCC_12 (fmc_clk0_n) -set_property -dict {PACKAGE_PIN AD20 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports clk_1_p] ; ## IO_L13P_T2_MRCC_13 (fmc_clk1_p) -set_property -dict {PACKAGE_PIN AD21 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports clk_1_n] ; ## IO_L13N_T2_MRCC_13 (fmc_clk1_n) +set_property -dict {PACKAGE_PIN AC14 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports clk_0_p] ; ## IO_L13P_T2_MRCC_12 (fmc_clk0_p) +set_property -dict {PACKAGE_PIN AD14 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports clk_0_n] ; ## IO_L13N_T2_MRCC_12 (fmc_clk0_n) +set_property -dict {PACKAGE_PIN AD20 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports clk_1_p] ; ## IO_L13P_T2_MRCC_13 (fmc_clk1_p) +set_property -dict {PACKAGE_PIN AD21 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports clk_1_n] ; ## IO_L13N_T2_MRCC_13 (fmc_clk1_n) -set_property -dict {PACKAGE_PIN W6} [get_ports gt_ref_clk_0_p] ; ## MGTREFCLK0P_111 (fmc_gt_ref_clk_p) -set_property -dict {PACKAGE_PIN W5} [get_ports gt_ref_clk_0_n] ; ## MGTREFCLK0N_111 (fmc_gt_ref_clk_n) -set_property -dict {PACKAGE_PIN AF8} [get_ports gt_tx_0_p] ; ## MGTXTXP0_111 (fmc_gt_tx_p) -set_property -dict {PACKAGE_PIN AF7} [get_ports gt_tx_0_n] ; ## MGTXTXN0_111 (fmc_gt_tx_n) -set_property -dict {PACKAGE_PIN AD8} [get_ports gt_rx_0_p] ; ## MGTXRXP0_111 (fmc_gt_rx_p) -set_property -dict {PACKAGE_PIN AD7} [get_ports gt_rx_0_n] ; ## MGTXRXN0_111 (fmc_gt_rx_n) +set_property -dict {PACKAGE_PIN W6} [get_ports gt_ref_clk_p] ; ## MGTREFCLK0P_111 (fmc_gt_ref_clk_p) +set_property -dict {PACKAGE_PIN W5} [get_ports gt_ref_clk_n] ; ## MGTREFCLK0N_111 (fmc_gt_ref_clk_n) +set_property -dict {PACKAGE_PIN AF8} [get_ports gt_tx_p[0]] ; ## MGTXTXP0_111 (fmc_gt_tx_p) +set_property -dict {PACKAGE_PIN AF7} [get_ports gt_tx_n[0]] ; ## MGTXTXN0_111 (fmc_gt_tx_n) +set_property -dict {PACKAGE_PIN AD8} [get_ports gt_rx_p[0]] ; ## MGTXRXP0_111 (fmc_gt_rx_p) +set_property -dict {PACKAGE_PIN AD7} [get_ports gt_rx_n[0]] ; ## MGTXRXN0_111 (fmc_gt_rx_n) -set_property -dict {PACKAGE_PIN V18 IOSTANDARD LVCMOS25} [get_ports gp_in_0] ; ## IO_25_13 (fmc_prstn) +set_property -dict {PACKAGE_PIN V18 IOSTANDARD LVCMOS25} [get_ports gp_in_0] ; ## IO_25_13 (fmc_prstn) -set_property -dict {PACKAGE_PIN AC13 IOSTANDARD LVCMOS25} [get_ports gp_out[0]] ; ## IO_L12P_T1_MRCC_12 (fmc_la_p[ 0]) -set_property -dict {PACKAGE_PIN AD13 IOSTANDARD LVCMOS25} [get_ports gp_out[1]] ; ## IO_L12N_T1_MRCC_12 (fmc_la_n[ 0]) -set_property -dict {PACKAGE_PIN AC12 IOSTANDARD LVCMOS25} [get_ports gp_out[2]] ; ## IO_L11P_T1_SRCC_12 (fmc_la_p[ 1]) -set_property -dict {PACKAGE_PIN AD11 IOSTANDARD LVCMOS25} [get_ports gp_out[3]] ; ## IO_L11N_T1_SRCC_12 (fmc_la_n[ 1]) -set_property -dict {PACKAGE_PIN Y12 IOSTANDARD LVCMOS25} [get_ports gp_out[4]] ; ## IO_L1P_T0_12 (fmc_la_p[ 2]) -set_property -dict {PACKAGE_PIN Y11 IOSTANDARD LVCMOS25} [get_ports gp_out[5]] ; ## IO_L1N_T0_12 (fmc_la_n[ 2]) -set_property -dict {PACKAGE_PIN AB12 IOSTANDARD LVCMOS25} [get_ports gp_out[6]] ; ## IO_L2P_T0_12 (fmc_la_p[ 3]) -set_property -dict {PACKAGE_PIN AC11 IOSTANDARD LVCMOS25} [get_ports gp_out[7]] ; ## IO_L2N_T0_12 (fmc_la_n[ 3]) -set_property -dict {PACKAGE_PIN Y10 IOSTANDARD LVCMOS25} [get_ports gp_out[8]] ; ## IO_L3P_T0_DQS_12 (fmc_la_p[ 4]) -set_property -dict {PACKAGE_PIN AA10 IOSTANDARD LVCMOS25} [get_ports gp_out[9]] ; ## IO_L3N_T0_DQS_12 (fmc_la_n[ 4]) -set_property -dict {PACKAGE_PIN AB11 IOSTANDARD LVCMOS25} [get_ports gp_out[10]] ; ## IO_L4P_T0_12 (fmc_la_p[ 5]) -set_property -dict {PACKAGE_PIN AB10 IOSTANDARD LVCMOS25} [get_ports gp_out[11]] ; ## IO_L4N_T0_12 (fmc_la_n[ 5]) -set_property -dict {PACKAGE_PIN W13 IOSTANDARD LVCMOS25} [get_ports gp_out[12]] ; ## IO_L5P_T0_12 (fmc_la_p[ 6]) -set_property -dict {PACKAGE_PIN Y13 IOSTANDARD LVCMOS25} [get_ports gp_out[13]] ; ## IO_L5N_T0_12 (fmc_la_n[ 6]) -set_property -dict {PACKAGE_PIN AA13 IOSTANDARD LVCMOS25} [get_ports gp_out[14]] ; ## IO_L6P_T0_12 (fmc_la_p[ 7]) -set_property -dict {PACKAGE_PIN AA12 IOSTANDARD LVCMOS25} [get_ports gp_out[15]] ; ## IO_L6N_T0_VREF_12 (fmc_la_n[ 7]) -set_property -dict {PACKAGE_PIN AE10 IOSTANDARD LVCMOS25} [get_ports gp_out[16]] ; ## IO_L7P_T1_12 (fmc_la_p[ 8]) -set_property -dict {PACKAGE_PIN AD10 IOSTANDARD LVCMOS25} [get_ports gp_out[17]] ; ## IO_L7N_T1_12 (fmc_la_n[ 8]) -set_property -dict {PACKAGE_PIN AE12 IOSTANDARD LVCMOS25} [get_ports gp_out[18]] ; ## IO_L8P_T1_12 (fmc_la_p[ 9]) -set_property -dict {PACKAGE_PIN AF12 IOSTANDARD LVCMOS25} [get_ports gp_out[19]] ; ## IO_L8N_T1_12 (fmc_la_n[ 9]) -set_property -dict {PACKAGE_PIN AE11 IOSTANDARD LVCMOS25} [get_ports gp_out[20]] ; ## IO_L9P_T1_DQS_12 (fmc_la_p[10]) -set_property -dict {PACKAGE_PIN AF10 IOSTANDARD LVCMOS25} [get_ports gp_out[21]] ; ## IO_L9N_T1_DQS_12 (fmc_la_n[10]) -set_property -dict {PACKAGE_PIN AE13 IOSTANDARD LVCMOS25} [get_ports gp_out[22]] ; ## IO_L10P_T1_12 (fmc_la_p[11]) -set_property -dict {PACKAGE_PIN AF13 IOSTANDARD LVCMOS25} [get_ports gp_out[23]] ; ## IO_L10N_T1_12 (fmc_la_n[11]) -set_property -dict {PACKAGE_PIN AB15 IOSTANDARD LVCMOS25} [get_ports gp_out[24]] ; ## IO_L14P_T2_SRCC_12 (fmc_la_p[12]) -set_property -dict {PACKAGE_PIN AB14 IOSTANDARD LVCMOS25} [get_ports gp_out[25]] ; ## IO_L14N_T2_SRCC_12 (fmc_la_n[12]) -set_property -dict {PACKAGE_PIN AD16 IOSTANDARD LVCMOS25} [get_ports gp_out[26]] ; ## IO_L15P_T2_DQS_12 (fmc_la_p[13]) -set_property -dict {PACKAGE_PIN AD15 IOSTANDARD LVCMOS25} [get_ports gp_out[27]] ; ## IO_L15N_T2_DQS_12 (fmc_la_n[13]) -set_property -dict {PACKAGE_PIN AF15 IOSTANDARD LVCMOS25} [get_ports gp_out[28]] ; ## IO_L16P_T2_12 (fmc_la_p[14]) -set_property -dict {PACKAGE_PIN AF14 IOSTANDARD LVCMOS25} [get_ports gp_out[29]] ; ## IO_L16N_T2_12 (fmc_la_n[14]) -set_property -dict {PACKAGE_PIN AE16 IOSTANDARD LVCMOS25} [get_ports gp_out[30]] ; ## IO_L17P_T2_12 (fmc_la_p[15]) -set_property -dict {PACKAGE_PIN AE15 IOSTANDARD LVCMOS25} [get_ports gp_out[31]] ; ## IO_L17N_T2_12 (fmc_la_n[15]) -set_property -dict {PACKAGE_PIN AE17 IOSTANDARD LVCMOS25} [get_ports gp_out[32]] ; ## IO_L18P_T2_12 (fmc_la_p[16]) -set_property -dict {PACKAGE_PIN AF17 IOSTANDARD LVCMOS25} [get_ports gp_out[33]] ; ## IO_L18N_T2_12 (fmc_la_n[16]) +set_property -dict {PACKAGE_PIN AC13 IOSTANDARD LVCMOS25} [get_ports gp_out[0]] ; ## IO_L12P_T1_MRCC_12 (fmc_la_p[ 0]) +set_property -dict {PACKAGE_PIN AD13 IOSTANDARD LVCMOS25} [get_ports gp_out[1]] ; ## IO_L12N_T1_MRCC_12 (fmc_la_n[ 0]) +set_property -dict {PACKAGE_PIN AC12 IOSTANDARD LVCMOS25} [get_ports gp_out[2]] ; ## IO_L11P_T1_SRCC_12 (fmc_la_p[ 1]) +set_property -dict {PACKAGE_PIN AD11 IOSTANDARD LVCMOS25} [get_ports gp_out[3]] ; ## IO_L11N_T1_SRCC_12 (fmc_la_n[ 1]) +set_property -dict {PACKAGE_PIN Y12 IOSTANDARD LVCMOS25} [get_ports gp_out[4]] ; ## IO_L1P_T0_12 (fmc_la_p[ 2]) +set_property -dict {PACKAGE_PIN Y11 IOSTANDARD LVCMOS25} [get_ports gp_out[5]] ; ## IO_L1N_T0_12 (fmc_la_n[ 2]) +set_property -dict {PACKAGE_PIN AB12 IOSTANDARD LVCMOS25} [get_ports gp_out[6]] ; ## IO_L2P_T0_12 (fmc_la_p[ 3]) +set_property -dict {PACKAGE_PIN AC11 IOSTANDARD LVCMOS25} [get_ports gp_out[7]] ; ## IO_L2N_T0_12 (fmc_la_n[ 3]) +set_property -dict {PACKAGE_PIN Y10 IOSTANDARD LVCMOS25} [get_ports gp_out[8]] ; ## IO_L3P_T0_DQS_12 (fmc_la_p[ 4]) +set_property -dict {PACKAGE_PIN AA10 IOSTANDARD LVCMOS25} [get_ports gp_out[9]] ; ## IO_L3N_T0_DQS_12 (fmc_la_n[ 4]) +set_property -dict {PACKAGE_PIN AB11 IOSTANDARD LVCMOS25} [get_ports gp_out[10]] ; ## IO_L4P_T0_12 (fmc_la_p[ 5]) +set_property -dict {PACKAGE_PIN AB10 IOSTANDARD LVCMOS25} [get_ports gp_out[11]] ; ## IO_L4N_T0_12 (fmc_la_n[ 5]) +set_property -dict {PACKAGE_PIN W13 IOSTANDARD LVCMOS25} [get_ports gp_out[12]] ; ## IO_L5P_T0_12 (fmc_la_p[ 6]) +set_property -dict {PACKAGE_PIN Y13 IOSTANDARD LVCMOS25} [get_ports gp_out[13]] ; ## IO_L5N_T0_12 (fmc_la_n[ 6]) +set_property -dict {PACKAGE_PIN AA13 IOSTANDARD LVCMOS25} [get_ports gp_out[14]] ; ## IO_L6P_T0_12 (fmc_la_p[ 7]) +set_property -dict {PACKAGE_PIN AA12 IOSTANDARD LVCMOS25} [get_ports gp_out[15]] ; ## IO_L6N_T0_VREF_12 (fmc_la_n[ 7]) +set_property -dict {PACKAGE_PIN AE10 IOSTANDARD LVCMOS25} [get_ports gp_out[16]] ; ## IO_L7P_T1_12 (fmc_la_p[ 8]) +set_property -dict {PACKAGE_PIN AD10 IOSTANDARD LVCMOS25} [get_ports gp_out[17]] ; ## IO_L7N_T1_12 (fmc_la_n[ 8]) +set_property -dict {PACKAGE_PIN AE12 IOSTANDARD LVCMOS25} [get_ports gp_out[18]] ; ## IO_L8P_T1_12 (fmc_la_p[ 9]) +set_property -dict {PACKAGE_PIN AF12 IOSTANDARD LVCMOS25} [get_ports gp_out[19]] ; ## IO_L8N_T1_12 (fmc_la_n[ 9]) +set_property -dict {PACKAGE_PIN AE11 IOSTANDARD LVCMOS25} [get_ports gp_out[20]] ; ## IO_L9P_T1_DQS_12 (fmc_la_p[10]) +set_property -dict {PACKAGE_PIN AF10 IOSTANDARD LVCMOS25} [get_ports gp_out[21]] ; ## IO_L9N_T1_DQS_12 (fmc_la_n[10]) +set_property -dict {PACKAGE_PIN AE13 IOSTANDARD LVCMOS25} [get_ports gp_out[22]] ; ## IO_L10P_T1_12 (fmc_la_p[11]) +set_property -dict {PACKAGE_PIN AF13 IOSTANDARD LVCMOS25} [get_ports gp_out[23]] ; ## IO_L10N_T1_12 (fmc_la_n[11]) +set_property -dict {PACKAGE_PIN AB15 IOSTANDARD LVCMOS25} [get_ports gp_out[24]] ; ## IO_L14P_T2_SRCC_12 (fmc_la_p[12]) +set_property -dict {PACKAGE_PIN AB14 IOSTANDARD LVCMOS25} [get_ports gp_out[25]] ; ## IO_L14N_T2_SRCC_12 (fmc_la_n[12]) +set_property -dict {PACKAGE_PIN AD16 IOSTANDARD LVCMOS25} [get_ports gp_out[26]] ; ## IO_L15P_T2_DQS_12 (fmc_la_p[13]) +set_property -dict {PACKAGE_PIN AD15 IOSTANDARD LVCMOS25} [get_ports gp_out[27]] ; ## IO_L15N_T2_DQS_12 (fmc_la_n[13]) +set_property -dict {PACKAGE_PIN AF15 IOSTANDARD LVCMOS25} [get_ports gp_out[28]] ; ## IO_L16P_T2_12 (fmc_la_p[14]) +set_property -dict {PACKAGE_PIN AF14 IOSTANDARD LVCMOS25} [get_ports gp_out[29]] ; ## IO_L16N_T2_12 (fmc_la_n[14]) +set_property -dict {PACKAGE_PIN AE16 IOSTANDARD LVCMOS25} [get_ports gp_out[30]] ; ## IO_L17P_T2_12 (fmc_la_p[15]) +set_property -dict {PACKAGE_PIN AE15 IOSTANDARD LVCMOS25} [get_ports gp_out[31]] ; ## IO_L17N_T2_12 (fmc_la_n[15]) +set_property -dict {PACKAGE_PIN AE17 IOSTANDARD LVCMOS25} [get_ports gp_out[32]] ; ## IO_L18P_T2_12 (fmc_la_p[16]) +set_property -dict {PACKAGE_PIN AF17 IOSTANDARD LVCMOS25} [get_ports gp_out[33]] ; ## IO_L18N_T2_12 (fmc_la_n[16]) -set_property -dict {PACKAGE_PIN AC23 IOSTANDARD LVCMOS25} [get_ports gp_in[0]] ; ## IO_L12P_T1_MRCC_13 (fmc_la_p[17]) -set_property -dict {PACKAGE_PIN AC24 IOSTANDARD LVCMOS25} [get_ports gp_in[1]] ; ## IO_L12N_T1_MRCC_13 (fmc_la_n[17]) -set_property -dict {PACKAGE_PIN AD23 IOSTANDARD LVCMOS25} [get_ports gp_in[2]] ; ## IO_L11P_T1_SRCC_13 (fmc_la_p[18]) -set_property -dict {PACKAGE_PIN AD24 IOSTANDARD LVCMOS25} [get_ports gp_in[3]] ; ## IO_L11N_T1_SRCC_13 (fmc_la_n[18]) -set_property -dict {PACKAGE_PIN AA25 IOSTANDARD LVCMOS25} [get_ports gp_in[4]] ; ## IO_L1P_T0_13 (fmc_la_p[19]) -set_property -dict {PACKAGE_PIN AB25 IOSTANDARD LVCMOS25} [get_ports gp_in[5]] ; ## IO_L1N_T0_13 (fmc_la_n[19]) -set_property -dict {PACKAGE_PIN AB26 IOSTANDARD LVCMOS25} [get_ports gp_in[6]] ; ## IO_L2P_T0_13 (fmc_la_p[20]) -set_property -dict {PACKAGE_PIN AC26 IOSTANDARD LVCMOS25} [get_ports gp_in[7]] ; ## IO_L2N_T0_13 (fmc_la_n[20]) -set_property -dict {PACKAGE_PIN AE25 IOSTANDARD LVCMOS25} [get_ports gp_in[8]] ; ## IO_L3P_T0_DQS_13 (fmc_la_p[21]) -set_property -dict {PACKAGE_PIN AE26 IOSTANDARD LVCMOS25} [get_ports gp_in[9]] ; ## IO_L3N_T0_DQS_13 (fmc_la_n[21]) -set_property -dict {PACKAGE_PIN AD25 IOSTANDARD LVCMOS25} [get_ports gp_in[10]] ; ## IO_L4P_T0_13 (fmc_la_p[22]) -set_property -dict {PACKAGE_PIN AD26 IOSTANDARD LVCMOS25} [get_ports gp_in[11]] ; ## IO_L4N_T0_13 (fmc_la_n[22]) -set_property -dict {PACKAGE_PIN AA24 IOSTANDARD LVCMOS25} [get_ports gp_in[12]] ; ## IO_L6P_T0_13 (fmc_la_p[23]) -set_property -dict {PACKAGE_PIN AB24 IOSTANDARD LVCMOS25} [get_ports gp_in[13]] ; ## IO_L6N_T0_VREF_13 (fmc_la_n[23]) -set_property -dict {PACKAGE_PIN AE22 IOSTANDARD LVCMOS25} [get_ports gp_in[14]] ; ## IO_L7P_T1_13 (fmc_la_p[24]) -set_property -dict {PACKAGE_PIN AF22 IOSTANDARD LVCMOS25} [get_ports gp_in[15]] ; ## IO_L7N_T1_13 (fmc_la_n[24]) -set_property -dict {PACKAGE_PIN AE23 IOSTANDARD LVCMOS25} [get_ports gp_in[16]] ; ## IO_L8P_T1_13 (fmc_la_p[25]) -set_property -dict {PACKAGE_PIN AF23 IOSTANDARD LVCMOS25} [get_ports gp_in[17]] ; ## IO_L8N_T1_13 (fmc_la_n[25]) -set_property -dict {PACKAGE_PIN AB21 IOSTANDARD LVCMOS25} [get_ports gp_in[18]] ; ## IO_L9P_T1_DQS_13 (fmc_la_p[26]) -set_property -dict {PACKAGE_PIN AB22 IOSTANDARD LVCMOS25} [get_ports gp_in[19]] ; ## IO_L9N_T1_DQS_13 (fmc_la_n[26]) -set_property -dict {PACKAGE_PIN AA22 IOSTANDARD LVCMOS25} [get_ports gp_in[20]] ; ## IO_L10P_T1_13 (fmc_la_p[27]) -set_property -dict {PACKAGE_PIN AA23 IOSTANDARD LVCMOS25} [get_ports gp_in[21]] ; ## IO_L10N_T1_13 (fmc_la_n[27]) -set_property -dict {PACKAGE_PIN AC21 IOSTANDARD LVCMOS25} [get_ports gp_in[22]] ; ## IO_L14P_T2_SRCC_13 (fmc_la_p[28]) -set_property -dict {PACKAGE_PIN AC22 IOSTANDARD LVCMOS25} [get_ports gp_in[23]] ; ## IO_L14N_T2_SRCC_13 (fmc_la_n[28]) -set_property -dict {PACKAGE_PIN AF19 IOSTANDARD LVCMOS25} [get_ports gp_in[24]] ; ## IO_L15P_T2_DQS_13 (fmc_la_p[29]) -set_property -dict {PACKAGE_PIN AF20 IOSTANDARD LVCMOS25} [get_ports gp_in[25]] ; ## IO_L15N_T2_DQS_13 (fmc_la_n[29]) -set_property -dict {PACKAGE_PIN AE20 IOSTANDARD LVCMOS25} [get_ports gp_in[26]] ; ## IO_L16P_T2_13 (fmc_la_p[30]) -set_property -dict {PACKAGE_PIN AE21 IOSTANDARD LVCMOS25} [get_ports gp_in[27]] ; ## IO_L16N_T2_13 (fmc_la_n[30]) -set_property -dict {PACKAGE_PIN AD18 IOSTANDARD LVCMOS25} [get_ports gp_in[28]] ; ## IO_L17P_T2_13 (fmc_la_p[31]) -set_property -dict {PACKAGE_PIN AD19 IOSTANDARD LVCMOS25} [get_ports gp_in[29]] ; ## IO_L17N_T2_13 (fmc_la_n[31]) -set_property -dict {PACKAGE_PIN AE18 IOSTANDARD LVCMOS25} [get_ports gp_in[30]] ; ## IO_L18P_T2_13 (fmc_la_p[32]) -set_property -dict {PACKAGE_PIN AF18 IOSTANDARD LVCMOS25} [get_ports gp_in[31]] ; ## IO_L18N_T2_13 (fmc_la_n[32]) -set_property -dict {PACKAGE_PIN W20 IOSTANDARD LVCMOS25} [get_ports gp_in[32]] ; ## IO_L19P_T3_13 (fmc_la_p[33]) -set_property -dict {PACKAGE_PIN Y20 IOSTANDARD LVCMOS25} [get_ports gp_in[33]] ; ## IO_L19N_T3_VREF_13 (fmc_la_n[33]) +set_property -dict {PACKAGE_PIN AC23 IOSTANDARD LVCMOS25} [get_ports gp_in[0]] ; ## IO_L12P_T1_MRCC_13 (fmc_la_p[17]) +set_property -dict {PACKAGE_PIN AC24 IOSTANDARD LVCMOS25} [get_ports gp_in[1]] ; ## IO_L12N_T1_MRCC_13 (fmc_la_n[17]) +set_property -dict {PACKAGE_PIN AD23 IOSTANDARD LVCMOS25} [get_ports gp_in[2]] ; ## IO_L11P_T1_SRCC_13 (fmc_la_p[18]) +set_property -dict {PACKAGE_PIN AD24 IOSTANDARD LVCMOS25} [get_ports gp_in[3]] ; ## IO_L11N_T1_SRCC_13 (fmc_la_n[18]) +set_property -dict {PACKAGE_PIN AA25 IOSTANDARD LVCMOS25} [get_ports gp_in[4]] ; ## IO_L1P_T0_13 (fmc_la_p[19]) +set_property -dict {PACKAGE_PIN AB25 IOSTANDARD LVCMOS25} [get_ports gp_in[5]] ; ## IO_L1N_T0_13 (fmc_la_n[19]) +set_property -dict {PACKAGE_PIN AB26 IOSTANDARD LVCMOS25} [get_ports gp_in[6]] ; ## IO_L2P_T0_13 (fmc_la_p[20]) +set_property -dict {PACKAGE_PIN AC26 IOSTANDARD LVCMOS25} [get_ports gp_in[7]] ; ## IO_L2N_T0_13 (fmc_la_n[20]) +set_property -dict {PACKAGE_PIN AE25 IOSTANDARD LVCMOS25} [get_ports gp_in[8]] ; ## IO_L3P_T0_DQS_13 (fmc_la_p[21]) +set_property -dict {PACKAGE_PIN AE26 IOSTANDARD LVCMOS25} [get_ports gp_in[9]] ; ## IO_L3N_T0_DQS_13 (fmc_la_n[21]) +set_property -dict {PACKAGE_PIN AD25 IOSTANDARD LVCMOS25} [get_ports gp_in[10]] ; ## IO_L4P_T0_13 (fmc_la_p[22]) +set_property -dict {PACKAGE_PIN AD26 IOSTANDARD LVCMOS25} [get_ports gp_in[11]] ; ## IO_L4N_T0_13 (fmc_la_n[22]) +set_property -dict {PACKAGE_PIN AA24 IOSTANDARD LVCMOS25} [get_ports gp_in[12]] ; ## IO_L6P_T0_13 (fmc_la_p[23]) +set_property -dict {PACKAGE_PIN AB24 IOSTANDARD LVCMOS25} [get_ports gp_in[13]] ; ## IO_L6N_T0_VREF_13 (fmc_la_n[23]) +set_property -dict {PACKAGE_PIN AE22 IOSTANDARD LVCMOS25} [get_ports gp_in[14]] ; ## IO_L7P_T1_13 (fmc_la_p[24]) +set_property -dict {PACKAGE_PIN AF22 IOSTANDARD LVCMOS25} [get_ports gp_in[15]] ; ## IO_L7N_T1_13 (fmc_la_n[24]) +set_property -dict {PACKAGE_PIN AE23 IOSTANDARD LVCMOS25} [get_ports gp_in[16]] ; ## IO_L8P_T1_13 (fmc_la_p[25]) +set_property -dict {PACKAGE_PIN AF23 IOSTANDARD LVCMOS25} [get_ports gp_in[17]] ; ## IO_L8N_T1_13 (fmc_la_n[25]) +set_property -dict {PACKAGE_PIN AB21 IOSTANDARD LVCMOS25} [get_ports gp_in[18]] ; ## IO_L9P_T1_DQS_13 (fmc_la_p[26]) +set_property -dict {PACKAGE_PIN AB22 IOSTANDARD LVCMOS25} [get_ports gp_in[19]] ; ## IO_L9N_T1_DQS_13 (fmc_la_n[26]) +set_property -dict {PACKAGE_PIN AA22 IOSTANDARD LVCMOS25} [get_ports gp_in[20]] ; ## IO_L10P_T1_13 (fmc_la_p[27]) +set_property -dict {PACKAGE_PIN AA23 IOSTANDARD LVCMOS25} [get_ports gp_in[21]] ; ## IO_L10N_T1_13 (fmc_la_n[27]) +set_property -dict {PACKAGE_PIN AC21 IOSTANDARD LVCMOS25} [get_ports gp_in[22]] ; ## IO_L14P_T2_SRCC_13 (fmc_la_p[28]) +set_property -dict {PACKAGE_PIN AC22 IOSTANDARD LVCMOS25} [get_ports gp_in[23]] ; ## IO_L14N_T2_SRCC_13 (fmc_la_n[28]) +set_property -dict {PACKAGE_PIN AF19 IOSTANDARD LVCMOS25} [get_ports gp_in[24]] ; ## IO_L15P_T2_DQS_13 (fmc_la_p[29]) +set_property -dict {PACKAGE_PIN AF20 IOSTANDARD LVCMOS25} [get_ports gp_in[25]] ; ## IO_L15N_T2_DQS_13 (fmc_la_n[29]) +set_property -dict {PACKAGE_PIN AE20 IOSTANDARD LVCMOS25} [get_ports gp_in[26]] ; ## IO_L16P_T2_13 (fmc_la_p[30]) +set_property -dict {PACKAGE_PIN AE21 IOSTANDARD LVCMOS25} [get_ports gp_in[27]] ; ## IO_L16N_T2_13 (fmc_la_n[30]) +set_property -dict {PACKAGE_PIN AD18 IOSTANDARD LVCMOS25} [get_ports gp_in[28]] ; ## IO_L17P_T2_13 (fmc_la_p[31]) +set_property -dict {PACKAGE_PIN AD19 IOSTANDARD LVCMOS25} [get_ports gp_in[29]] ; ## IO_L17N_T2_13 (fmc_la_n[31]) +set_property -dict {PACKAGE_PIN AE18 IOSTANDARD LVCMOS25} [get_ports gp_in[30]] ; ## IO_L18P_T2_13 (fmc_la_p[32]) +set_property -dict {PACKAGE_PIN AF18 IOSTANDARD LVCMOS25} [get_ports gp_in[31]] ; ## IO_L18N_T2_13 (fmc_la_n[32]) +set_property -dict {PACKAGE_PIN W20 IOSTANDARD LVCMOS25} [get_ports gp_in[32]] ; ## IO_L19P_T3_13 (fmc_la_p[33]) +set_property -dict {PACKAGE_PIN Y20 IOSTANDARD LVCMOS25} [get_ports gp_in[33]] ; ## IO_L19N_T3_VREF_13 (fmc_la_n[33]) -set_property -dict {PACKAGE_PIN AC18 IOSTANDARD LVCMOS25} [get_ports gp_out[34]] ; ## IO_L21P_T3_DQS_13 (pmod0[0]) -set_property -dict {PACKAGE_PIN AC19 IOSTANDARD LVCMOS25} [get_ports gp_inout_0] ; ## IO_L21N_T3_DQS_13 (pmod0[1]) -set_property -dict {PACKAGE_PIN AA19 IOSTANDARD LVCMOS25} [get_ports gp_out[35]] ; ## IO_L22P_T3_13 (pmod0[2]) -set_property -dict {PACKAGE_PIN AB19 IOSTANDARD LVCMOS25} [get_ports gp_out[36]] ; ## IO_L22N_T3_13 (pmod0[3]) -set_property -dict {PACKAGE_PIN W18 IOSTANDARD LVCMOS25} [get_ports gp_in[34]] ; ## IO_L23P_T3_13 (pmod0[4]) -set_property -dict {PACKAGE_PIN W19 IOSTANDARD LVCMOS25} [get_ports gp_inout_1] ; ## IO_L23N_T3_13 (pmod0[5]) + (TDD_SYNC) -set_property -dict {PACKAGE_PIN Y18 IOSTANDARD LVCMOS25} [get_ports gp_in[35]] ; ## IO_L24P_T3_13 (pmod0[6]) -set_property -dict {PACKAGE_PIN AA18 IOSTANDARD LVCMOS25} [get_ports gp_in[36]] ; ## IO_L24N_T3_13 (pmod0[7]) +set_property -dict {PACKAGE_PIN AC18 IOSTANDARD LVCMOS25} [get_ports gp_out[34]] ; ## IO_L21P_T3_DQS_13 (pmod0[0]) +set_property -dict {PACKAGE_PIN AC19 IOSTANDARD LVCMOS25} [get_ports gp_in_1] ; ## IO_L21N_T3_DQS_13 (pmod0[1]) +set_property -dict {PACKAGE_PIN AA19 IOSTANDARD LVCMOS25} [get_ports gp_out[35]] ; ## IO_L22P_T3_13 (pmod0[2]) +set_property -dict {PACKAGE_PIN AB19 IOSTANDARD LVCMOS25} [get_ports gp_out[36]] ; ## IO_L22N_T3_13 (pmod0[3]) +set_property -dict {PACKAGE_PIN W18 IOSTANDARD LVCMOS25} [get_ports gp_in[34]] ; ## IO_L23P_T3_13 (pmod0[4]) +set_property -dict {PACKAGE_PIN W19 IOSTANDARD LVCMOS25} [get_ports tdd_sync] ; ## IO_L23N_T3_13 (pmod0[5]) + (TDD_SYNC) +set_property -dict {PACKAGE_PIN Y18 IOSTANDARD LVCMOS25} [get_ports gp_in[35]] ; ## IO_L24P_T3_13 (pmod0[6]) +set_property -dict {PACKAGE_PIN AA18 IOSTANDARD LVCMOS25} [get_ports gp_in[36]] ; ## IO_L24N_T3_13 (pmod0[7]) -set_property -dict {PACKAGE_PIN AA6} [get_ports gt_ref_clk_1_p] ; ## MGTREFCLK1P_111 (ad9517_gt_ref_clk_p) -set_property -dict {PACKAGE_PIN AA5} [get_ports gt_ref_clk_1_n] ; ## MGTREFCLK1N_111 (ad9517_gt_ref_clk_n) -set_property -dict {PACKAGE_PIN AF4} [get_ports gt_tx_1_p] ; ## MGTXTXP1_111 (sfp_gt_tx_p) -set_property -dict {PACKAGE_PIN AF3} [get_ports gt_tx_1_n] ; ## MGTXTXN1_111 (sfp_gt_tx_n) -set_property -dict {PACKAGE_PIN AE6} [get_ports gt_rx_1_p] ; ## MGTXRXP1_111 (sfp_gt_rx_p) -set_property -dict {PACKAGE_PIN AE5} [get_ports gt_rx_1_n] ; ## MGTXRXN1_111 (sfp_gt_rx_n) +set_property -dict {PACKAGE_PIN AA6} [get_ports clk_2_p] ; ## MGTREFCLK1P_111 (ad9517_gt_ref_clk_p) +set_property -dict {PACKAGE_PIN AA5} [get_ports clk_2_n] ; ## MGTREFCLK1N_111 (ad9517_gt_ref_clk_n) +set_property -dict {PACKAGE_PIN AF4} [get_ports gt_tx_p[1]] ; ## MGTXTXP1_111 (sfp_gt_tx_p) +set_property -dict {PACKAGE_PIN AF3} [get_ports gt_tx_n[1]] ; ## MGTXTXN1_111 (sfp_gt_tx_n) +set_property -dict {PACKAGE_PIN AE6} [get_ports gt_rx_p[1]] ; ## MGTXRXP1_111 (sfp_gt_rx_p) +set_property -dict {PACKAGE_PIN AE5} [get_ports gt_rx_n[1]] ; ## MGTXRXN1_111 (sfp_gt_rx_n) -set_property -dict {PACKAGE_PIN J11 IOSTANDARD LVCMOS18} [get_ports gp_in[37]] ; ## IO_L1P_T0_34 (CAM_GPIO_0 ) -set_property -dict {PACKAGE_PIN H11 IOSTANDARD LVCMOS18} [get_ports gp_in[38]] ; ## IO_L1N_T0_34 (CAM_GPIO_1 ) -set_property -dict {PACKAGE_PIN H9 IOSTANDARD LVCMOS18} [get_ports gp_in[39]] ; ## IO_L3P_T0_DQS_PUDC_B_34 (CAM_GPIO_4 ) -set_property -dict {PACKAGE_PIN G9 IOSTANDARD LVCMOS18} [get_ports gp_in[40]] ; ## IO_L3N_T0_DQS_34 (CAM_GPIO_5 ) -set_property -dict {PACKAGE_PIN M6 IOSTANDARD LVCMOS18} [get_ports gp_in[41]] ; ## IO_L13P_T2_MRCC_33 (CAM_CLK_P ) -set_property -dict {PACKAGE_PIN M5 IOSTANDARD LVCMOS18} [get_ports gp_in[42]] ; ## IO_L13N_T2_MRCC_33 (CAM_CLK_N ) -set_property -dict {PACKAGE_PIN M2 IOSTANDARD LVCMOS18} [get_ports gp_in[43]] ; ## IO_L16P_T2_33 (CAM_DATA1_P ) -set_property -dict {PACKAGE_PIN L2 IOSTANDARD LVCMOS18} [get_ports gp_in[44]] ; ## IO_L16N_T2_33 (CAM_DATA1_N ) -set_property -dict {PACKAGE_PIN N1 IOSTANDARD LVCMOS18} [get_ports gp_in[45]] ; ## IO_L18P_T2_33 (CAM_DATA3_P ) -set_property -dict {PACKAGE_PIN M1 IOSTANDARD LVCMOS18} [get_ports gp_in[46]] ; ## IO_L18N_T2_33 (CAM_DATA3_N ) -set_property -dict {PACKAGE_PIN K5 IOSTANDARD LVCMOS18} [get_ports gp_in[47]] ; ## IO_L20P_T3_33 (CAM_DATA5_P ) -set_property -dict {PACKAGE_PIN J5 IOSTANDARD LVCMOS18} [get_ports gp_in[48]] ; ## IO_L20N_T3_33 (CAM_DATA5_N ) -set_property -dict {PACKAGE_PIN K6 IOSTANDARD LVCMOS18} [get_ports gp_in[49]] ; ## IO_L22P_T3_33 (CAM_DATA7_P ) -set_property -dict {PACKAGE_PIN J6 IOSTANDARD LVCMOS18} [get_ports gp_in[50]] ; ## IO_L22N_T3_33 (CAM_DATA7_N ) -set_property -dict {PACKAGE_PIN N7 IOSTANDARD LVCMOS18} [get_ports gp_in[51]] ; ## IO_L23P_T3_33 (CAM_SPI_CSN ) -set_property -dict {PACKAGE_PIN N6 IOSTANDARD LVCMOS18} [get_ports gp_in[52]] ; ## IO_L23N_T3_33 (CAM_SPI_CLK ) -set_property -dict {PACKAGE_PIN J4 IOSTANDARD LVCMOS18} [get_ports gp_in[53]] ; ## IO_L12P_T1_MRCC_33 (CAM_REFCLK ) -set_property -dict {PACKAGE_PIN G6 IOSTANDARD LVCMOS18} [get_ports gp_out[37]] ; ## IO_L2P_T0_34 (CAM_GPIO_2 ) -set_property -dict {PACKAGE_PIN G5 IOSTANDARD LVCMOS18} [get_ports gp_out[38]] ; ## IO_L2N_T0_34 (CAM_GPIO_3 ) -set_property -dict {PACKAGE_PIN H7 IOSTANDARD LVCMOS18} [get_ports gp_out[39]] ; ## IO_L4P_T0_34 (CAM_GPIO_6 ) -set_property -dict {PACKAGE_PIN H6 IOSTANDARD LVCMOS18} [get_ports gp_out[40]] ; ## IO_L4N_T0_34 (CAM_GPIO_7 ) -set_property -dict {PACKAGE_PIN N3 IOSTANDARD LVCMOS18} [get_ports gp_out[41]] ; ## IO_L15P_T2_DQS_33 (CAM_DATA0_P ) -set_property -dict {PACKAGE_PIN N2 IOSTANDARD LVCMOS18} [get_ports gp_out[42]] ; ## IO_L15N_T2_DQS_33 (CAM_DATA0_N ) -set_property -dict {PACKAGE_PIN N4 IOSTANDARD LVCMOS18} [get_ports gp_out[43]] ; ## IO_L17P_T2_33 (CAM_DATA2_P ) -set_property -dict {PACKAGE_PIN M4 IOSTANDARD LVCMOS18} [get_ports gp_out[44]] ; ## IO_L17N_T2_33 (CAM_DATA2_N ) -set_property -dict {PACKAGE_PIN M7 IOSTANDARD LVCMOS18} [get_ports gp_out[45]] ; ## IO_L19P_T3_33 (CAM_DATA4_P ) -set_property -dict {PACKAGE_PIN L7 IOSTANDARD LVCMOS18} [get_ports gp_out[46]] ; ## IO_L19N_T3_VREF_33 (CAM_DATA4_N ) -set_property -dict {PACKAGE_PIN M8 IOSTANDARD LVCMOS18} [get_ports gp_out[47]] ; ## IO_L21P_T3_DQS_33 (CAM_DATA6_P ) -set_property -dict {PACKAGE_PIN L8 IOSTANDARD LVCMOS18} [get_ports gp_out[48]] ; ## IO_L21N_T3_DQS_33 (CAM_DATA6_N ) -set_property -dict {PACKAGE_PIN L5 IOSTANDARD LVCMOS18} [get_ports gp_out[49]] ; ## IO_L14P_T2_SRCC_33 (CAM_SYNC_P ) -set_property -dict {PACKAGE_PIN L4 IOSTANDARD LVCMOS18} [get_ports gp_out[50]] ; ## IO_L14N_T2_SRCC_33 (CAM_SYNC_N ) -set_property -dict {PACKAGE_PIN K8 IOSTANDARD LVCMOS18} [get_ports gp_out[51]] ; ## IO_L24P_T3_33 (CAM_SPI_MISO) -set_property -dict {PACKAGE_PIN K7 IOSTANDARD LVCMOS18} [get_ports gp_out[52]] ; ## IO_L24N_T3_33 (CAM_SPI_MOSI) -set_property -dict {PACKAGE_PIN J10 IOSTANDARD LVCMOS18} [get_ports gp_out[53]] ; ## IO_L5P_T0_34 (CAM_GPIO_8 ) - -set_property -dict {PACKAGE_PIN Y17 IOSTANDARD LVCMOS25} [get_ports gp_inout[0]] ; ## IO_L19P_T3_12 (sfp_gpio[0]) -set_property -dict {PACKAGE_PIN AA17 IOSTANDARD LVCMOS25} [get_ports gp_inout[1]] ; ## IO_L19N_T3_VREF_12 (sfp_gpio[1]) -set_property -dict {PACKAGE_PIN AB17 IOSTANDARD LVCMOS25} [get_ports gp_inout[2]] ; ## IO_L20P_T3_12 (sfp_gpio[2]) -set_property -dict {PACKAGE_PIN AB16 IOSTANDARD LVCMOS25} [get_ports gp_inout[3]] ; ## IO_L20N_T3_12 (sfp_gpio[3]) -set_property -dict {PACKAGE_PIN AC17 IOSTANDARD LVCMOS25} [get_ports gp_inout[4]] ; ## IO_L21P_T3_DQS_12 (sfp_gpio[4]) -set_property -dict {PACKAGE_PIN AC16 IOSTANDARD LVCMOS25} [get_ports gp_inout[5]] ; ## IO_L21N_T3_DQS_12 (sfp_gpio[5]) -set_property -dict {PACKAGE_PIN AA15 IOSTANDARD LVCMOS25} [get_ports gp_inout[6]] ; ## IO_L22P_T3_12 (sfp_gpio[6]) +set_property -dict {PACKAGE_PIN J11 IOSTANDARD LVCMOS18} [get_ports gp_in[37]] ; ## IO_L1P_T0_34 (CAM_GPIO_0 ) +set_property -dict {PACKAGE_PIN H11 IOSTANDARD LVCMOS18} [get_ports gp_in[38]] ; ## IO_L1N_T0_34 (CAM_GPIO_1 ) +set_property -dict {PACKAGE_PIN H9 IOSTANDARD LVCMOS18} [get_ports gp_in[39]] ; ## IO_L3P_T0_DQS_PUDC_B_34 (CAM_GPIO_4 ) +set_property -dict {PACKAGE_PIN G9 IOSTANDARD LVCMOS18} [get_ports gp_in[40]] ; ## IO_L3N_T0_DQS_34 (CAM_GPIO_5 ) +set_property -dict {PACKAGE_PIN M6 IOSTANDARD LVCMOS18} [get_ports gp_in[41]] ; ## IO_L13P_T2_MRCC_33 (CAM_CLK_P ) +set_property -dict {PACKAGE_PIN M5 IOSTANDARD LVCMOS18} [get_ports gp_in[42]] ; ## IO_L13N_T2_MRCC_33 (CAM_CLK_N ) +set_property -dict {PACKAGE_PIN M2 IOSTANDARD LVCMOS18} [get_ports gp_in[43]] ; ## IO_L16P_T2_33 (CAM_DATA1_P ) +set_property -dict {PACKAGE_PIN L2 IOSTANDARD LVCMOS18} [get_ports gp_in[44]] ; ## IO_L16N_T2_33 (CAM_DATA1_N ) +set_property -dict {PACKAGE_PIN N1 IOSTANDARD LVCMOS18} [get_ports gp_in[45]] ; ## IO_L18P_T2_33 (CAM_DATA3_P ) +set_property -dict {PACKAGE_PIN M1 IOSTANDARD LVCMOS18} [get_ports gp_in[46]] ; ## IO_L18N_T2_33 (CAM_DATA3_N ) +set_property -dict {PACKAGE_PIN K5 IOSTANDARD LVCMOS18} [get_ports gp_in[47]] ; ## IO_L20P_T3_33 (CAM_DATA5_P ) +set_property -dict {PACKAGE_PIN J5 IOSTANDARD LVCMOS18} [get_ports gp_in[48]] ; ## IO_L20N_T3_33 (CAM_DATA5_N ) +set_property -dict {PACKAGE_PIN K6 IOSTANDARD LVCMOS18} [get_ports gp_in[49]] ; ## IO_L22P_T3_33 (CAM_DATA7_P ) +set_property -dict {PACKAGE_PIN J6 IOSTANDARD LVCMOS18} [get_ports gp_in[50]] ; ## IO_L22N_T3_33 (CAM_DATA7_N ) +set_property -dict {PACKAGE_PIN N7 IOSTANDARD LVCMOS18} [get_ports gp_in[51]] ; ## IO_L23P_T3_33 (CAM_SPI_CSN ) +set_property -dict {PACKAGE_PIN N6 IOSTANDARD LVCMOS18} [get_ports gp_in[52]] ; ## IO_L23N_T3_33 (CAM_SPI_CLK ) +set_property -dict {PACKAGE_PIN J4 IOSTANDARD LVCMOS18} [get_ports gp_in[53]] ; ## IO_L12P_T1_MRCC_33 (CAM_REFCLK ) +set_property -dict {PACKAGE_PIN G6 IOSTANDARD LVCMOS18} [get_ports gp_out[37]] ; ## IO_L2P_T0_34 (CAM_GPIO_2 ) +set_property -dict {PACKAGE_PIN G5 IOSTANDARD LVCMOS18} [get_ports gp_out[38]] ; ## IO_L2N_T0_34 (CAM_GPIO_3 ) +set_property -dict {PACKAGE_PIN H7 IOSTANDARD LVCMOS18} [get_ports gp_out[39]] ; ## IO_L4P_T0_34 (CAM_GPIO_6 ) +set_property -dict {PACKAGE_PIN H6 IOSTANDARD LVCMOS18} [get_ports gp_out[40]] ; ## IO_L4N_T0_34 (CAM_GPIO_7 ) +set_property -dict {PACKAGE_PIN N3 IOSTANDARD LVCMOS18} [get_ports gp_out[41]] ; ## IO_L15P_T2_DQS_33 (CAM_DATA0_P ) +set_property -dict {PACKAGE_PIN N2 IOSTANDARD LVCMOS18} [get_ports gp_out[42]] ; ## IO_L15N_T2_DQS_33 (CAM_DATA0_N ) +set_property -dict {PACKAGE_PIN N4 IOSTANDARD LVCMOS18} [get_ports gp_out[43]] ; ## IO_L17P_T2_33 (CAM_DATA2_P ) +set_property -dict {PACKAGE_PIN M4 IOSTANDARD LVCMOS18} [get_ports gp_out[44]] ; ## IO_L17N_T2_33 (CAM_DATA2_N ) +set_property -dict {PACKAGE_PIN M7 IOSTANDARD LVCMOS18} [get_ports gp_out[45]] ; ## IO_L19P_T3_33 (CAM_DATA4_P ) +set_property -dict {PACKAGE_PIN L7 IOSTANDARD LVCMOS18} [get_ports gp_out[46]] ; ## IO_L19N_T3_VREF_33 (CAM_DATA4_N ) +set_property -dict {PACKAGE_PIN M8 IOSTANDARD LVCMOS18} [get_ports gp_out[47]] ; ## IO_L21P_T3_DQS_33 (CAM_DATA6_P ) +set_property -dict {PACKAGE_PIN L8 IOSTANDARD LVCMOS18} [get_ports gp_out[48]] ; ## IO_L21N_T3_DQS_33 (CAM_DATA6_N ) +set_property -dict {PACKAGE_PIN L5 IOSTANDARD LVCMOS18} [get_ports gp_out[49]] ; ## IO_L14P_T2_SRCC_33 (CAM_SYNC_P ) +set_property -dict {PACKAGE_PIN L4 IOSTANDARD LVCMOS18} [get_ports gp_out[50]] ; ## IO_L14N_T2_SRCC_33 (CAM_SYNC_N ) +set_property -dict {PACKAGE_PIN K8 IOSTANDARD LVCMOS18} [get_ports gp_out[51]] ; ## IO_L24P_T3_33 (CAM_SPI_MISO) +set_property -dict {PACKAGE_PIN K7 IOSTANDARD LVCMOS18} [get_ports gp_out[52]] ; ## IO_L24N_T3_33 (CAM_SPI_MOSI) +set_property -dict {PACKAGE_PIN J10 IOSTANDARD LVCMOS18} [get_ports gp_out[53]] ; ## IO_L5P_T0_34 (CAM_GPIO_8 ) + +set_property -dict {PACKAGE_PIN Y17 IOSTANDARD LVCMOS25} [get_ports gp_inout[0]] ; ## IO_L19P_T3_12 (sfp_gpio[0]) +set_property -dict {PACKAGE_PIN AA17 IOSTANDARD LVCMOS25} [get_ports gp_inout[1]] ; ## IO_L19N_T3_VREF_12 (sfp_gpio[1]) +set_property -dict {PACKAGE_PIN AB17 IOSTANDARD LVCMOS25} [get_ports gp_inout[2]] ; ## IO_L20P_T3_12 (sfp_gpio[2]) +set_property -dict {PACKAGE_PIN AB16 IOSTANDARD LVCMOS25} [get_ports gp_inout[3]] ; ## IO_L20N_T3_12 (sfp_gpio[3]) +set_property -dict {PACKAGE_PIN AC17 IOSTANDARD LVCMOS25} [get_ports gp_inout[4]] ; ## IO_L21P_T3_DQS_12 (sfp_gpio[4]) +set_property -dict {PACKAGE_PIN AC16 IOSTANDARD LVCMOS25} [get_ports gp_inout[5]] ; ## IO_L21N_T3_DQS_12 (sfp_gpio[5]) +set_property -dict {PACKAGE_PIN AA15 IOSTANDARD LVCMOS25} [get_ports gp_inout[6]] ; ## IO_L22P_T3_12 (sfp_gpio[6]) # clocks -create_clock -name ref_clk_0 -period 4.00 [get_ports gt_ref_clk_0_p] -create_clock -name ref_clk_1 -period 4.00 [get_ports gt_ref_clk_1_p] -create_clock -name tx_div_clk_0 -period 8.00 [get_pins i_system_wrapper/system_i/axi_pzslb_gt/inst/g_lane_1[0].i_channel/i_gt/i_gtxe2_channel/TXOUTCLK] -create_clock -name rx_div_clk_0 -period 8.00 [get_pins i_system_wrapper/system_i/axi_pzslb_gt/inst/g_lane_1[0].i_channel/i_gt/i_gtxe2_channel/RXOUTCLK] -create_clock -name tx_div_clk_1 -period 8.00 [get_pins i_system_wrapper/system_i/axi_pzslb_gt/inst/g_lane_1[1].i_channel/i_gt/i_gtxe2_channel/TXOUTCLK] -create_clock -name rx_div_clk_1 -period 8.00 [get_pins i_system_wrapper/system_i/axi_pzslb_gt/inst/g_lane_1[1].i_channel/i_gt/i_gtxe2_channel/RXOUTCLK] +create_clock -name ref_clk -period 4.00 [get_ports gt_ref_clk_p] +create_clock -name xcvr_clk_0 -period 8.00 [get_pins i_system_wrapper/system_i/axi_pz_xcvrlb/inst/g_lanes[0].i_xcvrlb_1/i_xch/i_gtxe2_channel/RXOUTCLK] +create_clock -name xcvr_clk_1 -period 8.00 [get_pins i_system_wrapper/system_i/axi_pz_xcvrlb/inst/g_lanes[1].i_xcvrlb_1/i_xch/i_gtxe2_channel/RXOUTCLK] diff --git a/projects/pzsdr/ccfmc/system_project.tcl b/projects/pzsdr/ccfmc/system_project.tcl index 5550de22b..2cd3504f1 100644 --- a/projects/pzsdr/ccfmc/system_project.tcl +++ b/projects/pzsdr/ccfmc/system_project.tcl @@ -1,6 +1,4 @@ - - source ../../scripts/adi_env.tcl source $ad_hdl_dir/projects/scripts/adi_project.tcl source $ad_hdl_dir/projects/scripts/adi_board.tcl @@ -14,10 +12,6 @@ adi_project_files ccfmc_pzsdr [list \ "$ad_hdl_dir/projects/common/pzsdr/pzsdr_bd_system_constr.xdc" \ "$ad_hdl_dir/projects/common/pzsdr/pzsdr_lvds_system_constr.xdc" ] -set_property PROCESSING_ORDER EARLY [get_files $ad_hdl_dir/projects/common/pzsdr/pzsdr_system_constr.xdc] -set_property PROCESSING_ORDER EARLY [get_files $ad_hdl_dir/projects/common/pzsdr/pzsdr_bd_system_constr.xdc] -set_property PROCESSING_ORDER EARLY [get_files system_constr.xdc] - adi_project_run ccfmc_pzsdr diff --git a/projects/pzsdr/ccfmc/system_top.v b/projects/pzsdr/ccfmc/system_top.v index 95a24d9a1..3cfeaa8ee 100644 --- a/projects/pzsdr/ccfmc/system_top.v +++ b/projects/pzsdr/ccfmc/system_top.v @@ -39,254 +39,125 @@ module system_top ( - ddr_addr, - ddr_ba, - ddr_cas_n, - ddr_ck_n, - ddr_ck_p, - ddr_cke, - ddr_cs_n, - ddr_dm, - ddr_dq, - ddr_dqs_n, - ddr_dqs_p, - ddr_odt, - ddr_ras_n, - ddr_reset_n, - ddr_we_n, + inout [14:0] ddr_addr, + inout [ 2:0] ddr_ba, + inout ddr_cas_n, + inout ddr_ck_n, + inout ddr_ck_p, + inout ddr_cke, + inout ddr_cs_n, + inout [ 3:0] ddr_dm, + inout [31:0] ddr_dq, + inout [ 3:0] ddr_dqs_n, + inout [ 3:0] ddr_dqs_p, + inout ddr_odt, + inout ddr_ras_n, + inout ddr_reset_n, + inout ddr_we_n, - eth1_mdc, - eth1_mdio, - eth1_rgmii_rxclk, - eth1_rgmii_rxctl, - eth1_rgmii_rxdata, - eth1_rgmii_txclk, - eth1_rgmii_txctl, - eth1_rgmii_txdata, + output eth1_mdc, + inout eth1_mdio, + input eth1_rgmii_rxclk, + input eth1_rgmii_rxctl, + input [ 3:0] eth1_rgmii_rxdata, + output eth1_rgmii_txclk, + output eth1_rgmii_txctl, + output [ 3:0] eth1_rgmii_txdata, - fixed_io_ddr_vrn, - fixed_io_ddr_vrp, - fixed_io_mio, - fixed_io_ps_clk, - fixed_io_ps_porb, - fixed_io_ps_srstb, + inout fixed_io_ddr_vrn, + inout fixed_io_ddr_vrp, + inout [53:0] fixed_io_mio, + inout fixed_io_ps_clk, + inout fixed_io_ps_porb, + inout fixed_io_ps_srstb, - hdmi_out_clk, - hdmi_vsync, - hdmi_hsync, - hdmi_data_e, - hdmi_data, - hdmi_pd, - hdmi_intn, + output hdmi_out_clk, + output hdmi_vsync, + output hdmi_hsync, + output hdmi_data_e, + output [15:0] hdmi_data, + output hdmi_pd, + input hdmi_intn, - spdif, - spdif_in, + output spdif, + input spdif_in, - i2s_mclk, - i2s_bclk, - i2s_lrclk, - i2s_sdata_out, - i2s_sdata_in, + output i2s_mclk, + output i2s_bclk, + output i2s_lrclk, + output i2s_sdata_out, + input i2s_sdata_in, - iic_scl, - iic_sda, + inout iic_scl, + inout iic_sda, - gpio_bd, + inout [11:0] gpio_bd, - fan_pwm, - fan_tach, + output fan_pwm, + input fan_tach, - clk_0_p, - clk_0_n, - clk_1_p, - clk_1_n, - gp_in_0, - gp_inout_0, - gp_inout_1, - gp_inout, - gp_out, - gp_in, + input clk_0_p, + input clk_0_n, + input clk_1_p, + input clk_1_n, + input clk_2_p, + input clk_2_n, + input gp_in_0, + input gp_in_1, + inout [ 6:0] gp_inout, + output [53:0] gp_out, + input [53:0] gp_in, - gt_ref_clk_0_p, - gt_ref_clk_0_n, - gt_ref_clk_1_p, - gt_ref_clk_1_n, - gt_tx_0_p, - gt_tx_0_n, - gt_rx_0_p, - gt_rx_0_n, - gt_tx_1_p, - gt_tx_1_n, - gt_rx_1_p, - gt_rx_1_n, + input gt_ref_clk_p, + input gt_ref_clk_n, + output [ 1:0] gt_tx_p, + output [ 1:0] gt_tx_n, + input [ 1:0] gt_rx_p, + input [ 1:0] gt_rx_n, - ad9517_csn, - ad9517_clk, - ad9517_mosi, - ad9517_miso, - ad9517_pdn, - ad9517_ref_sel, - ad9517_ld, - ad9517_status, + output ad9517_csn, + output ad9517_clk, + output ad9517_mosi, + input ad9517_miso, + inout ad9517_pdn, + inout ad9517_ref_sel, + inout ad9517_ld, + inout ad9517_status, - rx_clk_in_p, - rx_clk_in_n, - rx_frame_in_p, - rx_frame_in_n, - rx_data_in_p, - rx_data_in_n, - tx_clk_out_p, - tx_clk_out_n, - tx_frame_out_p, - tx_frame_out_n, - tx_data_out_p, - tx_data_out_n, + input rx_clk_in_p, + input rx_clk_in_n, + input rx_frame_in_p, + input rx_frame_in_n, + input [ 5:0] rx_data_in_p, + input [ 5:0] rx_data_in_n, + output tx_clk_out_p, + output tx_clk_out_n, + output tx_frame_out_p, + output tx_frame_out_n, + output [ 5:0] tx_data_out_p, + output [ 5:0] tx_data_out_n, - enable, - txnrx, - clk_out, + output enable, + output txnrx, + input clk_out, + inout tdd_sync, - gpio_rf0, - gpio_rf1, - gpio_rf2, - gpio_rf3, - gpio_rfpwr_enable, - gpio_clksel, - gpio_resetb, - gpio_sync, - gpio_en_agc, - gpio_ctl, - gpio_status, + inout gpio_rf0, + inout gpio_rf1, + inout gpio_rf2, + inout gpio_rf3, + inout gpio_rfpwr_enable, + inout gpio_clksel, + inout gpio_resetb, + inout gpio_sync, + inout gpio_en_agc, + inout [ 3:0] gpio_ctl, + inout [ 7:0] gpio_status, - spi_csn, - spi_clk, - spi_mosi, - spi_miso); - - - inout [14:0] ddr_addr; - inout [ 2:0] ddr_ba; - inout ddr_cas_n; - inout ddr_ck_n; - inout ddr_ck_p; - inout ddr_cke; - inout ddr_cs_n; - inout [ 3:0] ddr_dm; - inout [31:0] ddr_dq; - inout [ 3:0] ddr_dqs_n; - inout [ 3:0] ddr_dqs_p; - inout ddr_odt; - inout ddr_ras_n; - inout ddr_reset_n; - inout ddr_we_n; - - output eth1_mdc; - inout eth1_mdio; - input eth1_rgmii_rxclk; - input eth1_rgmii_rxctl; - input [ 3:0] eth1_rgmii_rxdata; - output eth1_rgmii_txclk; - output eth1_rgmii_txctl; - output [ 3:0] eth1_rgmii_txdata; - - inout fixed_io_ddr_vrn; - inout fixed_io_ddr_vrp; - inout [53:0] fixed_io_mio; - inout fixed_io_ps_clk; - inout fixed_io_ps_porb; - inout fixed_io_ps_srstb; - - output hdmi_out_clk; - output hdmi_vsync; - output hdmi_hsync; - output hdmi_data_e; - output [15:0] hdmi_data; - output hdmi_pd; - input hdmi_intn; - - output spdif; - input spdif_in; - - output i2s_mclk; - output i2s_bclk; - output i2s_lrclk; - output i2s_sdata_out; - input i2s_sdata_in; - - inout iic_scl; - inout iic_sda; - - inout [11:0] gpio_bd; - - output fan_pwm; - input fan_tach; - - input clk_0_p; - input clk_0_n; - input clk_1_p; - input clk_1_n; - input gp_in_0; - inout gp_inout_0; - inout gp_inout_1; - inout [ 6:0] gp_inout; - output [53:0] gp_out; - input [53:0] gp_in; - - input gt_ref_clk_0_p; - input gt_ref_clk_0_n; - input gt_ref_clk_1_p; - input gt_ref_clk_1_n; - output gt_tx_0_p; - output gt_tx_0_n; - input gt_rx_0_p; - input gt_rx_0_n; - output gt_tx_1_p; - output gt_tx_1_n; - input gt_rx_1_p; - input gt_rx_1_n; - - output ad9517_csn; - output ad9517_clk; - output ad9517_mosi; - input ad9517_miso; - inout ad9517_pdn; - inout ad9517_ref_sel; - inout ad9517_ld; - inout ad9517_status; - - input rx_clk_in_p; - input rx_clk_in_n; - input rx_frame_in_p; - input rx_frame_in_n; - input [ 5:0] rx_data_in_p; - input [ 5:0] rx_data_in_n; - output tx_clk_out_p; - output tx_clk_out_n; - output tx_frame_out_p; - output tx_frame_out_n; - output [ 5:0] tx_data_out_p; - output [ 5:0] tx_data_out_n; - - output enable; - output txnrx; - input clk_out; - - inout gpio_rf0; - inout gpio_rf1; - inout gpio_rf2; - inout gpio_rf3; - inout gpio_rfpwr_enable; - inout gpio_clksel; - inout gpio_resetb; - inout gpio_sync; - inout gpio_en_agc; - inout [ 3:0] gpio_ctl; - inout [ 7:0] gpio_status; - - output spi_csn; - output spi_clk; - output spi_mosi; - input spi_miso; + output spi_csn, + output spi_clk, + output spi_mosi, + input spi_miso); // internal signals @@ -296,11 +167,13 @@ module system_top ( wire spi_miso_s; wire clk_0; wire clk_1; - wire gt_ref_clk_0; - wire gt_ref_clk_1; - wire [63:0] gp_ioenb_s; + wire clk_2; + wire gt_ref_clk; wire [63:0] gp_out_s; wire [63:0] gp_in_s; + wire [63:0] gp_misc_out_s; + wire [63:0] gp_misc_in_s; + wire [63:0] gp_misc_ioenb_s; wire [63:0] gpio_i; wire [63:0] gpio_o; wire [63:0] gpio_t; @@ -320,6 +193,15 @@ module system_top ( assign ad9517_mosi = spi_mosi_s; assign spi_miso_s = (~spi_csn_s[0] & spi_miso) | (~spi_csn_s[1] & ad9517_miso); + assign gp_misc_in_s[63:10] = gp_misc_out_s[63:18]; + assign gp_misc_in_s[9] = gp_in_1; + assign gp_misc_in_s[8] = gp_in_0; + assign gp_misc_in_s[7] = gp_misc_out_s[7]; + + assign gp_out[53:0] = gp_out_s[53:0]; + assign gp_in_s[63:54] = gp_out_s[63:54]; + assign gp_in_s[53:0] = gp_in[53:0]; + // instantiations IBUFDS i_ibufds_clk_0 ( @@ -332,48 +214,31 @@ module system_top ( .IB (clk_1_n), .O (clk_1)); - IBUFDS_GTE2 i_ibufds_gt_ref_clk_0 ( + IBUFDS_GTE2 i_ibufds_clk_2 ( .CEB (1'd0), - .I (gt_ref_clk_0_p), - .IB (gt_ref_clk_0_n), - .O (gt_ref_clk_0), + .I (clk_2_p), + .IB (clk_2_n), + .O (clk_2), .ODIV2 ()); - IBUFDS_GTE2 i_ibufds_gt_ref_clk_1 ( + IBUFDS_GTE2 i_ibufds_gt_ref_clk ( .CEB (1'd0), - .I (gt_ref_clk_1_p), - .IB (gt_ref_clk_1_n), - .O (gt_ref_clk_1), + .I (gt_ref_clk_p), + .IB (gt_ref_clk_n), + .O (gt_ref_clk), .ODIV2 ()); - assign gp_out[53:0] = gp_out_s[53:0]; - assign gp_in_s[53:0] = gp_in[53:0]; - - assign gp_in_s[63:63] = gp_in_0; - assign gp_in_s[62:62] = gp_out_s[62]; - assign gp_in_s[54:54] = gp_out_s[62] & gpio_tdd_sync_i; - - ad_iobuf #(.DATA_WIDTH(7)) i_iobuf_61_55 ( - .dio_t (gp_ioenb_s[61:55]), - .dio_i (gp_out_s[61:55]), - .dio_o (gp_in_s[61:55]), + ad_iobuf #(.DATA_WIDTH(7)) i_iobuf_sfp ( + .dio_t (gp_misc_ioenb_s[6:0]), + .dio_i (gp_misc_out_s[6:0]), + .dio_o (gp_misc_in_s[6:0]), .dio_p (gp_inout)); - ad_iobuf #(.DATA_WIDTH(1)) i_iobuf_54_0 ( - .dio_t (1'b0), - .dio_i (gp_out_s[54]), - .dio_o (), - .dio_p (gp_inout_0)); - - ad_iobuf #(.DATA_WIDTH(1)) i_iobuf_54_1 ( - .dio_t (gpio_tdd_sync_t), - .dio_i (gpio_tdd_sync_o), - .dio_o (gpio_tdd_sync_i), - .dio_p (gp_inout_1)); - - assign gpio_tdd_sync_t = gp_out_s[62] | tdd_sync_t; - assign gpio_tdd_sync_o = gp_out_s[62] | tdd_sync_o; - assign tdd_sync_i = ~gp_out_s[62] & gpio_tdd_sync_i; + ad_iobuf #(.DATA_WIDTH(1)) i_iobuf_tdd_sync ( + .dio_t (tdd_sync_t), + .dio_i (tdd_sync_o), + .dio_o (tdd_sync_i), + .dio_p (tdd_sync)); ad_iobuf #(.DATA_WIDTH(25)) i_iobuf ( .dio_t ({gpio_t[60:51], gpio_t[46:32]}), @@ -404,6 +269,7 @@ module system_top ( system_wrapper i_system_wrapper ( .clk_0 (clk_0), .clk_1 (clk_1), + .clk_2 (clk_2), .ddr_addr (ddr_addr), .ddr_ba (ddr_ba), .ddr_cas_n (ddr_cas_n), @@ -445,23 +311,24 @@ module system_top ( .fixed_io_ps_srstb (fixed_io_ps_srstb), .gp_in_0 (gp_in_s[31:0]), .gp_in_1 (gp_in_s[63:32]), - .gp_ioenb_0 (gp_ioenb_s[31:0]), - .gp_ioenb_1 (gp_ioenb_s[63:32]), + .gp_in_2 (gp_misc_in_s[31:0]), + .gp_in_3 (gp_misc_in_s[63:32]), + .gp_ioenb_0 (), + .gp_ioenb_1 (), + .gp_ioenb_2 (gp_misc_ioenb_s[31:0]), + .gp_ioenb_3 (gp_misc_ioenb_s[63:32]), .gp_out_0 (gp_out_s[31:0]), .gp_out_1 (gp_out_s[63:32]), + .gp_out_2 (gp_misc_out_s[31:0]), + .gp_out_3 (gp_misc_out_s[63:32]), .gpio_i (gpio_i), .gpio_o (gpio_o), .gpio_t (gpio_t), - .gt_ref_clk_0 (gt_ref_clk_0), - .gt_ref_clk_1 (gt_ref_clk_1), - .gt_rx_0_n (gt_rx_0_n), - .gt_rx_0_p (gt_rx_0_p), - .gt_rx_1_n (gt_rx_1_n), - .gt_rx_1_p (gt_rx_1_p), - .gt_tx_0_n (gt_tx_0_n), - .gt_tx_0_p (gt_tx_0_p), - .gt_tx_1_n (gt_tx_1_n), - .gt_tx_1_p (gt_tx_1_p), + .gt_ref_clk (gt_ref_clk), + .gt_rx_n (gt_rx_n), + .gt_rx_p (gt_rx_p), + .gt_tx_n (gt_tx_n), + .gt_tx_p (gt_tx_p), .hdmi_data (hdmi_data), .hdmi_data_e (hdmi_data_e), .hdmi_hsync (hdmi_hsync), diff --git a/projects/pzsdr/common/ccfmc_bd.tcl b/projects/pzsdr/common/ccfmc_bd.tcl index dfeff9174..258b47121 100644 --- a/projects/pzsdr/common/ccfmc_bd.tcl +++ b/projects/pzsdr/common/ccfmc_bd.tcl @@ -155,127 +155,65 @@ ad_mem_hp0_interconnect sys_cpu_clk axi_hdmi_dma/M_AXI_MM2S # un-used io (gt) -set axi_pzslb_gt [create_bd_cell -type ip -vlnv analog.com:user:axi_jesd_gt:1.0 axi_pzslb_gt] -set_property -dict [list CONFIG.NUM_OF_LANES {2}] $axi_pzslb_gt -set_property -dict [list CONFIG.QPLL1_ENABLE {0}] $axi_pzslb_gt -set_property -dict [list CONFIG.RX_NUM_OF_LANES {2}] $axi_pzslb_gt -set_property -dict [list CONFIG.TX_NUM_OF_LANES {2}] $axi_pzslb_gt -set_property -dict [list CONFIG.RX_CLKBUF_ENABLE_0 {1}] $axi_pzslb_gt -set_property -dict [list CONFIG.TX_CLKBUF_ENABLE_0 {1}] $axi_pzslb_gt -set_property -dict [list CONFIG.TX_DATA_SEL_0 {0}] $axi_pzslb_gt -set_property -dict [list CONFIG.CPLL_FBDIV_0 {2}] $axi_pzslb_gt -set_property -dict [list CONFIG.RX_OUT_DIV_0 {1}] $axi_pzslb_gt -set_property -dict [list CONFIG.TX_OUT_DIV_0 {1}] $axi_pzslb_gt -set_property -dict [list CONFIG.RX_CLK25_DIV_0 {10}] $axi_pzslb_gt -set_property -dict [list CONFIG.TX_CLK25_DIV_0 {10}] $axi_pzslb_gt -set_property -dict [list CONFIG.PMA_RSV_0 {0x00018480}] $axi_pzslb_gt -set_property -dict [list CONFIG.RX_CDR_CFG_0 {0x03000023ff20400020}] $axi_pzslb_gt -set_property -dict [list CONFIG.RX_CLKBUF_ENABLE_1 {1}] $axi_pzslb_gt -set_property -dict [list CONFIG.TX_CLKBUF_ENABLE_1 {1}] $axi_pzslb_gt -set_property -dict [list CONFIG.TX_DATA_SEL_1 {1}] $axi_pzslb_gt -set_property -dict [list CONFIG.CPLL_FBDIV_1 {2}] $axi_pzslb_gt -set_property -dict [list CONFIG.RX_OUT_DIV_1 {1}] $axi_pzslb_gt -set_property -dict [list CONFIG.TX_OUT_DIV_1 {1}] $axi_pzslb_gt -set_property -dict [list CONFIG.RX_CLK25_DIV_1 {10}] $axi_pzslb_gt -set_property -dict [list CONFIG.TX_CLK25_DIV_1 {10}] $axi_pzslb_gt -set_property -dict [list CONFIG.PMA_RSV_1 {0x00018480}] $axi_pzslb_gt -set_property -dict [list CONFIG.RX_CDR_CFG_1 {0x03000023ff20400020}] $axi_pzslb_gt +set axi_pz_xcvrlb [create_bd_cell -type ip -vlnv analog.com:user:axi_xcvrlb:1.0 axi_pz_xcvrlb] +set_property -dict [list CONFIG.NUM_OF_LANES {2}] $axi_pz_xcvrlb -set util_pzslb_gtlb_0 [create_bd_cell -type ip -vlnv analog.com:user:util_gtlb:1.0 util_pzslb_gtlb_0] -set util_pzslb_gtlb_1 [create_bd_cell -type ip -vlnv analog.com:user:util_gtlb:1.0 util_pzslb_gtlb_1] +create_bd_port -dir I gt_ref_clk +create_bd_port -dir I -from 1 -to 0 gt_rx_p +create_bd_port -dir I -from 1 -to 0 gt_rx_n +create_bd_port -dir O -from 1 -to 0 gt_tx_p +create_bd_port -dir O -from 1 -to 0 gt_tx_n -ad_cpu_interconnect 0x44A60000 axi_pzslb_gt -ad_mem_hp3_interconnect sys_cpu_clk sys_ps7/S_AXI_HP3 -ad_mem_hp3_interconnect sys_cpu_clk axi_pzslb_gt/m_axi - -create_bd_port -dir I gt_ref_clk_0 -create_bd_port -dir I gt_ref_clk_1 -create_bd_port -dir I gt_rx_0_p -create_bd_port -dir I gt_rx_0_n -create_bd_port -dir O gt_tx_0_p -create_bd_port -dir O gt_tx_0_n -create_bd_port -dir I gt_rx_1_p -create_bd_port -dir I gt_rx_1_n -create_bd_port -dir O gt_tx_1_p -create_bd_port -dir O gt_tx_1_n - -ad_connect sys_cpu_clk util_pzslb_gtlb_0/up_clk -ad_connect sys_cpu_resetn util_pzslb_gtlb_0/up_rstn -ad_connect util_pzslb_gtlb_0/qpll_ref_clk gt_ref_clk_0 -ad_connect util_pzslb_gtlb_0/cpll_ref_clk gt_ref_clk_0 -ad_connect util_pzslb_gtlb_0/rx_p gt_rx_0_p -ad_connect util_pzslb_gtlb_0/rx_n gt_rx_0_n -ad_connect util_pzslb_gtlb_0/tx_p gt_tx_0_p -ad_connect util_pzslb_gtlb_0/tx_n gt_tx_0_n -ad_connect sys_cpu_clk util_pzslb_gtlb_1/up_clk -ad_connect sys_cpu_resetn util_pzslb_gtlb_1/up_rstn -ad_connect util_pzslb_gtlb_1/qpll_ref_clk gt_ref_clk_0 -ad_connect util_pzslb_gtlb_1/cpll_ref_clk gt_ref_clk_0 -ad_connect util_pzslb_gtlb_1/rx_p gt_rx_1_p -ad_connect util_pzslb_gtlb_1/rx_n gt_rx_1_n -ad_connect util_pzslb_gtlb_1/tx_p gt_tx_1_p -ad_connect util_pzslb_gtlb_1/tx_n gt_tx_1_n -ad_connect axi_pzslb_gt/gt_qpll_0 util_pzslb_gtlb_0/gt_qpll_0 -ad_connect axi_pzslb_gt/gt_pll_0 util_pzslb_gtlb_0/gt_pll_0 -ad_connect axi_pzslb_gt/gt_rx_0 util_pzslb_gtlb_0/gt_rx_0 -ad_connect axi_pzslb_gt/gt_tx_0 util_pzslb_gtlb_0/gt_tx_0 -ad_connect axi_pzslb_gt/gt_rx_ip_0 util_pzslb_gtlb_0/gt_rx_ip_0 -ad_connect axi_pzslb_gt/gt_tx_ip_0 util_pzslb_gtlb_0/gt_tx_ip_0 -ad_connect axi_pzslb_gt/rx_gt_comma_align_enb_0 util_pzslb_gtlb_0/rx_gt_comma_align_enb_0 -ad_connect axi_pzslb_gt/gt_pll_1 util_pzslb_gtlb_1/gt_pll_0 -ad_connect axi_pzslb_gt/gt_rx_1 util_pzslb_gtlb_1/gt_rx_0 -ad_connect axi_pzslb_gt/gt_tx_1 util_pzslb_gtlb_1/gt_tx_0 -ad_connect axi_pzslb_gt/gt_rx_ip_1 util_pzslb_gtlb_1/gt_rx_ip_0 -ad_connect axi_pzslb_gt/gt_tx_ip_1 util_pzslb_gtlb_1/gt_tx_ip_0 -ad_connect axi_pzslb_gt/rx_gt_comma_align_enb_1 util_pzslb_gtlb_1/rx_gt_comma_align_enb_0 +ad_cpu_interconnect 0x44A60000 axi_pz_xcvrlb +ad_connect axi_pz_xcvrlb/ref_clk gt_ref_clk +ad_connect axi_pz_xcvrlb/rx_p gt_rx_p +ad_connect axi_pz_xcvrlb/rx_n gt_rx_n +ad_connect axi_pz_xcvrlb/tx_p gt_tx_p +ad_connect axi_pz_xcvrlb/tx_n gt_tx_n # un-used io (regular) set axi_gpreg [create_bd_cell -type ip -vlnv analog.com:user:axi_gpreg:1.0 axi_gpreg] -set_property -dict [list CONFIG.NUM_OF_CLK_MONS {8}] $axi_gpreg +set_property -dict [list CONFIG.NUM_OF_CLK_MONS {3}] $axi_gpreg +set_property -dict [list CONFIG.NUM_OF_IO {4}] $axi_gpreg set_property -dict [list CONFIG.BUF_ENABLE_0 {1}] $axi_gpreg set_property -dict [list CONFIG.BUF_ENABLE_1 {1}] $axi_gpreg set_property -dict [list CONFIG.BUF_ENABLE_2 {1}] $axi_gpreg -set_property -dict [list CONFIG.BUF_ENABLE_3 {0}] $axi_gpreg -set_property -dict [list CONFIG.BUF_ENABLE_4 {0}] $axi_gpreg -set_property -dict [list CONFIG.BUF_ENABLE_5 {1}] $axi_gpreg -set_property -dict [list CONFIG.BUF_ENABLE_6 {0}] $axi_gpreg -set_property -dict [list CONFIG.BUF_ENABLE_7 {0}] $axi_gpreg -set_property -dict [list CONFIG.NUM_OF_IO {4}] $axi_gpreg - -ad_cpu_interconnect 0x41200000 axi_gpreg - -create_bd_port -dir I clk_0 -create_bd_port -dir I clk_1 -ad_connect clk_0 axi_gpreg/d_clk_0 -ad_connect clk_1 axi_gpreg/d_clk_1 -ad_connect gt_ref_clk_0 axi_gpreg/d_clk_2 -ad_connect util_pzslb_gtlb_0/rx_clk axi_gpreg/d_clk_3 -ad_connect util_pzslb_gtlb_0/tx_clk axi_gpreg/d_clk_4 -ad_connect gt_ref_clk_1 axi_gpreg/d_clk_5 -ad_connect util_pzslb_gtlb_1/rx_clk axi_gpreg/d_clk_6 -ad_connect util_pzslb_gtlb_1/tx_clk axi_gpreg/d_clk_7 create_bd_port -dir I -from 31 -to 0 gp_in_0 create_bd_port -dir I -from 31 -to 0 gp_in_1 +create_bd_port -dir I -from 31 -to 0 gp_in_2 +create_bd_port -dir I -from 31 -to 0 gp_in_3 create_bd_port -dir O -from 31 -to 0 gp_out_0 create_bd_port -dir O -from 31 -to 0 gp_out_1 +create_bd_port -dir O -from 31 -to 0 gp_out_2 +create_bd_port -dir O -from 31 -to 0 gp_out_3 create_bd_port -dir O -from 31 -to 0 gp_ioenb_0 create_bd_port -dir O -from 31 -to 0 gp_ioenb_1 +create_bd_port -dir O -from 31 -to 0 gp_ioenb_2 +create_bd_port -dir O -from 31 -to 0 gp_ioenb_3 +create_bd_port -dir I clk_0 +create_bd_port -dir I clk_1 +create_bd_port -dir I clk_2 +ad_connect clk_0 axi_gpreg/d_clk_0 +ad_connect clk_1 axi_gpreg/d_clk_1 +ad_connect clk_2 axi_gpreg/d_clk_2 ad_connect gp_in_0 axi_gpreg/up_gp_in_0 ad_connect gp_in_1 axi_gpreg/up_gp_in_1 +ad_connect gp_in_2 axi_gpreg/up_gp_in_2 +ad_connect gp_in_3 axi_gpreg/up_gp_in_3 ad_connect gp_out_0 axi_gpreg/up_gp_out_0 ad_connect gp_out_1 axi_gpreg/up_gp_out_1 +ad_connect gp_out_2 axi_gpreg/up_gp_out_2 +ad_connect gp_out_3 axi_gpreg/up_gp_out_3 ad_connect gp_ioenb_0 axi_gpreg/up_gp_ioenb_0 ad_connect gp_ioenb_1 axi_gpreg/up_gp_ioenb_1 -ad_connect axi_gpreg/up_gp_in_2 util_pzslb_gtlb_0/up_gp_out -ad_connect axi_gpreg/up_gp_out_2 util_pzslb_gtlb_0/up_gp_in -ad_connect axi_gpreg/up_gp_in_3 util_pzslb_gtlb_1/up_gp_out -ad_connect axi_gpreg/up_gp_out_3 util_pzslb_gtlb_1/up_gp_in +ad_connect gp_ioenb_2 axi_gpreg/up_gp_ioenb_2 +ad_connect gp_ioenb_3 axi_gpreg/up_gp_ioenb_3 +ad_cpu_interconnect 0x41200000 axi_gpreg ## temporary (remove ila indirectly) delete_bd_objs [get_bd_cells ila_adc] -delete_bd_objs [get_bd_nets axi_ad9361_tdd_dbg] [get_bd_cells ila_tdd]