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daq3/a10gx: updates

main
Rejeesh Kutty 2015-12-10 16:06:14 -05:00
parent f1b6577447
commit dc84a9ad82
6 changed files with 136 additions and 80 deletions
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10
projects/daq3/a10gx/Makefile
View File

@ -9,8 +9,8 @@ M_DEPS += system_top.v
M_DEPS += system_project.tcl
M_DEPS += system_constr.sdc
M_DEPS += system_bd.qsys
M_DEPS += ../common/daq2_spi.v
M_DEPS += ../common/daq2_bd.qsys
M_DEPS += ../common/daq3_spi.v
M_DEPS += ../common/daq3_bd.qsys
M_DEPS += ../../scripts/adi_env.tcl
M_DEPS += ../../common/a10gx/a10gx_system_bd.qsys
M_DEPS += ../../common/a10gx/a10gx_system_assign.tcl
@ -120,7 +120,7 @@ M_FLIST += *.pin
.PHONY: all clean clean-all
all: daq2_a10gx.sof
all: daq3_a10gx.sof
@ -131,9 +131,9 @@ clean-all:
rm -rf $(M_FLIST)
daq2_a10gx.sof: $(M_DEPS)
daq3_a10gx.sof: $(M_DEPS)
rm -rf $(M_FLIST)
$(M_ALTERA) system_project.tcl >> daq2_a10gx_quartus.log 2>&1
$(M_ALTERA) system_project.tcl >> daq3_a10gx_quartus.log 2>&1
####################################################################################
####################################################################################

74
projects/daq3/a10gx/system_bd.qsys
View File

@ -38,7 +38,7 @@
type = "String";
}
}
element daq2
element daq3
{
datum _sortIndex
{
@ -46,7 +46,7 @@
type = "int";
}
}
element daq2.axi_ad9144_core_s_axi
element daq3.axi_ad9152_core_s_axi
{
datum baseAddress
{
@ -54,7 +54,7 @@
type = "String";
}
}
element daq2.axi_ad9144_dma_s_axi
element daq3.axi_ad9152_dma_s_axi
{
datum baseAddress
{
@ -62,7 +62,7 @@
type = "String";
}
}
element daq2.axi_ad9680_core_s_axi
element daq3.axi_ad9680_core_s_axi
{
datum baseAddress
{
@ -70,7 +70,7 @@
type = "String";
}
}
element daq2.axi_ad9680_dma_s_axi
element daq3.axi_ad9680_dma_s_axi
{
datum baseAddress
{
@ -78,7 +78,7 @@
type = "String";
}
}
element daq2.axi_jesd_xcvr_s_axi
element daq3.axi_jesd_xcvr_s_axi
{
datum baseAddress
{
@ -332,7 +332,7 @@
<parameter name="hideFromIPCatalog" value="false" />
<parameter name="lockedInterfaceDefinition" value="" />
<parameter name="maxAdditionalLatency" value="2" />
<parameter name="projectName" value="daq2_a10gx.qpf" />
<parameter name="projectName" value="daq3_a10gx.qpf" />
<parameter name="sopcBorderPoints" value="false" />
<parameter name="systemHash" value="0" />
<parameter name="testBenchDutName" value="" />
@ -395,28 +395,28 @@
internal="a10gx_base.sys_spi"
type="conduit"
dir="end" />
<interface name="daq2_rx_data" internal="daq2.rx_data" type="conduit" dir="end" />
<interface name="daq3_rx_data" internal="daq3.rx_data" type="conduit" dir="end" />
<interface
name="daq2_rx_ref_clk"
internal="daq2.rx_ref_clk"
name="daq3_rx_ref_clk"
internal="daq3.rx_ref_clk"
type="clock"
dir="end" />
<interface name="daq2_rx_sync" internal="daq2.rx_sync" type="conduit" dir="end" />
<interface name="daq3_rx_sync" internal="daq3.rx_sync" type="conduit" dir="end" />
<interface
name="daq2_rx_sysref"
internal="daq2.rx_sysref"
name="daq3_rx_sysref"
internal="daq3.rx_sysref"
type="conduit"
dir="end" />
<interface name="daq2_tx_data" internal="daq2.tx_data" type="conduit" dir="end" />
<interface name="daq3_tx_data" internal="daq3.tx_data" type="conduit" dir="end" />
<interface
name="daq2_tx_ref_clk"
internal="daq2.tx_ref_clk"
name="daq3_tx_ref_clk"
internal="daq3.tx_ref_clk"
type="clock"
dir="end" />
<interface name="daq2_tx_sync" internal="daq2.tx_sync" type="conduit" dir="end" />
<interface name="daq3_tx_sync" internal="daq3.tx_sync" type="conduit" dir="end" />
<interface
name="daq2_tx_sysref"
internal="daq2.tx_sysref"
name="daq3_tx_sysref"
internal="daq3.tx_sysref"
type="conduit"
dir="end" />
<interface name="sys_clk" internal="sys_clk.clk_in" type="clock" dir="end" />
@ -433,7 +433,7 @@
<parameter name="AUTO_SYS_CLK_CLOCK_DOMAIN" value="6" />
<parameter name="AUTO_SYS_CLK_CLOCK_RATE" value="100000000" />
<parameter name="AUTO_SYS_CLK_RESET_DOMAIN" value="6" />
<parameter name="AUTO_SYS_CPU_M_AVL_ADDRESS_MAP"><![CDATA[<address-map><slave name='daq2_axi_jesd_xcvr.s_axi' start='0x0' end='0x10000' /><slave name='daq2_axi_ad9680_core.s_axi' start='0x10000' end='0x20000' /><slave name='daq2_axi_ad9144_core.s_axi' start='0x20000' end='0x30000' /><slave name='daq2_axi_ad9680_dma.s_axi' start='0x30000' end='0x34000' /><slave name='daq2_axi_ad9144_dma.s_axi' start='0x34000' end='0x38000' /></address-map>]]></parameter>
<parameter name="AUTO_SYS_CPU_M_AVL_ADDRESS_MAP"><![CDATA[<address-map><slave name='daq3_axi_jesd_xcvr.s_axi' start='0x0' end='0x10000' /><slave name='daq3_axi_ad9680_core.s_axi' start='0x10000' end='0x20000' /><slave name='daq3_axi_ad9152_core.s_axi' start='0x20000' end='0x30000' /><slave name='daq3_axi_ad9680_dma.s_axi' start='0x30000' end='0x34000' /><slave name='daq3_axi_ad9152_dma.s_axi' start='0x34000' end='0x38000' /></address-map>]]></parameter>
<parameter name="AUTO_SYS_CPU_M_AVL_ADDRESS_WIDTH" value="AddressWidth = 18" />
<parameter name="AUTO_SYS_DDR3_CNTRL_PLL_REF_CLK_CLOCK_DOMAIN" value="1" />
<parameter name="AUTO_SYS_DDR3_CNTRL_PLL_REF_CLK_CLOCK_RATE" value="0" />
@ -444,10 +444,10 @@
<parameter name="AUTO_SYS_INTR_INTERRUPTS_USED" value="3" />
<parameter name="AUTO_UNIQUE_ID">$${FILENAME}_a10gx_base</parameter>
</module>
<module name="daq2" kind="daq2_bd" version="1.0" enabled="1">
<parameter name="AUTO_AXI_AD9144_DMA_M_AXI_ADDRESS_MAP"><![CDATA[<address-map><slave name='a10gx_base_sys_ddr3_cntrl.ctrl_amm_0' start='0x0' end='0x10000000' /></address-map>]]></parameter>
<module name="daq3" kind="daq3_bd" version="1.0" enabled="1">
<parameter name="AUTO_AXI_AD9152_DMA_M_AXI_ADDRESS_MAP"><![CDATA[<address-map><slave name='a10gx_base_sys_ddr3_cntrl.ctrl_amm_0' start='0x0' end='0x10000000' /></address-map>]]></parameter>
<parameter
name="AUTO_AXI_AD9144_DMA_M_AXI_ADDRESS_WIDTH"
name="AUTO_AXI_AD9152_DMA_M_AXI_ADDRESS_WIDTH"
value="AddressWidth = 29" />
<parameter name="AUTO_AXI_AD9680_DMA_M_AXI_ADDRESS_MAP"><![CDATA[<address-map><slave name='a10gx_base_sys_ddr3_cntrl.ctrl_amm_0' start='0x0' end='0x10000000' /></address-map>]]></parameter>
<parameter
@ -469,7 +469,7 @@
<parameter name="AUTO_TX_REF_CLK_CLOCK_DOMAIN" value="5" />
<parameter name="AUTO_TX_REF_CLK_CLOCK_RATE" value="0" />
<parameter name="AUTO_TX_REF_CLK_RESET_DOMAIN" value="5" />
<parameter name="AUTO_UNIQUE_ID" value="$${FILENAME}_daq2" />
<parameter name="AUTO_UNIQUE_ID" value="$${FILENAME}_daq3" />
</module>
<module name="sys_clk" kind="clock_source" version="15.0" enabled="1">
<parameter name="clockFrequency" value="100000000" />
@ -480,7 +480,7 @@
<connection
kind="avalon"
version="15.0"
start="daq2.axi_ad9144_dma_m_axi"
start="daq3.axi_ad9152_dma_m_axi"
end="a10gx_base.sys_mem_s_avl">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x0000" />
@ -489,7 +489,7 @@
<connection
kind="avalon"
version="15.0"
start="daq2.axi_ad9680_dma_m_axi"
start="daq3.axi_ad9680_dma_m_axi"
end="a10gx_base.sys_mem_s_avl">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x0000" />
@ -499,7 +499,7 @@
kind="avalon"
version="15.0"
start="a10gx_base.sys_cpu_m_avl"
end="daq2.axi_ad9144_core_s_axi">
end="daq3.axi_ad9152_core_s_axi">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x00020000" />
<parameter name="defaultConnection" value="false" />
@ -508,7 +508,7 @@
kind="avalon"
version="15.0"
start="a10gx_base.sys_cpu_m_avl"
end="daq2.axi_ad9144_dma_s_axi">
end="daq3.axi_ad9152_dma_s_axi">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x00034000" />
<parameter name="defaultConnection" value="false" />
@ -517,7 +517,7 @@
kind="avalon"
version="15.0"
start="a10gx_base.sys_cpu_m_avl"
end="daq2.axi_ad9680_core_s_axi">
end="daq3.axi_ad9680_core_s_axi">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x00010000" />
<parameter name="defaultConnection" value="false" />
@ -526,7 +526,7 @@
kind="avalon"
version="15.0"
start="a10gx_base.sys_cpu_m_avl"
end="daq2.axi_ad9680_dma_s_axi">
end="daq3.axi_ad9680_dma_s_axi">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x00030000" />
<parameter name="defaultConnection" value="false" />
@ -535,7 +535,7 @@
kind="avalon"
version="15.0"
start="a10gx_base.sys_cpu_m_avl"
end="daq2.axi_jesd_xcvr_s_axi">
end="daq3.axi_jesd_xcvr_s_axi">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x0000" />
<parameter name="defaultConnection" value="false" />
@ -545,24 +545,24 @@
version="15.0"
start="sys_clk.clk"
end="a10gx_base.sys_clk" />
<connection kind="clock" version="15.0" start="sys_clk.clk" end="daq2.sys_clk" />
<connection kind="clock" version="15.0" start="sys_clk.clk" end="daq3.sys_clk" />
<connection
kind="clock"
version="15.0"
start="a10gx_base.mem_clk"
end="daq2.mem_clk" />
end="daq3.mem_clk" />
<connection
kind="interrupt"
version="15.0"
start="a10gx_base.sys_intr"
end="daq2.axi_ad9144_dma_intr">
end="daq3.axi_ad9152_dma_intr">
<parameter name="irqNumber" value="1" />
</connection>
<connection
kind="interrupt"
version="15.0"
start="a10gx_base.sys_intr"
end="daq2.axi_ad9680_dma_intr">
end="daq3.axi_ad9680_dma_intr">
<parameter name="irqNumber" value="0" />
</connection>
<connection
@ -574,12 +574,12 @@
kind="reset"
version="15.0"
start="sys_clk.clk_reset"
end="daq2.sys_rst" />
end="daq3.sys_rst" />
<connection
kind="reset"
version="15.0"
start="a10gx_base.mem_rst"
end="daq2.mem_rst" />
end="daq3.mem_rst" />
<interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="FIFO" />
<interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="false" />
<interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="2" />

15
projects/daq3/a10gx/system_project.tcl
View File

@ -2,15 +2,14 @@
load_package flow
source ../../scripts/adi_env.tcl
project_new daq2_a10gx -overwrite
project_new daq3_a10gx -overwrite
source "../../common/a10gx/a10gx_system_assign.tcl"
set_user_option -name USER_IP_SEARCH_PATHS "../common/;../../common/a10gx/;../../../library/**/*"
set_global_assignment -name IP_SEARCH_PATHS "../common/;../../common/a10gx;../../../library/**/*"
set_global_assignment -name QSYS_FILE system_bd.qsys
set_global_assignment -name VERILOG_FILE "../../../library/common/ad_iobuf.v"
set_global_assignment -name VERILOG_FILE ../common/daq2_spi.v
set_global_assignment -name VERILOG_FILE ../common/daq3_spi.v
set_global_assignment -name VERILOG_FILE system_top.v
set_global_assignment -name SDC_FILE system_constr.sdc
@ -70,12 +69,12 @@ set_location_assignment PIN_AU17 -to "trig(n)" ; ## H14 FMCA_LA07_
set_location_assignment PIN_AR14 -to adc_fdb ; ## H17 FMCA_LA11_N
set_location_assignment PIN_AT14 -to adc_fda ; ## H16 FMCA_LA11_P
set_location_assignment PIN_AR16 -to dac_irq ; ## G15 FMCA_LA12_P
set_location_assignment PIN_AP17 -to clkd_status[1] ; ## D18 FMCA_LA13_N
set_location_assignment PIN_AR17 -to clkd_status[0] ; ## D17 FMCA_LA13_P
set_location_assignment PIN_AN19 -to clkd_status[1] ; ## G13 FMCA_LA08_N
set_location_assignment PIN_AP18 -to clkd_status[0] ; ## G12 FMCA_LA08_P
set_location_assignment PIN_AV14 -to adc_pd ; ## C10 FMCA_LA06_P
set_location_assignment PIN_AP16 -to dac_txen ; ## G16 FMCA_LA12_N
set_location_assignment PIN_AT15 -to dac_reset ; ## C15 FMCA_LA10_N
set_location_assignment PIN_AP18 -to clkd_sync ; ## G12 FMCA_LA08_P
set_location_assignment PIN_AR17 -to sysref ; ## D17 FMCA_LA13_P
set_location_assignment PIN_AP17 -to "sysref(n)" ; ## D18 FMCA_LA13_N
set_instance_assignment -name IO_STANDARD LVDS -to trig
@ -86,7 +85,7 @@ set_location_assignment PIN_AR15 -to spi_csn_dac ; ## C14 FMCA_LA10_
set_location_assignment PIN_AV13 -to spi_csn_adc ; ## D15 FMCA_LA09_N
set_location_assignment PIN_AW11 -to spi_clk ; ## D12 FMCA_LA05_N
set_location_assignment PIN_AW13 -to spi_sdio ; ## D14 FMCA_LA09_P
set_location_assignment PIN_AN19 -to spi_dir ; ## G13 FMCA_LA08_N
set_location_assignment PIN_AW14 -to spi_dir ; ## C11 FMCA_LA06_N
execute_flow -compile

58
projects/daq3/a10gx/system_top.v
View File

@ -76,7 +76,8 @@ module system_top (
// board gpio
gpio_bd,
gpio_bd_i,
gpio_bd_o,
// lane interface
@ -98,8 +99,7 @@ module system_top (
clkd_status,
adc_pd,
dac_txen,
dac_reset,
clkd_sync,
sysref,
// spi
@ -147,7 +147,8 @@ module system_top (
// board gpio
inout [ 26:0] gpio_bd;
inout [ 10:0] gpio_bd_i;
inout [ 15:0] gpio_bd_o;
// lane interface
@ -169,8 +170,7 @@ module system_top (
input [ 1:0] clkd_status;
output adc_pd;
output dac_txen;
output dac_reset;
output clkd_sync;
output sysref;
// spi
@ -187,19 +187,29 @@ module system_top (
wire eth_mdio_i;
wire eth_mdio_o;
wire eth_mdio_t;
wire [ 31:0] gpio_i;
wire [ 31:0] gpio_o;
wire [ 63:0] gpio_i;
wire [ 63:0] gpio_o;
wire spi_miso_s;
wire spi_mosi_s;
wire [ 7:0] spi_csn_s;
// daq2
// daq3
assign sysref = gpio_o[40];
assign adc_pd = gpio_o[38:38];
assign dac_txen = gpio_o[37:37];
assign gpio_i[39:39] = trig;
assign gpio_i[36:36] = adc_fdb;
assign gpio_i[35:35] = adc_fda;
assign gpio_i[34:34] = dac_irq;
assign gpio_i[33:32] = clkd_status;
assign spi_csn_adc = spi_csn_s[2];
assign spi_csn_dac = spi_csn_s[1];
assign spi_csn_clk = spi_csn_s[0];
daq2_spi i_daq2_spi (
daq3_spi i_daq3_spi (
.spi_csn (spi_csn_s[2:0]),
.spi_clk (spi_clk),
.spi_mosi (spi_mosi_s),
@ -216,12 +226,10 @@ module system_top (
assign ddr3_a[14:12] = 3'd0;
assign gpio_i[31:27] = gpio_o[31:27];
assign gpio_i[26:16] = gpio_bd_i;
assign gpio_i[15: 0] = gpio_o[15: 0];
ad_iobuf #(.DATA_WIDTH(27)) i_iobuf_bd (
.dio_t ({11'h7ff, 16'h0}),
.dio_i (gpio_o[26:0]),
.dio_o (gpio_i[26:0]),
.dio_p (gpio_bd));
assign gpio_bd_o = gpio_o[15:0];
system_bd i_system_bd (
.a10gx_base_sys_ddr3_cntrl_mem_mem_ck (ddr3_clk_p),
@ -249,22 +257,22 @@ module system_top (
.a10gx_base_sys_ethernet_reset_reset (eth_reset),
.a10gx_base_sys_ethernet_sgmii_rxp_0 (eth_rxd),
.a10gx_base_sys_ethernet_sgmii_txp_0 (eth_txd),
.a10gx_base_sys_gpio_in_export ({trig, adc_fdb, adc_fda, dac_irq, clkd_status[1], clkd_status[0]}),
.a10gx_base_sys_gpio_out_export ({adc_pd, dac_txen, dac_reset, clkd_sync}),
.a10gx_base_sys_gpio_in_export (gpio_i[63:32]),
.a10gx_base_sys_gpio_out_export (gpio_o[63:32]),
.a10gx_base_sys_gpio_bd_in_port (gpio_i[31:0]),
.a10gx_base_sys_gpio_bd_out_port (gpio_o[31:0]),
.a10gx_base_sys_spi_MISO (spi_miso_s),
.a10gx_base_sys_spi_MOSI (spi_mosi_s),
.a10gx_base_sys_spi_SCLK (spi_clk),
.a10gx_base_sys_spi_SS_n (spi_csn_s),
.daq2_rx_data_rx_serial_data (rx_data),
.daq2_rx_ref_clk_clk (rx_ref_clk),
.daq2_rx_sync_rx_sync (rx_sync),
.daq2_rx_sysref_rx_ext_sysref_in (rx_sysref),
.daq2_tx_data_tx_serial_data (tx_data),
.daq2_tx_ref_clk_clk (tx_ref_clk),
.daq2_tx_sync_tx_sync (tx_sync),
.daq2_tx_sysref_tx_ext_sysref_in (tx_sysref),
.daq3_rx_data_rx_serial_data (rx_data),
.daq3_rx_ref_clk_clk (rx_ref_clk),
.daq3_rx_sync_rx_sync (rx_sync),
.daq3_rx_sysref_rx_ext_sysref_in (rx_sysref),
.daq3_tx_data_tx_serial_data (tx_data),
.daq3_tx_ref_clk_clk (tx_ref_clk),
.daq3_tx_sync_tx_sync (tx_sync),
.daq3_tx_sysref_tx_ext_sysref_in (tx_sysref),
.sys_clk_clk (sys_clk),
.sys_reset_reset_n (sys_resetn));

52
projects/daq3/common/daq3_bd.qsys
View File

@ -414,6 +414,14 @@
type = "String";
}
}
element daq3_bd
{
datum _originalDeviceFamily
{
value = "Arria 10";
type = "String";
}
}
element mem_clk
{
datum _sortIndex
@ -1807,6 +1815,17 @@
<parameter name="startPortLSB" value="0" />
<parameter name="width" value="0" />
</connection>
<connection
kind="conduit"
version="15.0"
start="axi_ad9152_core.fifo_ch_0_out"
end="util_upack_0.fifo_ch_0">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
<parameter name="startPortLSB" value="0" />
<parameter name="width" value="0" />
</connection>
<connection
kind="conduit"
version="15.0"
@ -1818,6 +1837,17 @@
<parameter name="startPortLSB" value="0" />
<parameter name="width" value="0" />
</connection>
<connection
kind="conduit"
version="15.0"
start="axi_ad9152_core.fifo_ch_1_out"
end="util_upack_0.fifo_ch_1">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
<parameter name="startPortLSB" value="0" />
<parameter name="width" value="0" />
</connection>
<connection
kind="conduit"
version="15.0"
@ -1840,6 +1870,28 @@
<parameter name="startPortLSB" value="0" />
<parameter name="width" value="0" />
</connection>
<connection
kind="conduit"
version="15.0"
start="ad9680_adcfifo.if_adc_wovf"
end="axi_ad9680_core.if_adc_dovf">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
<parameter name="startPortLSB" value="0" />
<parameter name="width" value="0" />
</connection>
<connection
kind="conduit"
version="15.0"
start="axi_ad9152_core.if_dac_dunf"
end="axi_ad9152_dma.if_fifo_rd_underflow">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
<parameter name="startPortLSB" value="0" />
<parameter name="width" value="0" />
</connection>
<connection
kind="conduit"
version="15.0"

7
projects/daq3/common/daq3_spi.v
View File

@ -100,11 +100,8 @@ module daq3_spi (
// io butter
IOBUF i_iobuf_sdio (
.T (spi_enable_s),
.I (spi_mosi),
.O (spi_miso),
.IO (spi_sdio));
assign spi_miso = spi_sdio;
assign spi_sdio = (spi_enable_s == 1'b1) ? 1'bz : spi_mosi;
endmodule